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icestorm
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851 Commits

Author SHA1 Message Date
Clifford Wolf 535fde6361
Merge pull request #129 from daveshah1/icetime_ufix 
Fix handling of a port name like CLKHF_FABRIC in icetime
 2018-02-28 16:13:12 +01:00
David Shah c1d7ef8b52 Fix handling of a port name like CLKHF_FABRIC in icetime 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-02-28 15:04:57 +00:00
Clifford Wolf 54511ff508
Merge pull request #126 from daveshah1/icetime_bfix 
Properly ignore unsupported cell types
 2018-02-20 13:43:50 +01:00
David Shah 4cdf41c840 Properly ignore unsupported cell types 2018-02-19 09:26:59 +00:00
Clifford Wolf 1d84b7a531
Merge pull request #124 from daveshah1/ultra 
Add iCE40 Ultra (ice5lp) support to icepack
 2018-02-14 18:48:09 +01:00
David Shah 58e2e74d42 Add iCE40 Ultra (ice5lp) support to icepack 2018-02-13 20:22:05 +00:00
Clifford Wolf edbf5fce90
Merge pull request #123 from daveshah1/up5k_io 
Add RGB driver LED pins and I³C IOs to chipdb
 2018-02-13 18:09:19 +01:00
David Shah e5e09ee722 Add write protection disable to iceprog 2018-02-12 18:58:19 +00:00
Clifford Wolf 594644e755 Fix compiler warning (comparison between signed and unsigned int) in icetime 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-02-09 16:38:53 +01:00
David Shah b024ef49da Add UltraPlus I³C IO to chipdb 2018-02-09 13:42:38 +00:00
Clifford Wolf be0b3489fb
Merge pull request #122 from daveshah1/iceprog-up2 
Add out-of-the-box FT232H support (for Upduino 2, etc)
 2018-02-09 13:52:31 +01:00
David Shah 9ac405f98f Add out-of-the-box FT232H support (for Upduino 2, etc) 2018-02-09 12:25:48 +00:00
David Shah 80dbd67e6c Add RGB driver outputs to chipdb 2018-02-09 09:42:08 +00:00
Clifford Wolf a7a6f3695f Remove up5k_mac16 "example" and add README to up5k_rgb and icebreaker 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2018-02-06 18:12:44 +01:00
Clifford Wolf d3a753f7d7 Add icebreaker example project 2018-02-06 15:02:16 +01:00
Clifford Wolf 722790ad3c
Merge pull request #119 from daveshah1/up5k_improve 
UltraPlus Timing Analysis Improvements
 2018-01-30 17:13:37 +01:00
David Shah 6efb7f7cc2 Tidy up 2018-01-30 10:21:44 +00:00
David Shah a5849e3ba8 Misc UltraPlus fixes 2018-01-30 10:15:59 +00:00
David Shah aa2b857d73 Updated 5k timing data, icetime regression fix 2018-01-29 14:02:37 +00:00
David Shah dd49c058a5 DSP related fixes 2018-01-28 16:38:46 +00:00
David Shah a6b2ca91e5 Working DSP timing analysis 2018-01-26 19:08:16 +00:00
David Shah cd4352e0ce Work on timing analysis of DSPs 2018-01-26 18:35:35 +00:00
David Shah 49dfe15d8c Parse extra cells in icetime 2018-01-23 09:56:14 +00:00
David Shah 420ef041b6 More DSP timing fuzzing, start adding new tiles to icetime 2018-01-22 17:03:16 +00:00
David Shah 8a30b4bbd4 Seperate different DSP configs in timing data 2018-01-22 16:34:51 +00:00
Clifford Wolf 479467a50d
Merge pull request #118 from daveshah1/up5k_fix_timing 
Fix 5k Timing Data
 2018-01-20 19:15:38 +01:00
David Shah 78e5b89e7c Fix 5k timing data 2018-01-20 17:55:51 +00:00
Clifford Wolf edef5d2465
Merge pull request #116 from daveshah1/up5k_misc_fixes 
Miscellaneous UltraPlus fixes and improvements
 2018-01-16 18:03:49 +01:00
David Shah 99857b1505 Add example for 5k UWG30 package 2018-01-16 15:17:20 +00:00
David Shah 4b16c3735c I³C IO reverse engineered and documented 2018-01-16 15:17:20 +00:00
David Shah 7e587c9b6b Add 5k UWG30 ieren data to db 2018-01-16 15:17:20 +00:00
David Shah a59472812c Remove seperate 5k RAM DB and share with 8k instead 
This should ensure that the 5k RAM routing entries are now complete,
fixing #115
 2018-01-16 15:17:20 +00:00
David Shah 02a986b2f4 Add pinout for 5k UWG30 package 2018-01-16 15:17:20 +00:00
David Shah 35bd638b4c Add SPI enable bits to docs 2018-01-16 15:17:20 +00:00
David Shah 77eafa89b4 HFOSC trimming info 2018-01-16 15:17:20 +00:00
David Shah 9e81ac7786 New UltraPlus corner tracing algorithm 2018-01-16 15:17:12 +00:00
David Shah 0932c559a7 Misc routing tweaks 2018-01-16 15:17:12 +00:00
David Shah ec3ad58683 Figure out missing SPI config bits, and add to chipdb 2018-01-16 15:16:44 +00:00
Clifford Wolf bca8c3c88f Add "iceprog -e" 2018-01-02 17:12:44 +01:00
Clifford Wolf 8e51d4f918
Merge pull request #113 from cr1901/nosleep 
Add option to `icepack` to disable SPI Deep Power-Down command in bitstream.
 2017-12-31 15:07:59 +01:00
William D. Jones 182e9350de Enable writing nosleep config bit into output bitstream. 2017-12-31 01:52:59 -05:00
William D. Jones c093efc015 Add nosleep field to FpgaConfig- read_bits recognizes the option. 2017-12-31 01:34:36 -05:00
Clifford Wolf 4f9c036a72
Merge pull request #112 from mithro/patch-2 
Creating COPYING file.
 2017-12-09 01:26:14 +01:00
Tim Ansell aa946fb758
Creating COPYING file. 
So GitHub automatically detects the license of the repo.
 2017-12-08 16:12:30 -08:00
Clifford Wolf 14b44ca866
Merge pull request #110 from daveshah1/up5k_ip 
UltraPlus Hard IP and icetime Support
 2017-11-28 15:54:58 +01:00
David Shah 411bcc53ff Whitespace fixes 2017-11-28 11:03:47 +00:00
David Shah f1025dbd88 Add uncommitted changes and tidy up some files 2017-11-28 11:00:51 +00:00
David Shah 70d295212a Chipdb fix for hard IP 2017-11-26 11:46:38 +00:00
David Shah 3c49070269 Add note about glitch filter 2017-11-25 10:20:54 +00:00
David Shah 6f2d9def4f Add UltraPlus IP to chipdb 2017-11-24 18:49:28 +00:00