mirror of https://github.com/YosysHQ/icestorm.git
Added 8k bit docs
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@ -2,6 +2,7 @@
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<h1>Project IceStorm</h1>
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<p>
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<b>2015-07-19:</b> Released support for 8k chips. Moved IceStorm sourcecode to GitHub.<br/>
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<b>2015-05-27:</b> We have a working fully Open Source flow with <a href="http://www.clifford.at/yosys/">Yosys</a> and <a href="https://github.com/cseed/arachne-pnr">Arachne-pnr</a>! Video: <a href="http://youtu.be/yUiNlmvVOq8">http://youtu.be/yUiNlmvVOq8</a><br/>
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<b>2015-04-13:</b> Complete rewrite of IceUnpack, added IcePack, some major documentation updates<br/>
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<b>2015-03-22:</b> First public release and short YouTube video demonstrating our work: <a href="http://youtu.be/u1ZHcSNDQMM">http://youtu.be/u1ZHcSNDQMM</a>
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@ -22,7 +22,9 @@ import icebox
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import getopt, sys, os, re
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chipname = "iCE40 HX1K"
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chipdbfile = "chipdb-1k.txt"
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outdir = None
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mode8k = False
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tx, ty = 0, 0
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def usage():
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@ -30,10 +32,11 @@ def usage():
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print(" -x tile_x_coordinate")
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print(" -y tile_y_coordinate")
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print(" -d outdir")
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print(" -8")
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sys.exit(0)
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try:
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opts, args = getopt.getopt(sys.argv[1:], "x:y:d:")
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opts, args = getopt.getopt(sys.argv[1:], "x:y:d:8")
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except:
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usage()
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@ -44,6 +47,10 @@ for o, a in opts:
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ty = int(a)
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elif o == "-d":
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outdir = a
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elif o == "-8":
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mode8k = True
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chipname = "iCE40 HX8K"
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chipdbfile = "chipdb-8k.txt"
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else:
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usage()
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@ -51,29 +58,56 @@ if len(args) != 0:
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usage()
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ic = icebox.iceconfig()
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ic.setup_empty_1k()
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mktiles = set()
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for x in range(1, 13):
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mktiles.add((x, 0))
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mktiles.add((x, 17))
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if mode8k:
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ic.setup_empty_8k()
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for x in range(0, 6) + range(8, 14):
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mktiles.add((x, 1))
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mktiles.add((x, 16))
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for x in range(1, 3) + range(8-2, 8+3) + range(15, 19) + range(25-2, 25+3) + range(33-2, 33):
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mktiles.add((x, 0))
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mktiles.add((x, 33))
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for x in range(0, 5) + range(9, 14):
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mktiles.add((x, 2))
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mktiles.add((x, 15))
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for x in range(0, 3) + range(8-1, 8+2) + range(25-1, 25+2) + range(33-2, 34):
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mktiles.add((x, 1))
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mktiles.add((x, 32))
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for y in range(7, 11):
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mktiles.add((0, y))
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mktiles.add((13, y))
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for x in range(0, 2) + range(8-1, 8+2) + range(25-1, 25+2) + range(34-2, 34):
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mktiles.add((x, 2))
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mktiles.add((x, 31))
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for x in range(6, 8):
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for y in range(8, 10):
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mktiles.add((x, y))
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for x in [0, 33]:
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mktiles.add((x, 15))
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mktiles.add((x, 16))
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mktiles.add((x, 17))
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mktiles.add((x, 18))
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for x in [16, 17]:
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mktiles.add((x, 16))
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mktiles.add((x, 17))
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else:
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ic.setup_empty_1k()
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for x in range(1, 13):
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mktiles.add((x, 0))
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mktiles.add((x, 17))
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for x in range(0, 6) + range(8, 14):
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mktiles.add((x, 1))
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mktiles.add((x, 16))
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for x in range(0, 5) + range(9, 14):
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mktiles.add((x, 2))
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mktiles.add((x, 15))
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for y in range(7, 11):
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mktiles.add((0, y))
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mktiles.add((13, y))
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for x in range(6, 8):
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for y in range(8, 10):
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mktiles.add((x, y))
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expand_count=[0]
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@ -96,7 +130,7 @@ def print_index():
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and providing simple tools for analyzing and creating bitstream files. This is work in progress.</i>""")
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print("""<p>This documentation is auto-generated by <tt>icebox_html.py</tt> from IceBox.<br/>
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A machine-readable form of the database can be downloaded <a href="chipdb.txt">here</a>.</p>""")
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A machine-readable form of the database can be downloaded <a href="%s">here</a>.</p>""" % chipdbfile)
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print("""<p>The iCE40 FPGA fabric is organized into tiles. The configuration bits
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themself have the same meaning in all tiles of the same type. But the way the tiles
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@ -112,7 +146,12 @@ in iCE40 FPGAs.</p>""")
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for y in range(ic.max_y, -1, -1):
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print("<tr>")
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for x in range(ic.max_x + 1):
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print('<td style="width:50px; height:50px;" align="center" valign="center"', end="")
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if mode8k:
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fontsize="8px"
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print('<td style="width:25px; height:20px;" align="center" valign="center"', end="")
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else:
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fontsize="10px"
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print('<td style="width:40px; height:40px;" align="center" valign="center"', end="")
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if ic.tile_pos(x, y) == None:
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print('> </td>')
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elif (x, y) in mktiles:
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@ -120,13 +159,13 @@ in iCE40 FPGAs.</p>""")
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if ic.tile_type(x, y) == "LOGIC": color = "#eae"
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if ic.tile_type(x, y) == "RAMB": color = "#eea"
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if ic.tile_type(x, y) == "RAMT": color = "#eea"
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print('bgcolor="%s"><small><a style="color:#000; text-decoration:none" href="tile_%d_%d.html"><b>%s<br/>(%d %d)</b></a></small></td>' % (color, x, y, ic.tile_type(x, y), x, y))
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print('bgcolor="%s"><span style="font-size:%s"><a style="color:#000; text-decoration:none" href="tile_%d_%d.html"><b>%s<br/>(%d %d)</b></a></span></td>' % (color, fontsize, x, y, ic.tile_type(x, y), x, y))
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else:
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if ic.tile_type(x, y) == "IO": color = "#8aa"
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if ic.tile_type(x, y) == "LOGIC": color = "#a8a"
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if ic.tile_type(x, y) == "RAMB": color = "#aa8"
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if ic.tile_type(x, y) == "RAMT": color = "#aa8"
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print('bgcolor="%s"><small>%s<br/>(%d %d)</small></td>' % (color, ic.tile_type(x, y), x, y))
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print('bgcolor="%s"><span style="font-size:%s">%s<br/>(%d %d)</span></td>' % (color, fontsize, ic.tile_type(x, y), x, y))
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print("</tr>")
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print("</table></p>")
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@ -526,8 +565,8 @@ if outdir is not None:
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sys.stdout = open("%s/tile_%d_%d.html" % (outdir, x, y), "w")
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print_tile(x, y)
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print("Writing %s/chipdb.txt..." % outdir, file=stdout)
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os.system("python icebox_chipdb.py > %s/chipdb.txt" % outdir)
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print("Writing %s/%s..." % (outdir, chipdbfile), file=stdout)
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os.system("python icebox_chipdb.py > %s/%s" % (outdir, chipdbfile))
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sys.stdout = stdout
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