mirror of https://github.com/YosysHQ/icestorm.git
icebox_vlog: Use cached re functions
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parent
00213ed9c3
commit
eec6555603
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@ -16,6 +16,7 @@
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#
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import icebox
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from icebox import re_match_cached, re_sub_cached, re_search_cached
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import getopt, sys, re
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strip_comments = False
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@ -93,22 +94,22 @@ for o, a in opts:
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elif o in ("-p", "-P"):
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with open(a, "r") as f:
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for line in f:
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if o == "-P" and not re.search(" # ICE_(GB_)?IO", line):
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if o == "-P" and not re_search_cached(" # ICE_(GB_)?IO", line):
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continue
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line = re.sub(r"#.*", "", line.strip()).split()
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line = re_sub_cached(r"#.*", "", line.strip()).split()
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if "--warn-no-port" in line:
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line.remove("--warn-no-port")
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if len(line) and line[0] == "set_io":
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p = line[1]
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if o == "-P":
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p = p.lower()
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p = re.sub(r"_ibuf$", "", p)
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p = re.sub(r"_obuft$", "", p)
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p = re.sub(r"_obuf$", "", p)
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p = re.sub(r"_gb_io$", "", p)
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p = re.sub(r"_pad(_[0-9]+|)$", r"\1", p)
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p = re_sub_cached(r"_ibuf$", "", p)
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p = re_sub_cached(r"_obuft$", "", p)
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p = re_sub_cached(r"_obuf$", "", p)
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p = re_sub_cached(r"_gb_io$", "", p)
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p = re_sub_cached(r"_pad(_[0-9]+|)$", r"\1", p)
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portnames.add(p)
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if not re.match(r"[a-zA-Z_][a-zA-Z0-9_]*$", p):
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if not re_match_cached(r"[a-zA-Z_][a-zA-Z0-9_]*$", p):
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p = "\\%s " % p
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unmatched_ports.add(p)
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if len(line) > 3:
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@ -177,7 +178,7 @@ pll_gbuf = dict()
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for entry in icebox.iotile_l_db:
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if entry[1] == "PLL":
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match = re.match(r"B(\d+)\[(\d+)\]", entry[0][0]);
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match = re_match_cached(r"B(\d+)\[(\d+)\]", entry[0][0]);
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assert match
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pll_config_bitidx[entry[2]] = (int(match.group(1)), int(match.group(2)))
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@ -234,8 +235,8 @@ for idx, tile in list(ic.io_tiles.items()):
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iocells_negclk.add((idx[0], idx[1], 0))
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iocells_negclk.add((idx[0], idx[1], 1))
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if entry[1].startswith("IOB_") and entry[2].startswith("PINTYPE_") and tc.match(entry[0]):
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match1 = re.match("IOB_(\d+)", entry[1])
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match2 = re.match("PINTYPE_(\d+)", entry[2])
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match1 = re_match_cached("IOB_(\d+)", entry[1])
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match2 = re_match_cached("PINTYPE_(\d+)", entry[2])
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assert match1 and match2
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iocells_type[(idx[0], idx[1], int(match1.group(1)))][int(match2.group(1))] = "1"
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iocells_type[(idx[0], idx[1], 0)] = "".join(iocells_type[(idx[0], idx[1], 0)])
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@ -244,7 +245,7 @@ for idx, tile in list(ic.io_tiles.items()):
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for segs in sorted(ic.group_segments()):
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for seg in segs:
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if ic.tile_type(seg[0], seg[1]) == "IO":
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match = re.match("io_(\d+)/D_(IN|OUT)_(\d+)", seg[2])
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match = re_match_cached("io_(\d+)/D_(IN|OUT)_(\d+)", seg[2])
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if match:
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cell = (seg[0], seg[1], int(match.group(1)))
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if cell in iocells_skip:
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@ -287,7 +288,7 @@ for segs in sorted(ic.group_segments(extra_connections=extra_connections, extra_
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renamed_net_to_port = False
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for s in segs:
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match = re.match("io_(\d+)/PAD", s[2])
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match = re_match_cached("io_(\d+)/PAD", s[2])
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if match:
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idx = (s[0], s[1], int(match.group(1)))
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p = "io_%d_%d_%d" % idx
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@ -322,7 +323,7 @@ for segs in sorted(ic.group_segments(extra_connections=extra_connections, extra_
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text_ports.append("inout %s" % p)
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text_wires.append("assign %s = %s;" % (p, n))
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match = re.match("lutff_(\d+)/", s[2])
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match = re_match_cached("lutff_(\d+)/", s[2])
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if match:
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#IpCon and DSP tiles look like logic tiles, but aren't.
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if ic.device in ["5k", "u4k"] and (s[0] == 0 or s[0] == ic.max_x):
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@ -347,10 +348,10 @@ for segs in sorted(ic.group_segments(extra_connections=extra_connections, extra_
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count_drivers = []
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for s in segs:
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if re.match(r"ram/RDATA_", s[2]): count_drivers.append(s[2])
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if re.match(r"io_./D_IN_", s[2]): count_drivers.append(s[2])
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if re.match(r"lutff_./out", s[2]): count_drivers.append(s[2])
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if re.match(r"lutff_./lout", s[2]): count_drivers.append(s[2])
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if re_match_cached(r"ram/RDATA_", s[2]): count_drivers.append(s[2])
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if re_match_cached(r"io_./D_IN_", s[2]): count_drivers.append(s[2])
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if re_match_cached(r"lutff_./out", s[2]): count_drivers.append(s[2])
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if re_match_cached(r"lutff_./lout", s[2]): count_drivers.append(s[2])
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if len(count_drivers) != 1 and check_driver:
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failed_drivers_check.append((n, count_drivers))
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@ -870,7 +871,7 @@ if do_collect:
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vec_ports_max = dict()
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vec_ports_dir = dict()
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for port in text_ports:
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match = re.match(r"(input|output|inout) (.*)\[(\d+)\] ?$", port);
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match = re_match_cached(r"(input|output|inout) (.*)\[(\d+)\] ?$", port);
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if match:
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vec_ports_min[match.group(2)] = min(vec_ports_min.setdefault(match.group(2), int(match.group(3))), int(match.group(3)))
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vec_ports_max[match.group(2)] = max(vec_ports_max.setdefault(match.group(2), int(match.group(3))), int(match.group(3)))
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@ -889,7 +890,7 @@ new_text_wires = list()
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new_text_regs = list()
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new_text_raw = list()
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for line in text_wires:
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match = re.match(r"wire ([^ ;]+)(.*)", line)
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match = re_match_cached(r"wire ([^ ;]+)(.*)", line)
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if match:
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if strip_comments:
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name = match.group(1)
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