mirror of https://github.com/YosysHQ/icestorm.git
initial packing and unpacking parameters
This commit is contained in:
Scott Shawcroft
parent
5dd8d1172c
commit
ed8c4e8c03
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@ -170,7 +170,7 @@ struct BramIndexConverter
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int bank_off;
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BramIndexConverter(const FpgaConfig *fpga, int tile_x, int tile_y);
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void get_bram_index(int bit_x, int bit_y, int &bram_bank, int &bram_x, int &bram_y) const;
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void get_bram_index(uint bit_x, uint bit_y, uint &bram_bank, uint &bram_x, uint &bram_y) const;
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};
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static void update_crc16(uint16_t &crc, uint8_t byte)
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@ -249,7 +249,7 @@ void FpgaConfig::read_bits(std::istream &ifs)
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{
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// one command byte. the lower 4 bits of the command byte specify
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// the length of the command payload.
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uint8_t command = read_byte(ifs, crc_value, file_offset);
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uint32_t payload = 0;
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@ -396,9 +396,11 @@ void FpgaConfig::read_bits(std::istream &ifs)
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this->device = "1k";
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else if (this->cram_width == 872 && this->cram_height == 272)
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this->device = "8k";
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else if (this->cram_width == 692 && this->cram_height == 336)
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this->device = "5k";
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else
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error("Failed to detect chip type.\n");
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info("Chip type is '%s'.\n", this->device.c_str());
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}
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@ -620,6 +622,12 @@ void FpgaConfig::read_ascii(std::istream &ifs)
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this->cram_height = 272;
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this->bram_width = 128;
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this->bram_height = 2 * 128;
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} else
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if (this->device == "5k") {
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this->cram_width = 692;
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this->cram_height = 336;
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this->bram_width = 160;
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this->bram_height = 2 * 128;
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} else
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error("Unsupported chip type '%s'.\n", this->device.c_str());
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@ -704,7 +712,7 @@ void FpgaConfig::read_ascii(std::istream &ifs)
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for (int i = 0; i < 4; i++)
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if ((value & (1 << i)) != 0) {
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int bram_bank, bram_x, bram_y;
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uint bram_bank, bram_x, bram_y;
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bic.get_bram_index(bit_x+i, bit_y, bram_bank, bram_x, bram_y);
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this->bram[bram_bank][bram_x][bram_y] = true;
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}
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@ -725,10 +733,10 @@ void FpgaConfig::read_ascii(std::istream &ifs)
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continue;
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}
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if (command == ".sym")
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continue;
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if (command.substr(0, 1) == ".")
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error("Unknown statement: %s\n", command.c_str());
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error("Unexpected data line: %s\n", line.c_str());
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@ -785,12 +793,20 @@ void FpgaConfig::write_ascii(std::ostream &ofs) const
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BramIndexConverter bic(this, x, y);
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ofs << stringf(".ram_data %d %d\n", x, y);
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for (int bit_y = 0; bit_y < 16; bit_y++) {
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for (int bit_x = 256-4; bit_x >= 0; bit_x -= 4) {
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for (uint bit_y = 0; bit_y < 16; bit_y++) {
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for (uint bit_x = 256-4; bit_x > 0; bit_x -= 4) {
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int value = 0;
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for (int i = 0; i < 4; i++) {
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int bram_bank, bram_x, bram_y;
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uint bram_bank, bram_x, bram_y;
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bic.get_bram_index(bit_x+i, bit_y, bram_bank, bram_x, bram_y);
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if (bram_x >= this->bram[bram_bank].size()) {
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error("bram_x %u higher than loaded bram size %lu\n", bram_x, this->bram[bram_bank].size());
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break;
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}
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if (bram_y >= this->bram[bram_bank][bram_x].size()) {
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error("bram_y %u higher than loaded bram size %lu\n", bram_y, this->bram[bram_bank][bram_x].size());
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break;
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}
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if (this->bram[bram_bank][bram_x][bram_y])
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value += 1 << i;
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}
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@ -870,6 +886,7 @@ int FpgaConfig::chip_width() const
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{
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if (this->device == "384") return 6;
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if (this->device == "1k") return 12;
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if (this->device == "5k") return 24;
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if (this->device == "8k") return 32;
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panic("Unknown chip type '%s'.\n", this->device.c_str());
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}
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@ -878,6 +895,7 @@ int FpgaConfig::chip_height() const
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{
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if (this->device == "384") return 8;
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if (this->device == "1k") return 16;
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if (this->device == "5k") return 30;
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if (this->device == "8k") return 32;
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panic("Unknown chip type '%s'.\n", this->device.c_str());
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}
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@ -886,6 +904,8 @@ vector<int> FpgaConfig::chip_cols() const
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{
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if (this->device == "384") return vector<int>({18, 54, 54, 54, 54});
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if (this->device == "1k") return vector<int>({18, 54, 54, 42, 54, 54, 54});
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// Its IPConnect or Mutiplier block, five logic, ram, six logic.
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if (this->device == "5k") return vector<int>({18, 54, 54, 54, 54, 54, 42, 54, 54, 54, 54, 54, 54});
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if (this->device == "8k") return vector<int>({18, 54, 54, 54, 54, 54, 54, 54, 42, 54, 54, 54, 54, 54, 54, 54, 54});
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panic("Unknown chip type '%s'.\n", this->device.c_str());
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}
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@ -902,6 +922,11 @@ string FpgaConfig::tile_type(int x, int y) const
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return "logic";
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}
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if (this->device == "5k") {
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if (x == 6 || x == 18) return y % 2 == 1 ? "ramb" : "ramt";
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return "logic";
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}
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if (this->device == "8k") {
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if (x == 8 || x == 25) return y % 2 == 1 ? "ramb" : "ramt";
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return "logic";
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@ -951,7 +976,7 @@ void FpgaConfig::cram_checkerboard(int m)
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{
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if ((x+y) % 2 == m)
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continue;
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CramIndexConverter cic(this, x, y);
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for (int bit_y = 0; bit_y < 16; bit_y++)
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@ -1031,7 +1056,7 @@ void CramIndexConverter::get_cram_index(int bit_x, int bit_y, int &cram_bank, in
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cram_x = bank_xoff + column_width - 1 - bit_x;
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else
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cram_x = bank_xoff + bit_x;
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if (top_half)
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cram_y = bank_yoff + (15 - bit_y);
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else
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@ -1050,15 +1075,26 @@ BramIndexConverter::BramIndexConverter(const FpgaConfig *fpga, int tile_x, int t
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bool right_half = this->tile_x > chip_width / 2;
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bool top_half = this->tile_y > chip_height / 2;
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// The UltraPlus 5k line is special because the bottom quarter of the chip is
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// used for SRAM instead of logic. Therefore the bitstream for the bottom two
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// quadrants are half the height of the top.
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if (this->fpga->device == "5k") {
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top_half = this->tile_y > chip_height / 3;
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}
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this->bank_num = 0;
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if (top_half) this->bank_num |= 1;
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int y_offset = this->tile_y - 1;
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if (!top_half) {
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this->bank_num |= 1;
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} else {
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y_offset = this->tile_y - chip_height / 3;
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}
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if (right_half) this->bank_num |= 2;
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this->bank_off = 16 * ((top_half ? this->tile_y - chip_height / 2 : this->tile_y - 1) / 2);
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this->bank_off = 16 * (y_offset / 2);
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}
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void BramIndexConverter::get_bram_index(int bit_x, int bit_y, int &bram_bank, int &bram_x, int &bram_y) const
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void BramIndexConverter::get_bram_index(uint bit_x, uint bit_y, uint &bram_bank, uint &bram_x, uint &bram_y) const
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{
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int index = 256 * bit_y + (16*(bit_x/16) + 15 - bit_x%16);
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bram_bank = bank_num;
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@ -1205,4 +1241,3 @@ int main(int argc, char **argv)
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info("Done.\n");
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return 0;
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}
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