mirror of https://github.com/YosysHQ/icestorm.git
iCE40 Ultra = iCE5LP = u4k port
This commit is contained in:
Simon Schubert
parent
c0cbae88ab
commit
d76ac32ec9
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@ -3,4 +3,5 @@ chipdb-5k.txt
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chipdb-lm4k.txt
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chipdb-8k.txt
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chipdb-384.txt
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chipdb-u4k.txt
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__pycache__
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@ -1,6 +1,6 @@
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include ../config.mk
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all: chipdb-384.txt chipdb-1k.txt chipdb-8k.txt chipdb-5k.txt chipdb-lm4k.txt
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all: chipdb-384.txt chipdb-1k.txt chipdb-8k.txt chipdb-5k.txt chipdb-lm4k.txt chipdb-u4k.txt
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chipdb-384.txt: icebox.py iceboxdb.py icebox_chipdb.py
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python3 icebox_chipdb.py -3 > chipdb-384.new
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@ -14,6 +14,10 @@ chipdb-5k.txt: icebox.py iceboxdb.py icebox_chipdb.py
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python3 icebox_chipdb.py -5 > chipdb-5k.new
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mv chipdb-5k.new chipdb-5k.txt
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chipdb-u4k.txt: icebox.py iceboxdb.py icebox_chipdb.py
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python3 icebox_chipdb.py -u > chipdb-u4k.new
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mv chipdb-u4k.new chipdb-u4k.txt
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chipdb-lm4k.txt: icebox.py iceboxdb.py icebox_chipdb.py
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python3 icebox_chipdb.py -4 > chipdb-lm4k.new
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mv chipdb-lm4k.new chipdb-lm4k.txt
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@ -28,7 +32,7 @@ check: all
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python3 tc_logic_xpr.py
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clean:
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rm -f chipdb-1k.txt chipdb-8k.txt chipdb-384.txt chipdb-5k.txt chipdb-lm4k.txt
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rm -f chipdb-1k.txt chipdb-8k.txt chipdb-384.txt chipdb-5k.txt chipdb-lm4k.txt chipdb-u4k.txt
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rm -f icebox.pyc iceboxdb.pyc
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install: all
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@ -38,6 +42,7 @@ install: all
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cp chipdb-1k.txt $(DESTDIR)$(PREFIX)/share/icebox/
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cp chipdb-8k.txt $(DESTDIR)$(PREFIX)/share/icebox/
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cp chipdb-5k.txt $(DESTDIR)$(PREFIX)/share/icebox/
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cp chipdb-u4k.txt $(DESTDIR)$(PREFIX)/share/icebox/
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cp chipdb-lm4k.txt $(DESTDIR)$(PREFIX)/share/icebox/
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cp icebox.py $(DESTDIR)$(PREFIX)/bin/icebox.py
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cp iceboxdb.py $(DESTDIR)$(PREFIX)/bin/iceboxdb.py
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@ -69,6 +74,7 @@ uninstall:
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rm -f $(DESTDIR)$(PREFIX)/share/icebox/chipdb-1k.txt
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rm -f $(DESTDIR)$(PREFIX)/share/icebox/chipdb-8k.txt
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rm -f $(DESTDIR)$(PREFIX)/share/icebox/chipdb-lm4k.txt
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rm -f $(DESTDIR)$(PREFIX)/share/icebox/chipdb-u4k.txt
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-rmdir $(DESTDIR)$(PREFIX)/share/icebox
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.PHONY: all check clean install uninstall
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330
icebox/icebox.py
330
icebox/icebox.py
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@ -103,6 +103,39 @@ class iceconfig:
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self.io_tiles[(0, y)] = ["0" * 18 for i in range(16)]
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self.io_tiles[(self.max_x, y)] = ["0" * 18 for i in range(16)]
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def setup_empty_u4k(self):
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self.clear()
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self.device = "u4k"
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self.max_x = 25
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self.max_y = 21
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for x in range(1, self.max_x):
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for y in range(1, self.max_y):
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if x in (6, 19):
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if y % 2 == 1:
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self.ramb_tiles[(x, y)] = ["0" * 42 for i in range(16)]
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else:
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self.ramt_tiles[(x, y)] = ["0" * 42 for i in range(16)]
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else:
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self.logic_tiles[(x, y)] = ["0" * 54 for i in range(16)]
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for x in range(1, self.max_x):
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self.io_tiles[(x, 0)] = ["0" * 18 for i in range(16)]
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self.io_tiles[(x, self.max_y)] = ["0" * 18 for i in range(16)]
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for x in [0, self.max_x]:
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for y in range(1, self.max_y):
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if y in [5, 13]:
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self.dsp_tiles[0][(x, y)] = ["0" * 54 for i in range(16)]
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elif y in [6, 14]:
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self.dsp_tiles[1][(x, y)] = ["0" * 54 for i in range(16)]
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elif y in [7, 15]:
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self.dsp_tiles[2][(x, y)] = ["0" * 54 for i in range(16)]
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elif y in [8, 16]:
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self.dsp_tiles[3][(x, y)] = ["0" * 54 for i in range(16)]
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else:
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self.ipcon_tiles[(x, y)] = ["0" * 54 for i in range(16)]
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def setup_empty_5k(self):
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self.clear()
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self.device = "5k"
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@ -179,6 +212,7 @@ class iceconfig:
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if self.device == "384": return pinloc_db["384-qn32"]
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if self.device == "1k": return pinloc_db["1k-tq144"]
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if self.device == "lm4k": return pinloc_db["lm4k-cm49"]
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if self.device == "u4k": return pinloc_db["u4k-sg48"]
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if self.device == "5k": return pinloc_db["5k-sg48"]
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if self.device == "8k": return pinloc_db["8k-ct256"]
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else:
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@ -205,6 +239,8 @@ class iceconfig:
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return ["1k"]
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if self.device == "lm4k":
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return ["lm4k"]
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if self.device == "u4k":
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return ["u4k"]
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if self.device == "5k":
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return ["5k"]
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if self.device == "8k":
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@ -212,12 +248,12 @@ class iceconfig:
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if self.device == "384":
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return [ ]
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assert False
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# Return true if device is Ultra/UltraPlus series, i.e. has
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# IpConnect/DSP at the sides instead of IO
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def is_ultra(self):
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return self.device in ["5k"]
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return self.device in ["5k", "u4k"]
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def colbuf_db(self):
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if self.device == "1k":
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entries = list()
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@ -241,8 +277,20 @@ class iceconfig:
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src_y = None
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if 0 <= y <= 4: src_y = 4
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if 5 <= y <= 10: src_y = 5
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if 11 <= y <= 16: src_y = 16
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if 17 <= y <= 21: src_y = 17
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if 11 <= y <= 16: src_y = 16
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if 17 <= y <= 21: src_y = 17
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entries.append((x, src_y, x, y))
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return entries
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if self.device == "u4k":
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entries = list()
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for x in range(self.max_x+1):
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for y in range(self.max_y+1):
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src_y = None
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if 0 <= y <= 4: src_y = 4
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if 5 <= y <= 10: src_y = 5
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if 11 <= y <= 16: src_y = 16
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if 17 <= y <= 21: src_y = 17
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entries.append((x, src_y, x, y))
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return entries
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@ -349,9 +397,9 @@ class iceconfig:
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if x == 0: return iotile_l_db
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if x == self.max_x: return iotile_r_db
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# The 5k needs an IO db including the extra bits
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if self.device == "5k":
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if self.device == "5k" or self.device == "u4k":
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if y == 0: return iotile_b_5k_db
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if y == self.max_y: return iotile_t_5k_db
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if y == self.max_y: return iotile_t_5k_db
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else:
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if y == 0: return iotile_b_db
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if y == self.max_y: return iotile_t_db
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@ -359,7 +407,7 @@ class iceconfig:
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if (x, y) in self.logic_tiles: return logictile_db
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if (x, y) in self.ramb_tiles: return rambtile_db
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if (x, y) in self.ramt_tiles: return ramttile_db
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elif self.device == "5k":
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elif self.device == "5k" or self.device == "u4k":
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if (x, y) in self.logic_tiles: return logictile_5k_db
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if (x, y) in self.ramb_tiles: return rambtile_8k_db
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if (x, y) in self.ramt_tiles: return ramttile_8k_db
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@ -388,16 +436,11 @@ class iceconfig:
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if (x, y) in self.ramt_tiles: return "RAMT"
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if (x, y) in self.logic_tiles: return "LOGIC"
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if (x == 0 or x == self.max_x) and self.is_ultra():
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if y in [5, 10, 15, 23]:
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return "DSP0"
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elif y in [6, 11, 16, 24]:
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return "DSP1"
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elif y in [7, 12, 17, 25]:
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return "DSP2"
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elif y in [8, 13, 18, 26]:
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return "DSP3"
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else:
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return "IPCON"
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if (x, y) in self.dsp_tiles[0]: return "DSP0"
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elif (x, y) in self.dsp_tiles[1]: return "DSP1"
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elif (x, y) in self.dsp_tiles[2]: return "DSP2"
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elif (x, y) in self.dsp_tiles[3]: return "DSP3"
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else: return "IPCON"
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assert False
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def tile_pos(self, x, y):
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@ -490,7 +533,7 @@ class iceconfig:
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if (nx, ny) in self.ramb_tiles:
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if self.device == "1k":
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return (nx, ny, "ram/RDATA_%d" % func)
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elif self.device == "5k":
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elif self.device == "5k" or self.device == "u4k":
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return (nx, ny, "ram/RDATA_%d" % (15-func))
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elif self.device == "8k" or self.device == "lm4k":
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return (nx, ny, "ram/RDATA_%d" % (15-func))
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@ -499,7 +542,7 @@ class iceconfig:
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if (nx, ny) in self.ramt_tiles:
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if self.device == "1k":
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return (nx, ny, "ram/RDATA_%d" % (8+func))
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elif self.device == "5k":
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elif self.device == "5k" or self.device == "u4k":
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return (nx, ny, "ram/RDATA_%d" % (7-func))
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elif self.device == "8k" or self.device == "lm4k":
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return (nx, ny, "ram/RDATA_%d" % (7-func))
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@ -541,7 +584,7 @@ class iceconfig:
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if match:
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if self.device == "1k":
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funcnets |= self.follow_funcnet(x, y, int(match.group(1)) % 8)
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elif self.device == "5k":
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elif self.device == "5k" or self.device == "u4k":
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funcnets |= self.follow_funcnet(x, y, 7 - int(match.group(1)) % 8)
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elif self.device == "8k" or self.device == "lm4k":
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funcnets |= self.follow_funcnet(x, y, 7 - int(match.group(1)) % 8)
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@ -775,7 +818,7 @@ class iceconfig:
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seed_segments.add((idx[0], idx[1], "lutff_7/cout"))
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if self.device == "1k":
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add_seed_segments(idx, tile, logictile_db)
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elif self.device == "5k":
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elif self.device == "5k" or self.device == "u4k":
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add_seed_segments(idx, tile, logictile_5k_db)
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elif self.device == "8k" or self.device == "lm4k":
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add_seed_segments(idx, tile, logictile_8k_db)
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@ -787,7 +830,7 @@ class iceconfig:
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for idx, tile in self.ramb_tiles.items():
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if self.device == "1k":
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add_seed_segments(idx, tile, rambtile_db)
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elif self.device == "5k":
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elif self.device == "5k" or self.device == "u4k":
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add_seed_segments(idx, tile, rambtile_8k_db)
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elif self.device == "8k" or self.device == "lm4k":
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add_seed_segments(idx, tile, rambtile_8k_db)
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@ -797,28 +840,28 @@ class iceconfig:
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for idx, tile in self.ramt_tiles.items():
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if self.device == "1k":
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add_seed_segments(idx, tile, ramttile_db)
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elif self.device == "5k":
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elif self.device == "5k" or self.device == "u4k":
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add_seed_segments(idx, tile, ramttile_8k_db)
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elif self.device == "8k" or self.device == "lm4k":
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add_seed_segments(idx, tile, ramttile_8k_db)
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else:
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assert False
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for idx, tile in self.dsp_tiles[0].items():
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if self.device == "5k":
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if self.device == "5k" or self.device == "u4k":
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add_seed_segments(idx, tile, dsp0_5k_db)
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for idx, tile in self.dsp_tiles[1].items():
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if self.device == "5k":
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add_seed_segments(idx, tile, dsp1_5k_db)
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if self.device == "5k" or self.device == "u4k":
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add_seed_segments(idx, tile, dsp1_5k_db)
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for idx, tile in self.dsp_tiles[2].items():
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if self.device == "5k":
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add_seed_segments(idx, tile, dsp2_5k_db)
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if self.device == "5k" or self.device == "u4k":
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add_seed_segments(idx, tile, dsp2_5k_db)
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for idx, tile in self.dsp_tiles[3].items():
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if self.device == "5k":
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add_seed_segments(idx, tile, dsp3_5k_db)
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if self.device == "5k" or self.device == "u4k":
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add_seed_segments(idx, tile, dsp3_5k_db)
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for idx, tile in self.ipcon_tiles.items():
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if self.device == "5k":
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add_seed_segments(idx, tile, ipcon_5k_db)
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if self.device == "5k" or self.device == "u4k":
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add_seed_segments(idx, tile, ipcon_5k_db)
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for padin, pio in enumerate(self.padin_pio_db()):
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s1 = (pio[0], pio[1], "padin_%d" % pio[2])
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s2 = (pio[0], pio[1], "glb_netwk_%d" % padin)
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@ -944,7 +987,7 @@ class iceconfig:
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self.extra_bits.add((int(line[1]), int(line[2]), int(line[3])))
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continue
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if line[0] == ".device":
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assert line[1] in ["1k", "lm4k", "5k", "8k", "384"]
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assert line[1] in ["1k", "lm4k", "u4k", "5k", "8k", "384"]
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self.device = line[1]
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continue
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if line[0] == ".warmboot":
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@ -1368,8 +1411,9 @@ def run_checks_neigh():
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print("Running consistency checks on neighbour finder..")
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ic = iceconfig()
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# ic.setup_empty_1k()
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ic.setup_empty_lm4k()
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# ic.setup_empty_5k()
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#ic.setup_empty_lm4k()
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ic.setup_empty_u4k()
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#ic.setup_empty_5k()
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# ic.setup_empty_8k()
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# ic.setup_empty_384()
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@ -1419,8 +1463,8 @@ def parse_db(text, device="1k"):
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continue
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line = line_1k
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elif line_8k != line:
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# global network is the same for 8k, 5k, and lm4k
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if device != "8k" and device != "5k" and device != "lm4k":
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# global network is the same for 8k, 5k, lm4k, and u4k
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if device != "8k" and device != "5k" and device != "lm4k" and device != "u4k":
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continue
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line = line_8k
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elif line_384 != line:
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@ -1465,6 +1509,16 @@ extra_bits_db = {
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(0, 690, 335): ("padin_glb_netwk", "6"), # check
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(0, 691, 335): ("padin_glb_netwk", "7"), # good
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},
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"u4k": {
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(0, 691, 175): ("padin_glb_netwk", "0"), # good
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(1, 690, 175): ("padin_glb_netwk", "1"), # good
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(0, 690, 175): ("padin_glb_netwk", "2"), # made up
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(0, 690, 174): ("padin_glb_netwk", "3"), # good
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(1, 690, 174): ("padin_glb_netwk", "4"), # HFOSC, good
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(1, 691, 174): ("padin_glb_netwk", "5"), # LFOSC, good
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(0, 691, 174): ("padin_glb_netwk", "6"), # good
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(1, 691, 175): ("padin_glb_netwk", "7"), # made up
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},
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"8k": {
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(0, 870, 270): ("padin_glb_netwk", "0"),
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(0, 871, 270): ("padin_glb_netwk", "1"),
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@ -1508,6 +1562,16 @@ gbufin_db = {
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(13, 31, 1), #checked
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(19, 31, 2), #checked
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],
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"u4k": [
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(13, 0, 0), # 0 ok
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(13, 21, 1), # 1 ok
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(19, 21, 2), # 2 ok
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( 6, 21, 3), # 3 ok
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(12, 21, 4), # 4 ok
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(12, 0, 5), # 5 ok
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( 6, 0, 6), # 6 ok
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(19, 0, 7), # 7 ok
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],
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"lm4k": [
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( 6, 0, 6),
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(12, 0, 5),
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@ -1563,6 +1627,10 @@ iolatch_db = {
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(14, 0),
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(14, 31),
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],
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"u4k": [
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(14, 0),
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(14, 21),
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],
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"8k": [
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( 0, 15),
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(33, 18),
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@ -1591,6 +1659,12 @@ warmbootinfo_db = {
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"S0": ( 23, 0, "fabout" ),
|
||||
"S1": ( 24, 0, "fabout" ),
|
||||
},
|
||||
"u4k": {
|
||||
# These are the right locations but may be the wrong order.
|
||||
"BOOT": ( 22, 0, "fabout" ),
|
||||
"S0": ( 23, 0, "fabout" ),
|
||||
"S1": ( 24, 0, "fabout" ),
|
||||
},
|
||||
"lm4k": {
|
||||
# These are the right locations but may be the wrong order.
|
||||
"BOOT": ( 23, 0, "fabout" ),
|
||||
|
|
@ -1901,6 +1975,70 @@ pllinfo_db = {
|
|||
"SDI": ( 18, 31, "fabout"),
|
||||
"SCLK": ( 17, 31, "fabout"),
|
||||
},
|
||||
"u4k": {
|
||||
"LOC" : (12, 21),
|
||||
|
||||
"PLLTYPE_1": (14, 21, "PLLCONFIG_1"),
|
||||
"PLLTYPE_2": (14, 21, "PLLCONFIG_3"),
|
||||
"PLLTYPE_0": (12, 21, "PLLCONFIG_5"),
|
||||
"FEEDBACK_PATH_0": (14, 21, "PLLCONFIG_5"),
|
||||
"FEEDBACK_PATH_1": (11, 21, "PLLCONFIG_9"),
|
||||
"FEEDBACK_PATH_2": (12, 21, "PLLCONFIG_1"),
|
||||
"PLLOUT_SELECT_A_0": (12, 21, "PLLCONFIG_6"),
|
||||
"PLLOUT_SELECT_A_1": (12, 21, "PLLCONFIG_7"),
|
||||
"PLLOUT_SELECT_B_0": (12, 21, "PLLCONFIG_2"),
|
||||
"PLLOUT_SELECT_B_1": (12, 21, "PLLCONFIG_3"),
|
||||
"SHIFTREG_DIV_MODE": (12, 21, "PLLCONFIG_4"),
|
||||
"FDA_FEEDBACK_0": (12, 21, "PLLCONFIG_9"),
|
||||
"FDA_FEEDBACK_1": (13, 21, "PLLCONFIG_1"),
|
||||
"FDA_FEEDBACK_2": (13, 21, "PLLCONFIG_2"),
|
||||
"FDA_FEEDBACK_3": (13, 21, "PLLCONFIG_3"),
|
||||
"FDA_RELATIVE_0": (13, 21, "PLLCONFIG_5"),
|
||||
"FDA_RELATIVE_1": (13, 21, "PLLCONFIG_6"),
|
||||
"FDA_RELATIVE_2": (13, 21, "PLLCONFIG_7"),
|
||||
"FDA_RELATIVE_3": (13, 21, "PLLCONFIG_8"),
|
||||
"DIVR_0": (10, 21, "PLLCONFIG_1"),
|
||||
"DIVR_1": (10, 21, "PLLCONFIG_2"),
|
||||
"DIVR_2": (10, 21, "PLLCONFIG_3"),
|
||||
"DIVR_3": (10, 21, "PLLCONFIG_4"),
|
||||
"DIVF_0": (10, 21, "PLLCONFIG_5"),
|
||||
"DIVF_1": (10, 21, "PLLCONFIG_6"),
|
||||
"DIVF_2": (10, 21, "PLLCONFIG_7"),
|
||||
"DIVF_3": (10, 21, "PLLCONFIG_8"),
|
||||
"DIVF_4": (10, 21, "PLLCONFIG_9"),
|
||||
"DIVF_5": (11, 21, "PLLCONFIG_1"),
|
||||
"DIVF_6": (11, 21, "PLLCONFIG_2"),
|
||||
"DIVQ_0": (11, 21, "PLLCONFIG_3"),
|
||||
"DIVQ_1": (11, 21, "PLLCONFIG_4"),
|
||||
"DIVQ_2": (11, 21, "PLLCONFIG_5"),
|
||||
"FILTER_RANGE_0": (11, 21, "PLLCONFIG_6"),
|
||||
"FILTER_RANGE_1": (11, 21, "PLLCONFIG_7"),
|
||||
"FILTER_RANGE_2": (11, 21, "PLLCONFIG_8"),
|
||||
"TEST_MODE": (12, 21, "PLLCONFIG_8"),
|
||||
"DELAY_ADJMODE_FB": (13, 21, "PLLCONFIG_4"),
|
||||
"DELAY_ADJMODE_REL": (13, 21, "PLLCONFIG_9"),
|
||||
|
||||
# PLL Ports
|
||||
"PLLOUT_A": ( 12, 21, 1),
|
||||
"PLLOUT_B": ( 13, 21, 0),
|
||||
"REFERENCECLK": ( 10, 21, "fabout"),
|
||||
"EXTFEEDBACK": ( 11, 21, "fabout"),
|
||||
"DYNAMICDELAY_0": ( 1, 21, "fabout"),
|
||||
"DYNAMICDELAY_1": ( 2, 21, "fabout"),
|
||||
"DYNAMICDELAY_2": ( 3, 21, "fabout"),
|
||||
"DYNAMICDELAY_3": ( 4, 21, "fabout"),
|
||||
"DYNAMICDELAY_4": ( 5, 21, "fabout"),
|
||||
"DYNAMICDELAY_5": ( 7, 21, "fabout"),
|
||||
"DYNAMICDELAY_6": ( 8, 21, "fabout"),
|
||||
"DYNAMICDELAY_7": ( 9, 21, "fabout"),
|
||||
"LOCK": ( 1, 20, "neigh_op_tnl_1"), #check?
|
||||
"BYPASS": ( 15, 21, "fabout"),
|
||||
"RESETB": ( 16, 21, "fabout"),
|
||||
"LATCHINPUTVALUE": ( 14, 21, "fabout"),
|
||||
"SDO": ( 24, 20, "neigh_op_tnr_1"), #check?
|
||||
"SDI": ( 18, 21, "fabout"),
|
||||
"SCLK": ( 17, 21, "fabout"),
|
||||
},
|
||||
"8k_0": {
|
||||
"LOC" : (16, 0),
|
||||
|
||||
|
|
@ -2124,6 +2262,17 @@ padin_pio_db = {
|
|||
(12, 0, 1), #6 fixed
|
||||
(12, 31, 1), #7 fixed
|
||||
],
|
||||
"u4k": [
|
||||
(19, 0, 1), # 0 ok
|
||||
( 6, 0, 1), # 1 ok
|
||||
|
||||
(13, 21, 0), # 2 ok
|
||||
(13, 0, 0), # 3 unclear
|
||||
(19, 21, 0), # 4 HFOSC unclear
|
||||
( 6, 21, 0), # 5 LFOSC unclear
|
||||
(12, 0, 1), # 6 unclear
|
||||
(12, 21, 1), # 7 ok
|
||||
],
|
||||
"8k": [
|
||||
(33, 16, 1),
|
||||
( 0, 16, 1),
|
||||
|
|
@ -2597,6 +2746,47 @@ ieren_db = {
|
|||
(12, 0, 0, 12, 0, 1),
|
||||
(13, 0, 0, 13, 0, 1),
|
||||
(12, 0, 1, 12, 0, 0)
|
||||
],
|
||||
"u4k": [
|
||||
( 4, 21, 0, 4, 21, 1),
|
||||
( 5, 0, 0, 5, 0, 1),
|
||||
( 5, 21, 0, 5, 21, 1),
|
||||
( 6, 0, 0, 6, 0, 1),
|
||||
( 6, 0, 1, 6, 0, 0),
|
||||
( 6, 21, 0, 6, 21, 1),
|
||||
( 7, 0, 0, 7, 0, 1),
|
||||
( 7, 0, 1, 7, 0, 0),
|
||||
( 8, 0, 0, 8, 0, 1),
|
||||
( 8, 21, 0, 8, 21, 1),
|
||||
( 8, 21, 1, 8, 21, 0),
|
||||
( 9, 0, 0, 9, 0, 1),
|
||||
( 9, 0, 1, 9, 0, 0),
|
||||
( 9, 21, 0, 9, 21, 1),
|
||||
( 9, 21, 1, 9, 21, 0),
|
||||
(12, 21, 1, 12, 21, 0),
|
||||
(13, 0, 1, 13, 0, 0),
|
||||
(13, 21, 0, 13, 21, 1),
|
||||
(13, 21, 1, 13, 21, 0),
|
||||
(15, 0, 0, 15, 0, 1),
|
||||
(16, 0, 0, 16, 0, 1),
|
||||
(16, 21, 0, 16, 21, 1),
|
||||
(16, 21, 1, 16, 21, 0),
|
||||
(17, 0, 0, 17, 0, 1),
|
||||
(17, 21, 0, 17, 21, 1),
|
||||
(18, 0, 0, 18, 0, 1),
|
||||
(18, 0, 1, 18, 0, 0),
|
||||
(18, 21, 0, 18, 21, 1),
|
||||
(18, 21, 1, 18, 21, 0),
|
||||
(19, 0, 0, 19, 0, 1),
|
||||
(19, 0, 1, 19, 0, 0),
|
||||
(19, 21, 0, 19, 21, 1),
|
||||
(19, 21, 1, 19, 21, 0),
|
||||
(21, 0, 1, 21, 0, 0),
|
||||
(22, 0, 1, 22, 0, 0),
|
||||
(23, 0, 0, 23, 0, 1),
|
||||
(23, 0, 1, 23, 0, 0),
|
||||
(24, 0, 0, 24, 0, 1),
|
||||
(24, 0, 1, 24, 0, 0)
|
||||
]
|
||||
}
|
||||
|
||||
|
|
@ -4838,6 +5028,47 @@ pinloc_db = {
|
|||
( "47", 6, 0, 0),
|
||||
( "48", 7, 0, 0),
|
||||
],
|
||||
"u4k-sg48": [
|
||||
( "2", 8, 0, 0),
|
||||
( "3", 9, 0, 1),
|
||||
( "4", 9, 0, 0),
|
||||
( "6", 13, 0, 1),
|
||||
( "9", 15, 0, 0),
|
||||
( "10", 16, 0, 0),
|
||||
( "11", 17, 0, 0),
|
||||
( "12", 18, 0, 0),
|
||||
( "13", 19, 0, 0),
|
||||
( "14", 23, 0, 0),
|
||||
( "15", 24, 0, 0),
|
||||
( "16", 24, 0, 1),
|
||||
( "17", 23, 0, 1),
|
||||
( "18", 22, 0, 1),
|
||||
( "19", 21, 0, 1),
|
||||
( "20", 19, 0, 1),
|
||||
( "21", 18, 0, 1),
|
||||
( "23", 19, 21, 0),
|
||||
( "25", 19, 21, 1),
|
||||
( "26", 18, 21, 0),
|
||||
( "27", 18, 21, 1),
|
||||
( "28", 17, 21, 0),
|
||||
( "31", 16, 21, 1),
|
||||
( "32", 16, 21, 0),
|
||||
( "34", 13, 21, 1),
|
||||
( "35", 12, 21, 1),
|
||||
( "36", 9, 21, 1),
|
||||
( "37", 13, 21, 0),
|
||||
( "38", 8, 21, 1),
|
||||
( "39", 6, 21, 0),
|
||||
( "40", 5, 21, 0),
|
||||
( "41", 4, 21, 0),
|
||||
( "42", 8, 21, 0),
|
||||
( "43", 9, 21, 0),
|
||||
( "44", 6, 0, 1),
|
||||
( "45", 7, 0, 1),
|
||||
( "46", 5, 0, 0),
|
||||
( "47", 6, 0, 0),
|
||||
( "48", 7, 0, 0),
|
||||
],
|
||||
"5k-uwg30": [
|
||||
( "A1", 19, 31, 1),
|
||||
( "A2", 19, 31, 0),
|
||||
|
|
@ -5522,6 +5753,23 @@ extra_cells_db = {
|
|||
"WEAK_PU_ENB": (25, 27, "lutff_5/in_0"),
|
||||
"PACKAGE_PIN": (19, 31, 1)
|
||||
}
|
||||
},
|
||||
|
||||
"u4k" : {
|
||||
("HFOSC", (0, 21, 1)) : {
|
||||
"CLKHFPU": (0, 19, "lutff_0/in_1"),
|
||||
"CLKHFEN": (0, 19, "lutff_7/in_3"),
|
||||
"CLKHF": (0, 19, "glb_netwk_4"),
|
||||
"CLKLF_FABRIC": (0, 18, "slf_op_7"),
|
||||
"CLKHF_DIV_1": (0, 16, "CBIT_4"),
|
||||
"CLKHF_DIV_0": (0, 16, "CBIT_3")
|
||||
},
|
||||
("LFOSC", (25, 21, 1)) : {
|
||||
"CLKLFPU": (25, 19, "lutff_0/in_1"),
|
||||
"CLKLFEN": (25, 19, "lutff_7/in_3"),
|
||||
"CLKLF": (25, 19, "glb_netwk_5"),
|
||||
"CLKLF_FABRIC": (25, 19, "slf_op_0")
|
||||
},
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -5547,6 +5795,10 @@ dsp1_5k_db.append([["B4[7]"], "IpConfig", "CBIT_5"])
|
|||
dsp2_5k_db = parse_db(iceboxdb.database_dsp2_5k_txt, "5k")
|
||||
dsp3_5k_db = parse_db(iceboxdb.database_dsp3_5k_txt, "5k")
|
||||
|
||||
dsp3_5k_db.append([["B2[7]"], "IpConfig", "CBIT_3"]) # for u4k HFOSC.CLKHF_DIV
|
||||
dsp3_5k_db.append([["B5[7]"], "IpConfig", "CBIT_4"])
|
||||
|
||||
|
||||
#Add missing LC_ bits to DSP and IPCon databases
|
||||
for db_to_fix in [ipcon_5k_db, dsp0_5k_db, dsp1_5k_db, dsp2_5k_db, dsp3_5k_db]:
|
||||
for entry in db_to_fix:
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@ import getopt, sys, re
|
|||
mode_384 = False
|
||||
mode_lm4k = False
|
||||
mode_5k = False
|
||||
mode_u4k = False
|
||||
mode_8k = False
|
||||
|
||||
def usage():
|
||||
|
|
@ -38,11 +39,14 @@ Usage: icebox_chipdb [options] [bitmap.asc]
|
|||
|
||||
-4
|
||||
create chipdb for lm4k device
|
||||
|
||||
-u
|
||||
create chipdb for u4k device
|
||||
""")
|
||||
sys.exit(0)
|
||||
|
||||
try:
|
||||
opts, args = getopt.getopt(sys.argv[1:], "3584")
|
||||
opts, args = getopt.getopt(sys.argv[1:], "3584u")
|
||||
except:
|
||||
usage()
|
||||
|
||||
|
|
@ -55,6 +59,8 @@ for o, a in opts:
|
|||
mode_384 = True
|
||||
elif o == "-4":
|
||||
mode_lm4k = True
|
||||
elif o == "-u":
|
||||
mode_u4k = True
|
||||
else:
|
||||
usage()
|
||||
|
||||
|
|
@ -67,6 +73,8 @@ elif mode_384:
|
|||
ic.setup_empty_384()
|
||||
elif mode_lm4k:
|
||||
ic.setup_empty_lm4k()
|
||||
elif mode_u4k:
|
||||
ic.setup_empty_u4k()
|
||||
else:
|
||||
ic.setup_empty_1k()
|
||||
|
||||
|
|
@ -254,7 +262,7 @@ for dsp_idx in range(4):
|
|||
for idx in sorted(ic.dsp_tiles[dsp_idx]):
|
||||
x, y = idx
|
||||
print(".dsp%d_tile %d %d" % (dsp_idx, x, y))
|
||||
print()
|
||||
print()
|
||||
|
||||
for idx in sorted(ic.ipcon_tiles):
|
||||
print(".ipcon_tile %d %d" % idx)
|
||||
|
|
@ -320,12 +328,12 @@ for dsploc in ic.dsp_tiles[0]:
|
|||
nets = ic.get_dsp_nets_db(x, y)
|
||||
for key in sorted(nets):
|
||||
print("%s %s" % (key, " ".join([str(k) for k in nets[key]])))
|
||||
|
||||
|
||||
cfg = ic.get_dsp_config_db(x, y)
|
||||
for key in sorted(cfg):
|
||||
print("%s %s" % (key, " ".join([str(k) for k in cfg[key]])))
|
||||
print()
|
||||
|
||||
|
||||
if ic.device in icebox.extra_cells_db:
|
||||
for cell in sorted(icebox.extra_cells_db[ic.device]):
|
||||
name, loc = cell
|
||||
|
|
@ -335,7 +343,7 @@ if ic.device in icebox.extra_cells_db:
|
|||
for key in sorted(cellinfo):
|
||||
print("%s %s" % (key, " ".join([str(k) for k in cellinfo[key]])))
|
||||
print()
|
||||
|
||||
|
||||
if ic.device in icebox.spram_db:
|
||||
for cell in sorted(icebox.spram_db[ic.device]):
|
||||
loc = cell
|
||||
|
|
@ -345,7 +353,7 @@ if ic.device in icebox.spram_db:
|
|||
for key in sorted(cellinfo):
|
||||
print("%s %s" % (key, " ".join([str(k) for k in cellinfo[key]])))
|
||||
print()
|
||||
|
||||
|
||||
print(".extra_bits")
|
||||
extra_bits = dict()
|
||||
for idx in sorted(ic.extra_bits_db()):
|
||||
|
|
|
|||
|
|
@ -325,7 +325,7 @@ for segs in sorted(ic.group_segments(extra_connections=extra_connections, extra_
|
|||
match = re.match("lutff_(\d+)/", s[2])
|
||||
if match:
|
||||
#IpCon and DSP tiles look like logic tiles, but aren't.
|
||||
if ic.device == "5k" and (s[0] == 0 or s[0] == ic.max_x):
|
||||
if ic.device in ["5k", "u4k"] and (s[0] == 0 or s[0] == ic.max_x):
|
||||
special_5k_queue.add((s[0], s[1]))
|
||||
else:
|
||||
luts_queue.add((s[0], s[1], int(match.group(1))))
|
||||
|
|
@ -743,7 +743,7 @@ for tile in ic.ramb_tiles:
|
|||
if len(wire_bits) > 1:
|
||||
return "{%s}" % ", ".join(wire_bits)
|
||||
return wire_bits[0]
|
||||
if get_ram_config('PowerUp') == (ic.device in ("8k", "5k")):
|
||||
if get_ram_config('PowerUp') == (ic.device in ("8k", "5k", "u4k")):
|
||||
if not strip_comments:
|
||||
text_func.append("// RAM TILE %d %d" % tile)
|
||||
text_func.append("SB_RAM40_4K%s%s #(" % ("NR" if negclk_rd else "", "NW" if negclk_wr else ""));
|
||||
|
|
|
|||
|
|
@ -13,6 +13,11 @@ ifeq ($(DEVICECLASS), 1k)
|
|||
DEVICE := hx1k-tq144
|
||||
endif
|
||||
|
||||
ifeq ($(DEVICECLASS), u4k)
|
||||
DEVICE := u4k-sg48
|
||||
RAM_SUFFIX := _8k
|
||||
endif
|
||||
|
||||
ifeq ($(DEVICECLASS), 5k)
|
||||
DEVICE := up5k-sg48
|
||||
RAM_SUFFIX := _8k
|
||||
|
|
@ -51,6 +56,10 @@ ifeq ($(DEVICECLASS),5k)
|
|||
TESTS += dsp
|
||||
TESTS += upip
|
||||
endif
|
||||
ifeq ($(DEVICECLASS),u4k)
|
||||
TESTS += dsp
|
||||
TESTS += uip
|
||||
endif
|
||||
database: bitdata_io.txt bitdata_logic.txt bitdata_ramb$(RAM_SUFFIX).txt bitdata_ramt$(RAM_SUFFIX).txt bitdata_dsp0_5k.txt bitdata_dsp1_5k.txt bitdata_dsp2_5k.txt bitdata_dsp3_5k.txt bitdata_ipcon_5k.txt
|
||||
ifneq ($(RAM_SUFFIX),)
|
||||
cp cached_ramb.txt bitdata_ramb.txt
|
||||
|
|
@ -87,6 +96,13 @@ ifeq ($(DEVICECLASS),5k)
|
|||
python3 timings.py -t timings_up5k.txt work_*/*.sdf > timings_up5k.new
|
||||
mv timings_up5k.new timings_up5k.txt
|
||||
else
|
||||
ifeq ($(DEVICECLASS),u4k)
|
||||
cp tmedges.txt tmedges.tmp
|
||||
set -e; for f in work_$(DEVICECLASS)_*/*.vsb; do echo $$f; sed '/defparam/d' < $$f > $$f.fixed; yosys -q -f verilog -s tmedges.ys $$f.fixed; python3 rename_dsps.py $$f; done
|
||||
sort -u tmedges.tmp > tmedges.txt && rm -f tmedges.tmp
|
||||
python3 timings.py -t timings_u4k.txt work_*/*.sdf > timings_u4k.new
|
||||
mv timings_u4k.new timings_u4k.txt
|
||||
else
|
||||
ifeq ($(DEVICECLASS),8k)
|
||||
cp tmedges.txt tmedges.tmp
|
||||
set -e; for f in work_$(DEVICECLASS)_*/*.vsb; do echo $$f; yosys -q -f verilog -s tmedges.ys $$f; done
|
||||
|
|
@ -113,6 +129,7 @@ else
|
|||
endif
|
||||
endif
|
||||
endif
|
||||
endif
|
||||
timings_html:
|
||||
python3 timings.py -h tmedges.txt -t timings_hx1k.txt -l "HX1K with default temp/volt settings" > timings_hx1k.html
|
||||
python3 timings.py -h tmedges.txt -t timings_hx8k.txt -l "HX8K with default temp/volt settings" > timings_hx8k.html
|
||||
|
|
@ -120,12 +137,13 @@ timings_html:
|
|||
python3 timings.py -h tmedges.txt -t timings_lp8k.txt -l "LP8K with default temp/volt settings" > timings_lp8k.html
|
||||
python3 timings.py -h tmedges.txt -t timings_lp384.txt -l "LP384 with default temp/volt settings" > timings_lp384.html
|
||||
python3 timings.py -h tmedges.txt -t timings_up5k.txt -l "UP5K with default temp/volt settings" > timings_up5k.html
|
||||
data_cached.txt: cached_io.txt cached_logic.txt cached_ramb$(RAM_SUFFIX).txt cached_ramt$(RAM_SUFFIX).txt cached_dsp0_5k.txt cached_dsp1_5k.txt cached_dsp2_5k.txt cached_dsp3_5k.txt cached_ipcon_5k.txt
|
||||
python3 timings.py -h tmedges.txt -t timings_u4k.txt -l "U4K with default temp/volt settings" > timings_u4k.html
|
||||
data_cached.txt: cached_io.txt cached_logic.txt cached_ramb$(RAM_SUFFIX).txt cached_ramt$(RAM_SUFFIX).txt cached_dsp0_5k.txt cached_dsp1_5k.txt cached_dsp2_5k.txt cached_dsp3_5k.txt cached_ipcon_5k.txt
|
||||
gawk '{ print "io", $$0; }' cached_io.txt > data_cached.new
|
||||
gawk '{ print "logic", $$0; }' cached_logic.txt >> data_cached.new
|
||||
gawk '{ print "ramb$(RAM_SUFFIX)", $$0; }' cached_ramb$(RAM_SUFFIX).txt >> data_cached.new
|
||||
gawk '{ print "ramt$(RAM_SUFFIX)", $$0; }' cached_ramt$(RAM_SUFFIX).txt >> data_cached.new
|
||||
|
||||
|
||||
gawk '{ print "dsp0_5k", $$0; }' cached_dsp0_5k.txt >> data_cached.new
|
||||
gawk '{ print "dsp1_5k", $$0; }' cached_dsp1_5k.txt >> data_cached.new
|
||||
gawk '{ print "dsp2_5k", $$0; }' cached_dsp2_5k.txt >> data_cached.new
|
||||
|
|
|
|||
|
|
@ -531,11 +531,16 @@
|
|||
(2 0) PLL config bit: CLOCK_T_0_3_IOLEFT_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_0_4_IOLEFT_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_0_5_IOLEFT_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_10_21_IOUP_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_10_31_IOUP_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_11_21_IOUP_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_11_31_IOUP_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_12_21_IOUP_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_12_31_IOUP_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_13_21_IOUP_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_13_31_IOUP_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_14_0_IODOWN_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_14_21_IOUP_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_14_31_IOUP_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_15_0_IODOWN_cf_bit_1
|
||||
(2 0) PLL config bit: CLOCK_T_16_0_IODOWN_cf_bit_1
|
||||
|
|
@ -553,11 +558,16 @@
|
|||
(2 2) PLL config bit: CLOCK_T_0_2_IOLEFT_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_0_3_IOLEFT_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_0_4_IOLEFT_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_10_21_IOUP_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_10_31_IOUP_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_11_21_IOUP_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_11_31_IOUP_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_12_21_IOUP_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_12_31_IOUP_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_13_21_IOUP_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_13_31_IOUP_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_14_0_IODOWN_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_14_21_IOUP_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_14_31_IOUP_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_15_0_IODOWN_cf_bit_4
|
||||
(2 2) PLL config bit: CLOCK_T_16_0_IODOWN_cf_bit_4
|
||||
|
|
@ -570,9 +580,13 @@
|
|||
(2 4) PLL config bit: CLOCK_T_0_2_IOLEFT_cf_bit_7
|
||||
(2 4) PLL config bit: CLOCK_T_0_3_IOLEFT_cf_bit_7
|
||||
(2 4) PLL config bit: CLOCK_T_0_4_IOLEFT_cf_bit_7
|
||||
(2 4) PLL config bit: CLOCK_T_10_21_IOUP_cf_bit_7
|
||||
(2 4) PLL config bit: CLOCK_T_10_31_IOUP_cf_bit_7
|
||||
(2 4) PLL config bit: CLOCK_T_11_21_IOUP_cf_bit_7
|
||||
(2 4) PLL config bit: CLOCK_T_11_31_IOUP_cf_bit_7
|
||||
(2 4) PLL config bit: CLOCK_T_12_21_IOUP_cf_bit_7
|
||||
(2 4) PLL config bit: CLOCK_T_12_31_IOUP_cf_bit_7
|
||||
(2 4) PLL config bit: CLOCK_T_13_21_IOUP_cf_bit_7
|
||||
(2 4) PLL config bit: CLOCK_T_13_31_IOUP_cf_bit_7
|
||||
(2 4) PLL config bit: CLOCK_T_14_0_IODOWN_cf_bit_7
|
||||
(2 4) PLL config bit: CLOCK_T_15_0_IODOWN_cf_bit_7
|
||||
|
|
@ -620,11 +634,16 @@
|
|||
(3 0) PLL config bit: CLOCK_T_0_2_IOLEFT_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_0_3_IOLEFT_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_0_4_IOLEFT_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_10_21_IOUP_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_10_31_IOUP_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_11_21_IOUP_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_11_31_IOUP_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_12_21_IOUP_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_12_31_IOUP_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_13_21_IOUP_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_13_31_IOUP_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_14_0_IODOWN_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_14_21_IOUP_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_14_31_IOUP_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_15_0_IODOWN_cf_bit_2
|
||||
(3 0) PLL config bit: CLOCK_T_16_0_IODOWN_cf_bit_2
|
||||
|
|
@ -674,11 +693,16 @@
|
|||
(3 2) PLL config bit: CLOCK_T_0_3_IOLEFT_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_0_4_IOLEFT_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_0_5_IOLEFT_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_10_21_IOUP_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_10_31_IOUP_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_11_21_IOUP_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_11_31_IOUP_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_12_21_IOUP_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_12_31_IOUP_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_13_21_IOUP_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_13_31_IOUP_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_14_0_IODOWN_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_14_21_IOUP_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_14_31_IOUP_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_15_0_IODOWN_cf_bit_5
|
||||
(3 2) PLL config bit: CLOCK_T_16_0_IODOWN_cf_bit_5
|
||||
|
|
@ -689,11 +713,16 @@
|
|||
(3 3) PLL config bit: CLOCK_T_0_3_IOLEFT_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_0_4_IOLEFT_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_0_5_IOLEFT_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_10_21_IOUP_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_10_31_IOUP_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_11_21_IOUP_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_11_31_IOUP_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_12_21_IOUP_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_12_31_IOUP_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_13_21_IOUP_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_13_31_IOUP_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_14_0_IODOWN_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_14_21_IOUP_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_14_31_IOUP_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_15_0_IODOWN_cf_bit_3
|
||||
(3 3) PLL config bit: CLOCK_T_16_0_IODOWN_cf_bit_3
|
||||
|
|
@ -703,8 +732,11 @@
|
|||
(3 4) PLL config bit: CLOCK_T_0_2_IOLEFT_cf_bit_8
|
||||
(3 4) PLL config bit: CLOCK_T_0_3_IOLEFT_cf_bit_8
|
||||
(3 4) PLL config bit: CLOCK_T_0_4_IOLEFT_cf_bit_8
|
||||
(3 4) PLL config bit: CLOCK_T_10_21_IOUP_cf_bit_8
|
||||
(3 4) PLL config bit: CLOCK_T_10_31_IOUP_cf_bit_8
|
||||
(3 4) PLL config bit: CLOCK_T_11_21_IOUP_cf_bit_8
|
||||
(3 4) PLL config bit: CLOCK_T_11_31_IOUP_cf_bit_8
|
||||
(3 4) PLL config bit: CLOCK_T_13_21_IOUP_cf_bit_8
|
||||
(3 4) PLL config bit: CLOCK_T_13_31_IOUP_cf_bit_8
|
||||
(3 4) PLL config bit: CLOCK_T_14_0_IODOWN_cf_bit_8
|
||||
(3 4) PLL config bit: CLOCK_T_15_0_IODOWN_cf_bit_8
|
||||
|
|
@ -713,9 +745,13 @@
|
|||
(3 5) PLL config bit: CLOCK_T_0_2_IOLEFT_cf_bit_6
|
||||
(3 5) PLL config bit: CLOCK_T_0_3_IOLEFT_cf_bit_6
|
||||
(3 5) PLL config bit: CLOCK_T_0_4_IOLEFT_cf_bit_6
|
||||
(3 5) PLL config bit: CLOCK_T_10_21_IOUP_cf_bit_6
|
||||
(3 5) PLL config bit: CLOCK_T_10_31_IOUP_cf_bit_6
|
||||
(3 5) PLL config bit: CLOCK_T_11_21_IOUP_cf_bit_6
|
||||
(3 5) PLL config bit: CLOCK_T_11_31_IOUP_cf_bit_6
|
||||
(3 5) PLL config bit: CLOCK_T_12_21_IOUP_cf_bit_6
|
||||
(3 5) PLL config bit: CLOCK_T_12_31_IOUP_cf_bit_6
|
||||
(3 5) PLL config bit: CLOCK_T_13_21_IOUP_cf_bit_6
|
||||
(3 5) PLL config bit: CLOCK_T_13_31_IOUP_cf_bit_6
|
||||
(3 5) PLL config bit: CLOCK_T_14_0_IODOWN_cf_bit_6
|
||||
(3 5) PLL config bit: CLOCK_T_15_0_IODOWN_cf_bit_6
|
||||
|
|
@ -755,9 +791,13 @@
|
|||
(3 7) PLL config bit: CLOCK_T_0_2_IOLEFT_cf_bit_9
|
||||
(3 7) PLL config bit: CLOCK_T_0_3_IOLEFT_cf_bit_9
|
||||
(3 7) PLL config bit: CLOCK_T_0_4_IOLEFT_cf_bit_9
|
||||
(3 7) PLL config bit: CLOCK_T_10_21_IOUP_cf_bit_9
|
||||
(3 7) PLL config bit: CLOCK_T_10_31_IOUP_cf_bit_9
|
||||
(3 7) PLL config bit: CLOCK_T_11_21_IOUP_cf_bit_9
|
||||
(3 7) PLL config bit: CLOCK_T_11_31_IOUP_cf_bit_9
|
||||
(3 7) PLL config bit: CLOCK_T_12_21_IOUP_cf_bit_9
|
||||
(3 7) PLL config bit: CLOCK_T_12_31_IOUP_cf_bit_9
|
||||
(3 7) PLL config bit: CLOCK_T_13_21_IOUP_cf_bit_9
|
||||
(3 7) PLL config bit: CLOCK_T_13_31_IOUP_cf_bit_9
|
||||
(3 7) PLL config bit: CLOCK_T_14_0_IODOWN_cf_bit_9
|
||||
(3 7) PLL config bit: CLOCK_T_15_0_IODOWN_cf_bit_9
|
||||
|
|
|
|||
|
|
@ -40,6 +40,9 @@ for filename in sys.argv[1:]:
|
|||
elif device_class == "5k" and line.startswith("IpCon"):
|
||||
cur_text_db = text_db.setdefault("ipcon_5k", set())
|
||||
ignore = False
|
||||
elif device_class == "u4k" and line.startswith("IpCon"):
|
||||
cur_text_db = text_db.setdefault("ipcon_u4k", set())
|
||||
ignore = False
|
||||
elif device_class == "5k" and line.startswith("DSP"):
|
||||
match = re.match(r"DSP_Tile_\d+_(\d+)", line)
|
||||
ypos = int(match.group(1))
|
||||
|
|
@ -55,9 +58,24 @@ for filename in sys.argv[1:]:
|
|||
assert dsp_idx != None
|
||||
cur_text_db = text_db.setdefault("dsp%d_5k" % dsp_idx, set())
|
||||
ignore = False
|
||||
elif device_class == "u4k" and line.startswith("DSP"):
|
||||
match = re.match(r"DSP_Tile_\d+_(\d+)", line)
|
||||
ypos = int(match.group(1))
|
||||
dsp_idx = None
|
||||
if ypos in [5, 13]:
|
||||
dsp_idx = 0
|
||||
if ypos in [6, 14]:
|
||||
dsp_idx = 1
|
||||
if ypos in [7, 15]:
|
||||
dsp_idx = 2
|
||||
if ypos in [8, 16]:
|
||||
dsp_idx = 3
|
||||
assert dsp_idx != None
|
||||
cur_text_db = text_db.setdefault("dsp%d_u4k" % dsp_idx, set())
|
||||
ignore = False
|
||||
elif not ignore:
|
||||
print("'" + line + "'")
|
||||
assert line.startswith(" ")
|
||||
assert line.startswith(" "), line
|
||||
cur_text_db.add(line)
|
||||
|
||||
def logic_op_prefix(match):
|
||||
|
|
|
|||
|
|
@ -97,6 +97,26 @@ elif device_class == "5k":
|
|||
#TODO(tannewt): Add 39, 40, 41 to this list. It causes placement failures for some reason.
|
||||
gpins = "20 35 37 44".split()
|
||||
led_pins = "39 40 41".split()
|
||||
|
||||
elif device_class == "u4k":
|
||||
num_ramb40 = 20
|
||||
num_iobanks = 2
|
||||
num_dsp = 4
|
||||
|
||||
#TODO(tannewt): Add 39, 40, 41 to this list. It causes placement failures for some reason.
|
||||
# Also add 14 15 16 17 which are constrained to SPI.
|
||||
#TODO(daveshah1): Add back I3C IO 23 which cause placement failures when assigned to
|
||||
#an SB_IO clk_in
|
||||
pins = """2 3 4 6 9 10 11 12
|
||||
13 18 19 20 21
|
||||
25 26 27 28 31 32 34 35 36
|
||||
37 38 42 43 44 45 46 47 48
|
||||
""".split()
|
||||
|
||||
#TODO(tannewt): Add 39, 40, 41 to this list. It causes placement failures for some reason.
|
||||
gpins = "20 35 37 44".split()
|
||||
led_pins = "39 40 41".split()
|
||||
|
||||
def output_makefile(working_dir, fuzzname):
|
||||
with open(working_dir + "/Makefile", "w") as f:
|
||||
print("all: %s" % " ".join(["%s_%02d.bin" % (fuzzname, i) for i in range(num)]), file=f)
|
||||
|
|
|
|||
|
|
@ -61,6 +61,11 @@ if [ "$1" == "-lm4k" ]; then
|
|||
shift
|
||||
fi
|
||||
|
||||
if [ "$1" == "-u4k" ]; then
|
||||
ICEDEV=u4k-sg48
|
||||
shift
|
||||
fi
|
||||
|
||||
set -ex
|
||||
set -- ${1%.v}
|
||||
icecubedir="${ICECUBEDIR:-/opt/lscc/iCEcube2.2015.08}"
|
||||
|
|
@ -228,6 +233,14 @@ case "${ICEDEV:-hx1k-tq144}" in
|
|||
iCEPACKAGE="SWG25TR"
|
||||
iCE40DEV="iCE40LM1K"
|
||||
;;
|
||||
u1k-sg48)
|
||||
iCEPACKAGE="SG48"
|
||||
iCE40DEV="iCE5LP1K"
|
||||
;;
|
||||
u4k-sg48)
|
||||
iCEPACKAGE="SG48"
|
||||
iCE40DEV="iCE5LP4K"
|
||||
;;
|
||||
*)
|
||||
echo "ERROR: Invalid \$ICEDEV device config '$ICEDEV'."
|
||||
exit 1
|
||||
|
|
@ -294,6 +307,16 @@ case "$iCE40DEV" in
|
|||
libfile="ice40LM4K.lib"
|
||||
devfile="ICE40R04.dev"
|
||||
;;
|
||||
iCE5LP1K)
|
||||
icetech="SBTiCE5LP"
|
||||
libfile="ice40TH4K.lib"
|
||||
devfile="ICE40T04.dev"
|
||||
;;
|
||||
iCE5LP4K)
|
||||
icetech="SBTiCE5LP"
|
||||
libfile="ice40TH4K.lib"
|
||||
devfile="ICE40T04.dev"
|
||||
;;
|
||||
esac
|
||||
|
||||
(
|
||||
|
|
@ -439,8 +462,8 @@ cat > foobar_sbt.project << EOT
|
|||
Implementations=foobar_Implmnt
|
||||
|
||||
[foobar_Implmnt]
|
||||
DeviceFamily=$( echo $iCE40DEV | sed -re 's,(HX|5K).*,,'; )
|
||||
Device=$( echo $iCE40DEV | sed -re 's,iCE40(UP)?,,'; )
|
||||
DeviceFamily=$( echo $iCE40DEV | sed -re 's,(HX|5K|(iCE5LP)).*,\2,'; )
|
||||
Device=$( echo $iCE40DEV | sed -re 's,(iCE40(UP|LP)?|iCE5LP),,'; )
|
||||
DevicePackage=$iCEPACKAGE
|
||||
Devicevoltage=1.14
|
||||
DevicevoltagePerformance=+/-5%(datasheet default)
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@ import os
|
|||
|
||||
device_class = os.getenv("ICEDEVICE")
|
||||
|
||||
assert device_class == "5k"
|
||||
assert device_class in ["5k", "u4k"]
|
||||
|
||||
working_dir = "work_%s_dsp" % (device_class, )
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,141 @@
|
|||
#!/usr/bin/env python3
|
||||
|
||||
from fuzzconfig import *
|
||||
import numpy as np
|
||||
import os
|
||||
|
||||
device_class = os.getenv("ICEDEVICE")
|
||||
|
||||
assert device_class == "u4k"
|
||||
|
||||
working_dir = "work_%s_uip" % (device_class, )
|
||||
|
||||
os.system("rm -rf " + working_dir)
|
||||
os.mkdir(working_dir)
|
||||
def randbin(n):
|
||||
return "".join([np.random.choice(["0", "1"]) for i in range(n)])
|
||||
for idx in range(num):
|
||||
with open(working_dir + "/uip_%02d.v" % idx, "w") as f:
|
||||
glbs = ["glb[%d]" % i for i in range(np.random.randint(6)+1)]
|
||||
|
||||
print("""
|
||||
module top (
|
||||
input [%d:0] glb_pins,
|
||||
input [%d:0] in_pins,
|
||||
output [15:0] out_pins,
|
||||
output [%d:0] led_pins
|
||||
);
|
||||
wire [%d:0] glb, glb_pins;
|
||||
SB_GB gbufs [%d:0] (
|
||||
.USER_SIGNAL_TO_GLOBAL_BUFFER(glb_pins),
|
||||
.GLOBAL_BUFFER_OUTPUT(glb)
|
||||
);
|
||||
""" % (len(glbs)-1, len(pins) - len(glbs) - 16 - 1, len(led_pins)-1, len(glbs)-1, len(glbs)-1), file=f)
|
||||
bits = ["in_pins[%d]" % (i % (len(pins) - len(glbs) - 16 - 1)) for i in range(60)]
|
||||
bits = list(np.random.permutation(bits))
|
||||
#Internal oscillators
|
||||
tmp = ["in_pins[%d]" % i for i in range(len(pins) - len(glbs) - 16 - 1)]
|
||||
tmp = list(np.random.permutation(tmp))
|
||||
for osc in ["LF", "HF"]:
|
||||
bit_pu = tmp.pop()
|
||||
bit_en = tmp.pop()
|
||||
bit_clk = "clk_" + osc
|
||||
glbs.append(bit_clk)
|
||||
param = ""
|
||||
if osc == "HF": #only HFOSC has a divider:
|
||||
param = "#(.CLKHF_DIV(\"0b%s\"))" % randbin(2)
|
||||
|
||||
route = np.random.choice(["", "/* synthesis ROUTE_THROUGH_FABRIC = 1 */"])
|
||||
|
||||
print("""
|
||||
SB_%sOSC %s osc_%s (
|
||||
.CLK%sPU(%s),
|
||||
.CLK%sEN(%s),
|
||||
.CLK%s(%s)
|
||||
) %s;
|
||||
""" % (
|
||||
osc, param, osc, osc, bit_pu,
|
||||
osc, bit_en, osc, bit_clk, route
|
||||
), file=f)
|
||||
glbs_orig = list(glbs)
|
||||
|
||||
# tmp = list(np.random.permutation(bits))
|
||||
# glbs = list(glbs_orig)
|
||||
|
||||
# bit_clk = np.random.choice([glbs.pop(), tmp.pop()])
|
||||
# bit_rst = np.random.choice([glbs.pop(), tmp.pop()])
|
||||
# bit_paramsok = tmp.pop()
|
||||
# bits_color = [tmp.pop() for k in range(4)]
|
||||
# bits_bright = [tmp.pop() for k in range(4)]
|
||||
# bits_ramp = [tmp.pop() for k in range(4)]
|
||||
# bits_rate = [tmp.pop() for k in range(4)]
|
||||
|
||||
# print("""
|
||||
# wire [2:0] pwm_out;
|
||||
# SB_RGB_IP rgb_ip (
|
||||
# .CLK(%s),
|
||||
# .RST(%s),
|
||||
# .PARAMSOK(%s),
|
||||
# .RGBCOLOR({%s,%s,%s,%s}),
|
||||
# .BRIGHTNESS({%s,%s,%s,%s}),
|
||||
# .BREATHRAMP({%s,%s,%s,%s}),
|
||||
# .BLINKRATE({%s,%s,%s,%s}),
|
||||
# .REDPWM(pwm_out[0]),
|
||||
# .GREENPWM(pwm_out[1]),
|
||||
# .BLUEPWM(pwm_out[2])
|
||||
# );
|
||||
# """ % (
|
||||
# bit_clk, bit_rst, bit_paramsok, *bits_color, *bits_bright, *bits_ramp, *bits_rate
|
||||
# ), file=f)
|
||||
|
||||
# bits.append("pwm_out[0]")
|
||||
# bits.append("pwm_out[1]")
|
||||
# bits.append("pwm_out[2]")
|
||||
|
||||
# current_choices = ["0b000000", "0b000001", "0b000011", "0b000111", "0b001111", "0b011111", "0b111111"]
|
||||
|
||||
# currents = [np.random.choice(current_choices) for i in range(3)]
|
||||
|
||||
# bit_curren = np.random.choice(bits)
|
||||
# bit_rgbleden = np.random.choice(bits)
|
||||
# bits_pwm = [np.random.choice([np.random.choice(bits), "pwm_out[%d]" % i]) for i in range(3)]
|
||||
|
||||
# print("""
|
||||
# wire rgbpu;
|
||||
# SB_LED_DRV_CUR led_drv_cur (
|
||||
# .EN(%s),
|
||||
# .LEDPU(rgbpu)
|
||||
# );
|
||||
|
||||
# SB_RGB_DRV #(
|
||||
# .RGB0_CURRENT(\"%s\"),
|
||||
# .RGB1_CURRENT(\"%s\"),
|
||||
# .RGB2_CURRENT(\"%s\")
|
||||
# ) rgb_drv (
|
||||
# .RGBLEDEN(%s),
|
||||
# .RGBPU(rgbpu),
|
||||
# .RGB0PWM(%s),
|
||||
# .RGB1PWM(%s),
|
||||
# .RGB2PWM(%s),
|
||||
# .RGB0(led_pins[0]),
|
||||
# .RGB1(led_pins[1]),
|
||||
# .RGB2(led_pins[2])
|
||||
# );
|
||||
# """ % (
|
||||
# bit_curren, currents[0], currents[1], currents[2],
|
||||
# bit_rgbleden, bits_pwm[0], bits_pwm[1], bits_pwm[2]
|
||||
# ), file = f)
|
||||
|
||||
# TODO: I2C and SPI
|
||||
|
||||
print("endmodule", file=f)
|
||||
with open(working_dir + "/uip_%02d.pcf" % idx, "w") as f:
|
||||
p = list(np.random.permutation(pins))
|
||||
for i in range(len(pins) - len(glbs) - 16):
|
||||
print("set_io in_pins[%d] %s" % (i, p.pop()), file=f)
|
||||
for i in range(16):
|
||||
print("set_io out_pins[%d] %s" % (i, p.pop()), file=f)
|
||||
# for i in range(len(led_pins)):
|
||||
# print("set_io led_pins[%d] %s" % (i, led_pins[i]), file=f)
|
||||
|
||||
output_makefile(working_dir, "uip")
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
#!/bin/bash
|
||||
|
||||
mkdir -p pinloc-u4k-sg48
|
||||
cd pinloc-u4k-sg48
|
||||
|
||||
pins="
|
||||
2 3 4 6 9 10 11 12
|
||||
13 14 15 16 17 18 19 20 21 23
|
||||
25 26 27 28 31 32 34 35 36
|
||||
37 38 42 43 44 45 46 47 48
|
||||
"
|
||||
|
||||
if [ $(echo $pins | wc -w) -ne 36 ]; then
|
||||
echo "Incorrect number of pins:" $(echo $pins | wc -w)
|
||||
exit 1
|
||||
fi
|
||||
|
||||
{
|
||||
echo -n "all:"
|
||||
for pin in $pins; do
|
||||
id="pinloc-u4k-sg48_${pin}"
|
||||
echo -n " ${id}.exp"
|
||||
done
|
||||
echo
|
||||
|
||||
for pin in $pins; do
|
||||
id="pinloc-u4k-sg48_${pin}"
|
||||
echo "module top(output y); assign y = 0; endmodule" > ${id}.v
|
||||
echo "set_io y ${pin}" >> ${id}.pcf
|
||||
echo; echo "${id}.exp:"
|
||||
echo " ICEDEV=u4k-sg48 bash ../../icecube.sh ${id} > ${id}.log 2>&1"
|
||||
echo " ../../../icebox/icebox_explain.py ${id}.asc > ${id}.exp.new"
|
||||
echo " ! grep '^Warning: pin' ${id}.log"
|
||||
echo " rm -rf ${id}.tmp"
|
||||
echo " mv ${id}.exp.new ${id}.exp"
|
||||
done
|
||||
} > pinloc-u4k-sg48.mk
|
||||
|
||||
set -ex
|
||||
make -f pinloc-u4k-sg48.mk -j4
|
||||
python3 ../pinlocdb.py pinloc-u4k-sg48_*.exp > ../pinloc-u4k-sg48.txt
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
#!/bin/bash
|
||||
|
||||
set -ex
|
||||
|
||||
mkdir -p colbuf_io_u4k.work
|
||||
cd colbuf_io_u4k.work
|
||||
|
||||
glb_pins="20 35 37 44"
|
||||
|
||||
pins="
|
||||
2 3 4 6 9 10 11 12
|
||||
13 18 19 20 21
|
||||
25 26 27 28 31 32 34 35 36
|
||||
37 38 42 43 44 45 46 47 48
|
||||
"
|
||||
pins="$( echo $pins )"
|
||||
|
||||
for pin in $pins; do
|
||||
pf="colbuf_io_u4k_$pin"
|
||||
gpin=$( echo $glb_pins | tr ' ' '\n' | grep -v $pin | sort -R | head -n1; )
|
||||
cat > ${pf}.v <<- EOT
|
||||
module top (input clk, data, output pin);
|
||||
wire gc;
|
||||
SB_GB_IO #(
|
||||
.PIN_TYPE(6'b 0000_00),
|
||||
.PULLUP(1'b0),
|
||||
.NEG_TRIGGER(1'b0),
|
||||
.IO_STANDARD("SB_LVCMOS")
|
||||
) gbuf (
|
||||
.PACKAGE_PIN(clk),
|
||||
.GLOBAL_BUFFER_OUTPUT(gc)
|
||||
);
|
||||
SB_IO #(
|
||||
.PIN_TYPE(6'b 0101_00)
|
||||
) pin_obuf (
|
||||
.PACKAGE_PIN(pin),
|
||||
.OUTPUT_CLK(gc),
|
||||
.D_OUT_0(data)
|
||||
);
|
||||
endmodule
|
||||
EOT
|
||||
echo "set_io pin $pin" > ${pf}.pcf
|
||||
echo "set_io clk $gpin" >> ${pf}.pcf
|
||||
ICEDEV=u4k-sg48 bash ../../icecube.sh ${pf}.v > ${pf}.log 2>&1
|
||||
../../../icebox/icebox_explain.py ${pf}.asc > ${pf}.exp
|
||||
rm -rf ${pf}.tmp
|
||||
done
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
#!/bin/bash
|
||||
|
||||
set -ex
|
||||
|
||||
mkdir -p colbuf_logic_u4k.work
|
||||
cd colbuf_logic_u4k.work
|
||||
|
||||
glb_pins="20 35 37 44"
|
||||
|
||||
for x in {1..5} {7..18} {20..24}; do
|
||||
for y in {1..20}; do
|
||||
pf="colbuf_logic_u4k_${x}_${y}"
|
||||
[ -f ${pf}.exp ] && continue
|
||||
gpin=$( echo $glb_pins | tr ' ' '\n' | sort -R | head -n1; )
|
||||
cat > ${pf}.v <<- EOT
|
||||
module top (input c, d, output q);
|
||||
SB_DFF dff (
|
||||
.C(c),
|
||||
.D(d),
|
||||
.Q(q)
|
||||
);
|
||||
endmodule
|
||||
EOT
|
||||
echo "set_location dff $x $y 0" > ${pf}.pcf
|
||||
echo "set_io c $gpin" >> ${pf}.pcf
|
||||
[ $x = 7 -a $y = 20 ] && continue
|
||||
ICEDEV=u4k-sg48 bash ../../icecube.sh ${pf}.v > ${pf}.log 2>&1
|
||||
../../../icebox/icebox_explain.py ${pf}.asc > ${pf}.exp
|
||||
rm -rf ${pf}.tmp
|
||||
done; done
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
#!/bin/bash
|
||||
|
||||
set -ex
|
||||
|
||||
mkdir -p colbuf_ram_u4k.work
|
||||
cd colbuf_ram_u4k.work
|
||||
|
||||
glb_pins="20 35 37 44"
|
||||
|
||||
for x in 6 19; do
|
||||
for y in {1..30}; do
|
||||
pf="colbuf_ram_u4k_${x}_${y}"
|
||||
gpin=$( echo $glb_pins | tr ' ' '\n' | sort -R | head -n1; )
|
||||
if [ $((y % 2)) == 1 ]; then
|
||||
clkport="WCLK"
|
||||
other_clkport="RCLK"
|
||||
else
|
||||
clkport="RCLK"
|
||||
other_clkport="WCLK"
|
||||
fi
|
||||
cat > ${pf}.v <<- EOT
|
||||
module top (input c, oc, input [1:0] d, output [1:0] q);
|
||||
wire gc;
|
||||
SB_GB_IO #(
|
||||
.PIN_TYPE(6'b 0000_00),
|
||||
.PULLUP(1'b0),
|
||||
.NEG_TRIGGER(1'b0),
|
||||
.IO_STANDARD("SB_LVCMOS")
|
||||
) gbuf (
|
||||
.PACKAGE_PIN(c),
|
||||
.GLOBAL_BUFFER_OUTPUT(gc)
|
||||
);
|
||||
SB_RAM40_4K #(
|
||||
.READ_MODE(3),
|
||||
.WRITE_MODE(3)
|
||||
) ram40 (
|
||||
.WADDR(11'b0),
|
||||
.RADDR(11'b0),
|
||||
.$clkport(gc),
|
||||
.$other_clkport(oc),
|
||||
.RDATA(q),
|
||||
.WDATA(d),
|
||||
.WE(1'b1),
|
||||
.WCLKE(1'b1),
|
||||
.RE(1'b1),
|
||||
.RCLKE(1'b1)
|
||||
);
|
||||
endmodule
|
||||
EOT
|
||||
echo "set_location ram40 $x $((y - (1 - y%2))) 0" > ${pf}.pcf
|
||||
echo "set_io oc 1" >> ${pf}.pcf
|
||||
echo "set_io c $gpin" >> ${pf}.pcf
|
||||
ICEDEV=u4k-sg48 bash ../../icecube.sh ${pf}.v > ${pf}.log 2>&1
|
||||
../../../icebox/icebox_explain.py ${pf}.asc > ${pf}.exp
|
||||
rm -rf ${pf}.tmp
|
||||
done; done
|
||||
|
|
@ -0,0 +1,51 @@
|
|||
#!/bin/bash
|
||||
|
||||
for f in colbuf_io_u4k.work/*.exp colbuf_logic_u4k.work/*.exp colbuf_ram_u4k.work/*.exp; do
|
||||
echo $f >&2
|
||||
python3 colbuf.py $f
|
||||
done | sort -u > colbuf_u4k.txt
|
||||
|
||||
get_colbuf_data()
|
||||
{
|
||||
tr -d '(,)' < colbuf_u4k.txt
|
||||
# for x in {0..2} {4..9} {11..13}; do
|
||||
# echo $x 4 $x 0
|
||||
# echo $x 5 $x 8
|
||||
# echo $x 12 $x 9
|
||||
# echo $x 13 $x 17
|
||||
# done
|
||||
# for x in 3 10; do
|
||||
# echo $x 3 $x 0
|
||||
# echo $x 3 $x 4
|
||||
# echo $x 5 $x 8
|
||||
# echo $x 11 $x 9
|
||||
# echo $x 11 $x 12
|
||||
# echo $x 13 $x 17
|
||||
# done
|
||||
}
|
||||
|
||||
{
|
||||
echo "<svg xmlns=\"http://www.w3.org/2000/svg\" height=\"1050\" width=\"1050\">"
|
||||
for x in {1..33}; do
|
||||
echo "<line x1=\"$((10+x*30))\" y1=\"10\" x2=\"$((10+x*30))\" y2=\"$((10+34*30))\" style=\"stroke:rgb(0,0,0);stroke-width:3\" />"
|
||||
done
|
||||
for y in {1..33}; do
|
||||
echo "<line x1=\"10\" y1=\"$((10+y*30))\" x2=\"$((10+34*30))\" y2=\"$((10+y*30))\" style=\"stroke:rgb(0,0,0);stroke-width:3\" />"
|
||||
done
|
||||
for x in {0..33}; do
|
||||
echo "<text x=\"$((10+$x*30+7))\" y=\"$((10+34*30+15))\" fill=\"black\">$x</text>"
|
||||
done
|
||||
for y in {0..33}; do
|
||||
echo "<text x=\"$((10+34*30+5))\" y=\"$((10+(33-y)*30+20))\" fill=\"black\">$y</text>"
|
||||
done
|
||||
while read x1 y1 x2 y2; do
|
||||
echo "<line x1=\"$((10+x1*30+15))\" y1=\"$((10+(33-y1)*30+15))\" x2=\"$((10+x2*30+15))\" y2=\"$((10+(33-y2)*30+15))\" style=\"stroke:rgb(255,0,0);stroke-width:5\" />"
|
||||
done < <( get_colbuf_data; )
|
||||
while read x1 y1 x2 y2; do
|
||||
echo "<circle cx=\"$((10+x2*30+15))\" cy=\"$((10+(33-y2)*30+15))\" r=\"4\" fill=\"blue\" />"
|
||||
done < <( get_colbuf_data; )
|
||||
while read x1 y1 x2 y2; do
|
||||
echo "<circle cx=\"$((10+x1*30+15))\" cy=\"$((10+(33-y1)*30+15))\" r=\"5\" fill=\"gray\" />"
|
||||
done < <( get_colbuf_data; )
|
||||
echo "</svg>"
|
||||
} > colbuf_u4k.svg
|
||||
|
|
@ -0,0 +1,85 @@
|
|||
#!/bin/bash
|
||||
|
||||
set -ex
|
||||
|
||||
mkdir -p glb_u4k.work
|
||||
cd glb_u4k.work
|
||||
|
||||
glb_pins="20 35 37 44"
|
||||
|
||||
for gpin in $glb_pins; do
|
||||
pf="glb_u4k_pin_$gpin"
|
||||
cat > ${pf}.v <<- EOT
|
||||
module top (input clk, data, output pin);
|
||||
wire gc;
|
||||
SB_GB_IO #(
|
||||
.PIN_TYPE(6'b 0000_00),
|
||||
.PULLUP(1'b0),
|
||||
.NEG_TRIGGER(1'b0),
|
||||
.IO_STANDARD("SB_LVCMOS")
|
||||
) gbuf (
|
||||
.PACKAGE_PIN(clk),
|
||||
.GLOBAL_BUFFER_OUTPUT(gc)
|
||||
);
|
||||
SB_IO #(
|
||||
.PIN_TYPE(6'b 0101_00)
|
||||
) pin_obuf (
|
||||
.PACKAGE_PIN(pin),
|
||||
.OUTPUT_CLK(gc),
|
||||
.D_OUT_0(data)
|
||||
);
|
||||
endmodule
|
||||
EOT
|
||||
echo "set_io clk $gpin" > ${pf}.pcf
|
||||
ICEDEV=u4k-sg48 bash ../../icecube.sh ${pf}.v > ${pf}.log 2>&1
|
||||
../../../icebox/icebox_explain.py ${pf}.asc > ${pf}.exp
|
||||
rm -rf ${pf}.tmp
|
||||
done
|
||||
|
||||
oscs="HF LF"
|
||||
|
||||
for osc in $oscs; do
|
||||
pf="glb_u4k_${osc}"
|
||||
cat > ${pf}.v <<- EOT
|
||||
module top (input data, output pin);
|
||||
wire clk;
|
||||
SB_${osc}OSC osc(
|
||||
.CLK${osc}PU(1'b1),
|
||||
.CLK${osc}EN(1'b1),
|
||||
.CLK${osc}(clk)
|
||||
);
|
||||
SB_IO #(
|
||||
.PIN_TYPE(6'b 0101_00)
|
||||
) pin_obuf (
|
||||
.PACKAGE_PIN(pin),
|
||||
.OUTPUT_CLK(clk),
|
||||
.D_OUT_0(data)
|
||||
);
|
||||
endmodule
|
||||
EOT
|
||||
ICEDEV=u4k-sg48 bash ../../icecube.sh ${pf}.v > ${pf}.log 2>&1
|
||||
../../../icebox/icebox_explain.py ${pf}.asc > ${pf}.exp
|
||||
rm -rf ${pf}.tmp
|
||||
done
|
||||
|
||||
pf="glb_u4k_gbufin"
|
||||
cat > ${pf}.v <<- EOT
|
||||
module top (input [7:0] clk, data, output [7:0] pin);
|
||||
wire [7:0] gc;
|
||||
SB_GB gbufin[7:0] (
|
||||
.USER_SIGNAL_TO_GLOBAL_BUFFER(clk),
|
||||
.GLOBAL_BUFFER_OUTPUT(gc)
|
||||
);
|
||||
SB_IO #(
|
||||
.PIN_TYPE(6'b 0101_00)
|
||||
) pin_obuf[7:0] (
|
||||
.PACKAGE_PIN(pin),
|
||||
.OUTPUT_CLK(gc),
|
||||
.D_OUT_0(data)
|
||||
);
|
||||
endmodule
|
||||
EOT
|
||||
# echo "set_io clk 10" > ${pf}.pcf
|
||||
ICEDEV=u4k-sg48 bash ../../icecube.sh ${pf}.v > ${pf}.log 2>&1
|
||||
../../../icebox/icebox_explain.py ${pf}.asc > ${pf}.exp
|
||||
rm -rf ${pf}.tmp
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
#!/bin/bash
|
||||
|
||||
set -ex
|
||||
|
||||
mkdir -p io_latched_u4k.work
|
||||
cd io_latched_u4k.work
|
||||
|
||||
pins="
|
||||
2 3 4 6 9 10 11 12
|
||||
13 18 19 20 21 23
|
||||
25 26 27 28 31 32 34 35 36
|
||||
37 38 42 43 44 45 46 47 48
|
||||
"
|
||||
pins="$( echo $pins )"
|
||||
|
||||
for pin in $pins ; do
|
||||
pf="io_latched_$pin"
|
||||
cp ../io_latched.v ${pf}.v
|
||||
read pin_latch pin_data < <( echo $pins | tr ' ' '\n' | grep -v $pin | sort -R; )
|
||||
{
|
||||
echo "set_io pin $pin"
|
||||
echo "set_io latch_in $pin_latch"
|
||||
echo "set_io data_out $pin_data"
|
||||
} > ${pf}.pcf
|
||||
ICEDEV=u4k-sg48 bash ../../icecube.sh ${pf}.v
|
||||
../../../icebox/icebox_vlog.py -SP ${pf}.psb ${pf}.asc > ${pf}.ve
|
||||
done
|
||||
|
|
@ -0,0 +1,75 @@
|
|||
#!/usr/bin/env python3
|
||||
|
||||
import os, sys
|
||||
|
||||
device = "u4k"
|
||||
|
||||
if not os.path.exists("./work_osc"):
|
||||
os.mkdir("./work_osc")
|
||||
|
||||
def run(route_fabric):
|
||||
name = "./work_osc/osc_cbit_fabric_%d" % route_fabric
|
||||
with open(name+'.v',"w") as f:
|
||||
print("""
|
||||
module top(
|
||||
input clkhfpu,
|
||||
input clkhfen,
|
||||
input clklfpu,
|
||||
input clklfen,
|
||||
output pin,
|
||||
output pin2,
|
||||
input data
|
||||
);
|
||||
|
||||
wire clkhf;
|
||||
SB_HFOSC #(
|
||||
.CLKHF_DIV("%s")
|
||||
) hfosc (
|
||||
.CLKHFPU(clkhfpu),
|
||||
.CLKHFEN(clkhfen),
|
||||
.CLKHF(clkhf)
|
||||
); /* synthesis ROUTE_THROUGH_FABRIC = %d */
|
||||
|
||||
SB_IO #(
|
||||
.PIN_TYPE(6'b 0101_00)
|
||||
) pin_obuf (
|
||||
.PACKAGE_PIN(pin),
|
||||
.OUTPUT_CLK(clkhf),
|
||||
.D_OUT_0(data)
|
||||
);
|
||||
|
||||
wire clklf;
|
||||
SB_LFOSC lfosc (
|
||||
.CLKLFPU(clklfpu),
|
||||
.CLKLFEN(clklfen),
|
||||
.CLKLF(clklf)
|
||||
); /* synthesis ROUTE_THROUGH_FABRIC = %d */
|
||||
|
||||
SB_IO #(
|
||||
.PIN_TYPE(6'b 0101_00)
|
||||
) pin2_obuf (
|
||||
.PACKAGE_PIN(pin2),
|
||||
.OUTPUT_CLK(clklf),
|
||||
.D_OUT_0(data)
|
||||
);
|
||||
|
||||
endmodule
|
||||
""" % (
|
||||
"0b11", route_fabric, route_fabric
|
||||
), file=f)
|
||||
|
||||
retval = os.system("bash ../../icecube.sh -" + device + " " + name+".v > ./work_osc/icecube.log 2>&1")
|
||||
if retval != 0:
|
||||
sys.stderr.write('ERROR: icecube returned non-zero error code\n')
|
||||
sys.exit(1)
|
||||
retval = os.system("../../../icebox/icebox_explain.py " + name+".asc > " + name+".exp")
|
||||
if retval != 0:
|
||||
sys.stderr.write('ERROR: icebox_explain returned non-zero error code\n')
|
||||
sys.exit(1)
|
||||
retval = os.system("../../../icebox/icebox_vlog.py " + name+".asc > " + name+".ve")
|
||||
if retval != 0:
|
||||
sys.stderr.write('ERROR: icebox_vlog returned non-zero error code\n')
|
||||
sys.exit(1)
|
||||
|
||||
run(0)
|
||||
run(1)
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -2936,6 +2936,7 @@ SB_MAC16_ADS_U_16P16_ALL_PIPELINE.O[16] Odrv4.I
|
|||
SB_MAC16_ADS_U_16P16_ALL_PIPELINE.O[17] LocalMux.I
|
||||
SB_MAC16_ADS_U_16P16_ALL_PIPELINE.O[17] Odrv12.I
|
||||
SB_MAC16_ADS_U_16P16_ALL_PIPELINE.O[17] Odrv4.I
|
||||
SB_MAC16_ADS_U_16P16_ALL_PIPELINE.O[18] LocalMux.I
|
||||
SB_MAC16_ADS_U_16P16_ALL_PIPELINE.O[18] Odrv12.I
|
||||
SB_MAC16_ADS_U_16P16_ALL_PIPELINE.O[18] Odrv4.I
|
||||
SB_MAC16_ADS_U_16P16_ALL_PIPELINE.O[19] LocalMux.I
|
||||
|
|
@ -4470,6 +4471,7 @@ SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[15] Odrv12.I
|
|||
SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[15] Odrv4.I
|
||||
SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[16] Odrv12.I
|
||||
SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[16] Odrv4.I
|
||||
SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[17] LocalMux.I
|
||||
SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[17] Odrv12.I
|
||||
SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[17] Odrv4.I
|
||||
SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[18] Odrv12.I
|
||||
|
|
@ -4484,6 +4486,7 @@ SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[20] Odrv12.I
|
|||
SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[20] Odrv4.I
|
||||
SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[21] Odrv12.I
|
||||
SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[21] Odrv4.I
|
||||
SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[22] LocalMux.I
|
||||
SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[22] Odrv12.I
|
||||
SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[22] Odrv4.I
|
||||
SB_MAC16_MUL_S_8X8_ALL_PIPELINE.O[23] Odrv12.I
|
||||
|
|
@ -4838,6 +4841,7 @@ SB_MAC16_MUL_U_16X16_IM_BYPASS.O[14] Odrv4.I
|
|||
SB_MAC16_MUL_U_16X16_IM_BYPASS.O[15] LocalMux.I
|
||||
SB_MAC16_MUL_U_16X16_IM_BYPASS.O[15] Odrv12.I
|
||||
SB_MAC16_MUL_U_16X16_IM_BYPASS.O[15] Odrv4.I
|
||||
SB_MAC16_MUL_U_16X16_IM_BYPASS.O[16] LocalMux.I
|
||||
SB_MAC16_MUL_U_16X16_IM_BYPASS.O[16] Odrv4.I
|
||||
SB_MAC16_MUL_U_16X16_IM_BYPASS.O[17] Odrv12.I
|
||||
SB_MAC16_MUL_U_16X16_IM_BYPASS.O[17] Odrv4.I
|
||||
|
|
@ -4880,6 +4884,7 @@ SB_MAC16_MUL_U_16X16_IM_BYPASS.O[4] LocalMux.I
|
|||
SB_MAC16_MUL_U_16X16_IM_BYPASS.O[4] Odrv12.I
|
||||
SB_MAC16_MUL_U_16X16_IM_BYPASS.O[4] Odrv4.I
|
||||
SB_MAC16_MUL_U_16X16_IM_BYPASS.O[5] LocalMux.I
|
||||
SB_MAC16_MUL_U_16X16_IM_BYPASS.O[5] Odrv12.I
|
||||
SB_MAC16_MUL_U_16X16_IM_BYPASS.O[5] Odrv4.I
|
||||
SB_MAC16_MUL_U_16X16_IM_BYPASS.O[6] LocalMux.I
|
||||
SB_MAC16_MUL_U_16X16_IM_BYPASS.O[6] Odrv12.I
|
||||
|
|
@ -5028,6 +5033,7 @@ SB_MAC16_MUL_U_8X8_BYPASS.O[19] Odrv4.I
|
|||
SB_MAC16_MUL_U_8X8_BYPASS.O[1] LocalMux.I
|
||||
SB_MAC16_MUL_U_8X8_BYPASS.O[1] Odrv12.I
|
||||
SB_MAC16_MUL_U_8X8_BYPASS.O[1] Odrv4.I
|
||||
SB_MAC16_MUL_U_8X8_BYPASS.O[20] LocalMux.I
|
||||
SB_MAC16_MUL_U_8X8_BYPASS.O[20] Odrv12.I
|
||||
SB_MAC16_MUL_U_8X8_BYPASS.O[20] Odrv4.I
|
||||
SB_MAC16_MUL_U_8X8_BYPASS.O[21] Odrv12.I
|
||||
|
|
@ -5036,6 +5042,7 @@ SB_MAC16_MUL_U_8X8_BYPASS.O[22] Odrv12.I
|
|||
SB_MAC16_MUL_U_8X8_BYPASS.O[22] Odrv4.I
|
||||
SB_MAC16_MUL_U_8X8_BYPASS.O[23] LocalMux.I
|
||||
SB_MAC16_MUL_U_8X8_BYPASS.O[23] Odrv4.I
|
||||
SB_MAC16_MUL_U_8X8_BYPASS.O[24] LocalMux.I
|
||||
SB_MAC16_MUL_U_8X8_BYPASS.O[24] Odrv12.I
|
||||
SB_MAC16_MUL_U_8X8_BYPASS.O[24] Odrv4.I
|
||||
SB_MAC16_MUL_U_8X8_BYPASS.O[25] Odrv12.I
|
||||
|
|
@ -5351,6 +5358,7 @@ Span12Mux_s11_v.O Span12Mux_s4_v.I
|
|||
Span12Mux_s11_v.O Span12Mux_s5_h.I
|
||||
Span12Mux_s11_v.O Span12Mux_s7_h.I
|
||||
Span12Mux_s11_v.O Span12Mux_s8_h.I
|
||||
Span12Mux_s11_v.O Span12Mux_s8_v.I
|
||||
Span12Mux_s11_v.O Span12Mux_s9_h.I
|
||||
Span12Mux_s11_v.O Span12Mux_v.I
|
||||
Span12Mux_s1_h.O LocalMux.I
|
||||
|
|
|
|||
Loading…
Reference in New Issue