mirror of https://github.com/YosysHQ/icestorm.git
Merge pull request #278 from davidthings/master
Add an option (-p) to icepll to force use of SB_PLL40_PAD
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commit
cb067cf394
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@ -48,6 +48,9 @@ void help(const char *cmd)
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printf(" -o <output_freq_mhz>\n");
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printf(" PLL Output Frequency (default: 60 MHz)\n");
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printf("\n");
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printf(" -p\n");
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printf(" Clock source is an input pad rather than FPGA routing\n");
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printf("\n");
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printf(" -S\n");
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printf(" Disable SIMPLE feedback path mode\n");
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printf("\n");
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@ -204,6 +207,7 @@ int main(int argc, char **argv)
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double f_pllin = 12;
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double f_pllout = 60;
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bool pad = false;
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bool simple_feedback = true;
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const char* filename = NULL;
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bool file_stdout = false;
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@ -214,7 +218,7 @@ int main(int argc, char **argv)
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bool quiet = false;
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int opt;
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while ((opt = getopt(argc, argv, "i:o:Smf:n:bB:q")) != -1)
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while ((opt = getopt(argc, argv, "i:o:pSmf:n:bB:q")) != -1)
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{
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switch (opt)
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{
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@ -224,6 +228,9 @@ int main(int argc, char **argv)
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case 'o':
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f_pllout = atof(optarg);
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break;
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case 'p':
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pad = true;
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break;
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case 'S':
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simple_feedback = false;
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break;
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@ -395,7 +402,7 @@ int main(int argc, char **argv)
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);
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// save iCE40 PLL tile configuration
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fprintf(f, "SB_PLL40_CORE #(\n");
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fprintf(f, "%s #(\n", (pad ? "SB_PLL40_PAD" : "SB_PLL40_CORE"));
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fprintf(f, "\t\t.FEEDBACK_PATH(\"%s\"),\n", (simple_feedback ? "SIMPLE" : "NON_SIMPLE"));
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fprintf(f, "\t\t.DIVR(4'b%s),\t\t" "// DIVR = %2d\n", binstr(best_divr, 4), best_divr);
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fprintf(f, "\t\t.DIVF(7'b%s),\t" "// DIVF = %2d\n", binstr(best_divf, 7), best_divf);
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@ -405,9 +412,9 @@ int main(int argc, char **argv)
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"\t\t.LOCK(locked),\n"
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"\t\t.RESETB(1'b1),\n"
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"\t\t.BYPASS(1'b0),\n"
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"\t\t.REFERENCECLK(clock_in),\n"
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"\t\t.%s(clock_in),\n"
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"\t\t.PLLOUTCORE(clock_out)\n"
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"\t\t);\n\n"
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"\t\t);\n\n", (pad ? "PACKAGEPIN":"REFERENCECLK")
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);
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fprintf(f, "endmodule\n");
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