mirror of https://github.com/YosysHQ/icestorm.git
Progress in icetime
This commit is contained in:
Clifford Wolf
parent
d193e581d0
commit
b862fd3f5f
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@ -17,13 +17,20 @@ uninstall:
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# View timing netlist:
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# yosys -qp 'read_verilog -lib cells.v; prep; show' test0_ref.v
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# yosys -qp 'read_verilog -lib cells.v; prep; show' test0_out.v
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test0 test1 test2 test3 test4 test5 test6 test7 test8 test9: icetime
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python3 mktest.py $@
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test -f $@_ref.v || python3 mktest.py $@
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./icetime -P tq144 -p $@.pcf $@.txt $@_out.v
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yosys $@.ys
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mktest: test0 test1 test2 test3 test4 test5 test6 test7 test8 test9
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run0 run1 run2 run3 run4 run5 run6 run7 run8 run9: icetime
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./icetime -P tq144 -p $(subst run,test,$@).pcf $(subst run,test,$@).txt $(subst run,test,$@)_out.v
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show0 show1 show2 show3 show4 show5 show6 show7 show8 show9:
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yosys -p ':equiv_purge; opt_clean -purge; show' $(subst show,test,$@).il
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test: test0 test1 test2 test3 test4 test5 test6 test7 test8 test9
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clean:
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rm -f icetime
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@ -423,14 +423,14 @@ std::string make_lc40(int x, int y, int z)
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return cell;
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netlist_cell_types[cell] = "LogicCell40";
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netlist_cells[cell]["carryin"] = "";
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netlist_cells[cell]["carryin"] = "gnd";
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netlist_cells[cell]["ce"] = "";
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netlist_cells[cell]["clk"] = "";
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netlist_cells[cell]["in0"] = "";
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netlist_cells[cell]["in1"] = "";
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netlist_cells[cell]["in2"] = "";
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netlist_cells[cell]["in3"] = "";
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netlist_cells[cell]["sr"] = "";
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netlist_cells[cell]["clk"] = "gnd";
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netlist_cells[cell]["in0"] = "gnd";
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netlist_cells[cell]["in1"] = "gnd";
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netlist_cells[cell]["in2"] = "gnd";
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netlist_cells[cell]["in3"] = "gnd";
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netlist_cells[cell]["sr"] = "gnd";
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netlist_cells[cell]["carryout"] = "";
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netlist_cells[cell]["lcout"] = "";
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netlist_cells[cell]["ltout"] = "";
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@ -653,15 +653,13 @@ struct make_interconn_worker_t
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if (trg.name.substr(0, 6) == "span4_" || trg.name.substr(0, 4) == "sp4_")
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{
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bool non_io = trg.name.substr(0, 4) == "sp4_";
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bool horiz_non_io = trg.name.substr(0, 6) == "sp4_h_";
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int count_length = -1;
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bool horiz = trg.name.substr(0, 6) == "sp4_h_";
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int count_length = 0;
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while (seg_parents.count(*cursor) && cursor->net == trg.net) {
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non_io = non_io || (cursor->name.substr(0, 4) == "sp4_");
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horiz_non_io = horiz_non_io || (cursor->name.substr(0, 6) == "sp4_h_");
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horiz = horiz || (cursor->name.substr(0, 6) == "sp4_h_");
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cursor = &seg_parents.at(*cursor);
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count_length++;
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// count_length++;
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}
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if (cursor->net == trg.net)
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@ -671,18 +669,39 @@ struct make_interconn_worker_t
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extra_vlog.push_back(stringf(" Sp12to4 conn_%d (.I(%s), .O(%s));\n",
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iconn_cell_cnt++, seg_name(*cursor).c_str(), seg_name(trg).c_str()));
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} else
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if (non_io) {
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extra_vlog.push_back(stringf(" Span4Mux_%c%d conn_%d (.I(%s), .O(%s));\n",
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horiz_non_io ? 'h' : 'v', count_length, iconn_cell_cnt++,
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seg_name(*cursor).c_str(), seg_name(trg).c_str()));
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} else {
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if (cursor->name.substr(0, 6) == "span4_") {
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extra_vlog.push_back(stringf(" IoSpan4Mux conn_%d (.I(%s), .O(%s));\n",
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iconn_cell_cnt++, seg_name(*cursor).c_str(), seg_name(trg).c_str()));
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} else {
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extra_vlog.push_back(stringf(" Span4Mux_%c%d conn_%d (.I(%s), .O(%s));\n",
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horiz ? 'h' : 'v', count_length, iconn_cell_cnt++,
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seg_name(*cursor).c_str(), seg_name(trg).c_str()));
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}
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goto continue_at_cursor;
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}
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if (trg.name.substr(0, 7) == "span12_" || trg.name.substr(0, 5) == "sp12_")
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{
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bool horiz = trg.name.substr(0, 7) == "sp12_h_";
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int count_length = 0;
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while (seg_parents.count(*cursor) && cursor->net == trg.net) {
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horiz = horiz || (cursor->name.substr(0, 7) == "sp12_h_");
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cursor = &seg_parents.at(*cursor);
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// count_length++;
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}
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if (cursor->net == trg.net)
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goto skip_to_cursor;
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extra_vlog.push_back(stringf(" Span12Mux_%c%d conn_%d (.I(%s), .O(%s));\n",
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horiz ? 'h' : 'v', count_length, iconn_cell_cnt++,
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seg_name(*cursor).c_str(), seg_name(trg).c_str()));
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goto continue_at_cursor;
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}
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// Default handler
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while (seg_parents.count(*cursor))
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@ -812,6 +831,10 @@ int main(int argc, char **argv)
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for (auto net : extra_wires)
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fprintf(fout, " wire %s;\n", net.c_str());
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fprintf(fout, " wire gnd, vcc;\n");
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fprintf(fout, " GND gnd_cell (.Y(gnd));\n");
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fprintf(fout, " VCC vcc_cell (.Y(vcc));\n");
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for (auto &str : extra_vlog)
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fprintf(fout, "%s", str.c_str());
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@ -32,9 +32,9 @@ with open("%s.ys" % sys.argv[1], "w") as f:
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print("hierarchy -top equiv", file=f)
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print("rename -hide w:N_*", file=f)
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print("equiv_struct", file=f)
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print("# equiv_purge", file=f)
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print("opt_clean -purge", file=f)
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print("show -format dot -prefix %s" % sys.argv[1], file=f)
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print("opt_clean", file=f)
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print("write_ilang %s.il" % sys.argv[1], file=f)
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print("equiv_status -assert", file=f)
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os.system("bash ../icefuzz/icecube.sh %s.v" % sys.argv[1])
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os.rename("%s.v" % sys.argv[1], "%s_in.v" % sys.argv[1])
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@ -44,46 +44,46 @@ with open("%s_ref.v" % sys.argv[1], "w") as f:
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if line.find("defparam") >= 0:
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continue
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line = line.replace(" Span4Mux_s0_h ", " Span4Mux_h0 ")
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line = line.replace(" Span4Mux_s1_h ", " Span4Mux_h1 ")
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line = line.replace(" Span4Mux_s2_h ", " Span4Mux_h2 ")
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line = line.replace(" Span4Mux_s3_h ", " Span4Mux_h3 ")
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line = line.replace(" Span4Mux_h ", " Span4Mux_h4 ")
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line = line.replace(" Span4Mux_s0_h ", " Span4Mux_h0 ") # " Span4Mux_h0 ")
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line = line.replace(" Span4Mux_s1_h ", " Span4Mux_h0 ") # " Span4Mux_h1 ")
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line = line.replace(" Span4Mux_s2_h ", " Span4Mux_h0 ") # " Span4Mux_h2 ")
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line = line.replace(" Span4Mux_s3_h ", " Span4Mux_h0 ") # " Span4Mux_h3 ")
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line = line.replace(" Span4Mux_h ", " Span4Mux_h0 ") # " Span4Mux_h4 ")
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line = line.replace(" Span4Mux_s0_v ", " Span4Mux_v0 ")
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line = line.replace(" Span4Mux_s1_v ", " Span4Mux_v1 ")
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line = line.replace(" Span4Mux_s2_v ", " Span4Mux_v2 ")
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line = line.replace(" Span4Mux_s3_v ", " Span4Mux_v3 ")
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line = line.replace(" Span4Mux_v ", " Span4Mux_v4 ")
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line = line.replace(" Span4Mux ", " Span4Mux_v4 ")
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line = line.replace(" Span4Mux_s0_v ", " Span4Mux_v0 ") # " Span4Mux_v0 ")
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line = line.replace(" Span4Mux_s1_v ", " Span4Mux_v0 ") # " Span4Mux_v1 ")
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line = line.replace(" Span4Mux_s2_v ", " Span4Mux_v0 ") # " Span4Mux_v2 ")
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line = line.replace(" Span4Mux_s3_v ", " Span4Mux_v0 ") # " Span4Mux_v3 ")
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line = line.replace(" Span4Mux_v ", " Span4Mux_v0 ") # " Span4Mux_v4 ")
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line = line.replace(" Span4Mux ", " Span4Mux_v0 ") # " Span4Mux_v4 ")
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line = line.replace(" Span12Mux_s0_h ", " Span12Mux_h0 ")
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line = line.replace(" Span12Mux_s1_h ", " Span12Mux_h1 ")
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line = line.replace(" Span12Mux_s2_h ", " Span12Mux_h2 ")
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line = line.replace(" Span12Mux_s3_h ", " Span12Mux_h3 ")
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line = line.replace(" Span12Mux_s4_h ", " Span12Mux_h4 ")
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line = line.replace(" Span12Mux_s5_h ", " Span12Mux_h5 ")
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line = line.replace(" Span12Mux_s6_h ", " Span12Mux_h6 ")
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line = line.replace(" Span12Mux_s7_h ", " Span12Mux_h7 ")
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line = line.replace(" Span12Mux_s8_h ", " Span12Mux_h8 ")
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line = line.replace(" Span12Mux_s9_h ", " Span12Mux_h9 ")
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line = line.replace(" Span12Mux_s10_h ", " Span12Mux_h10 ")
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line = line.replace(" Span12Mux_s11_h ", " Span12Mux_h11 ")
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line = line.replace(" Span12Mux ", " Span12Mux_h12 ")
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line = line.replace(" Span12Mux_s0_h ", " Span12Mux_h0 ") # " Span12Mux_h0 ")
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line = line.replace(" Span12Mux_s1_h ", " Span12Mux_h0 ") # " Span12Mux_h1 ")
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line = line.replace(" Span12Mux_s2_h ", " Span12Mux_h0 ") # " Span12Mux_h2 ")
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line = line.replace(" Span12Mux_s3_h ", " Span12Mux_h0 ") # " Span12Mux_h3 ")
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line = line.replace(" Span12Mux_s4_h ", " Span12Mux_h0 ") # " Span12Mux_h4 ")
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line = line.replace(" Span12Mux_s5_h ", " Span12Mux_h0 ") # " Span12Mux_h5 ")
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line = line.replace(" Span12Mux_s6_h ", " Span12Mux_h0 ") # " Span12Mux_h6 ")
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line = line.replace(" Span12Mux_s7_h ", " Span12Mux_h0 ") # " Span12Mux_h7 ")
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line = line.replace(" Span12Mux_s8_h ", " Span12Mux_h0 ") # " Span12Mux_h8 ")
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line = line.replace(" Span12Mux_s9_h ", " Span12Mux_h0 ") # " Span12Mux_h9 ")
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line = line.replace(" Span12Mux_s10_h ", " Span12Mux_h0 ") # " Span12Mux_h10 ")
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line = line.replace(" Span12Mux_s11_h ", " Span12Mux_h0 ") # " Span12Mux_h11 ")
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line = line.replace(" Span12Mux ", " Span12Mux_h0 ") # " Span12Mux_h12 ")
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line = line.replace(" Span12Mux_s0_v ", " Span12Mux_v0 ")
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line = line.replace(" Span12Mux_s1_v ", " Span12Mux_v1 ")
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line = line.replace(" Span12Mux_s2_v ", " Span12Mux_v2 ")
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line = line.replace(" Span12Mux_s3_v ", " Span12Mux_v3 ")
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line = line.replace(" Span12Mux_s4_v ", " Span12Mux_v4 ")
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line = line.replace(" Span12Mux_s5_v ", " Span12Mux_v5 ")
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line = line.replace(" Span12Mux_s6_v ", " Span12Mux_v6 ")
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line = line.replace(" Span12Mux_s7_v ", " Span12Mux_v7 ")
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line = line.replace(" Span12Mux_s8_v ", " Span12Mux_v8 ")
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line = line.replace(" Span12Mux_s9_v ", " Span12Mux_v9 ")
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line = line.replace(" Span12Mux_s10_v ", " Span12Mux_v10 ")
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line = line.replace(" Span12Mux_s11_v ", " Span12Mux_v11 ")
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line = line.replace(" Span12Mux_v ", " Span12Mux_v12 ")
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line = line.replace(" Span12Mux_s0_v ", " Span12Mux_v0 ") # " Span12Mux_v0 ")
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line = line.replace(" Span12Mux_s1_v ", " Span12Mux_v0 ") # " Span12Mux_v1 ")
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line = line.replace(" Span12Mux_s2_v ", " Span12Mux_v0 ") # " Span12Mux_v2 ")
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line = line.replace(" Span12Mux_s3_v ", " Span12Mux_v0 ") # " Span12Mux_v3 ")
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line = line.replace(" Span12Mux_s4_v ", " Span12Mux_v0 ") # " Span12Mux_v4 ")
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line = line.replace(" Span12Mux_s5_v ", " Span12Mux_v0 ") # " Span12Mux_v5 ")
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line = line.replace(" Span12Mux_s6_v ", " Span12Mux_v0 ") # " Span12Mux_v6 ")
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line = line.replace(" Span12Mux_s7_v ", " Span12Mux_v0 ") # " Span12Mux_v7 ")
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line = line.replace(" Span12Mux_s8_v ", " Span12Mux_v0 ") # " Span12Mux_v8 ")
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line = line.replace(" Span12Mux_s9_v ", " Span12Mux_v0 ") # " Span12Mux_v9 ")
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line = line.replace(" Span12Mux_s10_v ", " Span12Mux_v0 ") # " Span12Mux_v10 ")
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line = line.replace(" Span12Mux_s11_v ", " Span12Mux_v0 ") # " Span12Mux_v11 ")
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line = line.replace(" Span12Mux_v ", " Span12Mux_v0 ") # " Span12Mux_v12 ")
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f.write(line)
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