mirror of https://github.com/YosysHQ/icestorm.git
icenvcm: Program the iCE40 NVCM
icenvcm will write a bitstream into an iCE40 device with one-time-programmable non-volatile configuration memory (NVCM) and optionally set the security lock bits to prevent read out. This is a dangerous operation and can result in bricked devices. Since it is OTP, you must be sure that your design is good enough to permanently burn into the chip. It is still possible to use the iceprog -S to reconfigure the SRAM, although the FPGA will no longer boot from an attached SPI flash. Note that the NVCM requires a 2.5V power supply, which the Lattice devboard (and many other third party boards) do not include. A schematic is included for a ZIF programming jig to burn the chips before they are soldered to their final boards. Signed-off-by: Trammell Hudson <hudson@trmm.net> Co-authored-by: Matt Mets <matt@blinkinlabs.com> Co-authored-by: Peter Lawrence <12226419+majbthrd@users.noreply.github.com>
This commit is contained in:
Trammell Hudson
parent
83b8ef947f
commit
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Tool for writing the one time programmable non-volatile configuration memory
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in the iCE40up5k FPGA chips.
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**DANGER: this will probably brick your chip**
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* [Adafruit FTDI232H breakout board](https://www.adafruit.com/product/2264)
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* [QFN48 ZIF socket](https://nl.aliexpress.com/item/1005003023038405.html)
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* 1.2V regulator
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* 2.5V regulator
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* 2pc 10k resistor
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| Function | FTDI pin | FPGA pin |
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| -------- | -------- | -------- |
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| Clk | D0 | 15 |
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| DO | D1 | 14 |
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| DI | D2 | 17 |
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| CS | D4 | 16 |
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| Reset | D7 | 8 |
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| CDONE | D6 | 7 |
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## NVCM Commands
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These commands appear in the vendor tools.
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| Command | Out | Wait | In | Description |
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| --- | --- | --- | --- | --- |
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| 7eaa997e010e | 6 | 0 | 0 | Enter NVCM mode |
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| 02,addr,data | 12 | 0 | 0 | Write to register at specified address. Address is 3 bytes, data is 8 bytes |
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| 03,addr | 4 | 9 | n | Read from register at specified address. Address is 3 bytes, data is n bytes |
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| 04 | 1 | 0 | 0 | Program disable |
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| 05 | 1 | 0 | 1 | Read status register (Note: Guess that status register is 1 byte) |
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| 06 | 1 | 0 | 0 | Program enable |
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| 82000020,data | 12 | 0 | 0 | Write to trim register. For read: 00000000c4000000, For write: 0015f2f0c2000000 |
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| 83000025,bank | 5 | 0 | 0 | Bank select: NVCM:00, Trim:10:, Signature:20 |
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| 84000020 | 4 | 9 | 8 | Read RF (trim) register |
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Notes:
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* Commands 82, 83, 84 are likely single byte + address, but are only used with the above addresses.
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* Search for other commands has not been attempted.
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## Register maps
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These memory regions are accessed by the vendor tools
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### NVCM bank
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| Address Range | Description |
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| --- | --- |
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| 000000-? | Configuration bitstream. At least 104090 bytes long, possibly 104960 |
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When reading it appears as a normal linear array. When writing the address
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range is with 328 bytes per 4K page: `int(addr / 328) * 4096 + (addr % 328)`.
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Only the non-zero blocks of 8-bytes are written.
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Until the chip is locked, the NVCM data can be read back and appears to
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be identical to the bitstream. It can also be written multiple times
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while unlocked, with NAND semantics (default values are 0, bits can only
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be set, not cleared).
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### Trim bank
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| Address Range | Description |
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| --- | --- |
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| 000020-000027 | Trim row 1. Set to: 0015f2f1c4000000. Byte 0 is read to determine if NVCM is programmed. This whole register is checked to see if trim was programmed properly. |
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| 000060-000067 | Trim row 2 |
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| 0000a0-0000a7 | Trim row 3 |
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| 0000e0-0000e7 | Trim row 4 |
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Notes:
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* Programming all four trim registers with `0015f2f1c4000000` will cause the device to boot from NVCM (maybe)
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* Programming all for trim registers with `3000000100000000` will set the NVCM security bit (maybe)
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* The trim registers have NAND semantics, so bits can only be set, never unset
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### Signature bank
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| Address Range | Description |
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| --- | --- |
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| 000000-000007 | Signature bits (lower 8 bytes) |
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| 000008-00000F | Signature bits (upper 8 bytes) |
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Notes:
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* The byte at address 000000 contains the chip ID, and is programmed at the factory. 0x20 identifies the device is ICE40UP5K. Other device values are listed but untested.
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* The vendor tool writes configuration data (programmer revision, build, date), along with a CRC. It's unclear if the chip can access this data. This tool does not write those values.
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#!/usr/bin/env python3
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#
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# Copyright (C) 2021
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#
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# * Trammell Hudson <hudson@trmm.net>
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# * Matthew Mets https://github.com/cibomahto
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# * Peter Lawrence https://github.com/majbthrd
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#
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# Permission to use, copy, modify, and/or distribute this software for any
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# purpose with or without fee is hereby granted, provided that the above
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# copyright notice and this permission notice appear in all copies.
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#
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# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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#
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from pyftdi.spi import SpiController
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from binascii import unhexlify, hexlify
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import sys
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from time import sleep
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import re
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import os
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debug = False
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# todo: add expected bitstream sizes
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nvcm_id_table = {
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0x06: "ICE40LP8K / ICE40HX8K",
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0x07: "ICE40LP4K / ICE40HX4K",
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0x08: "ICE40LP1K / ICE40HX1K",
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0x09: "ICE40LP384",
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0x0E: "ICE40LP1K_SWG16",
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0x0F: "ICE40LP640_SWG16",
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0x10: "ICE5LP1K",
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0x11: "ICE5LP2K",
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0x12: "ICE5LP4K",
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0x14: "ICE40UL1K",
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0x15: "ICE40UL640",
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0x20: "ICE40UP5K",
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0x21: "ICE40UP3K",
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}
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def die(s):
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print(s, file=sys.stderr)
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exit(1)
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def enable(cs,reset=1):
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gpio.write(cs << cs_pin | reset << reset_pin)
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def sendhex(s):
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if debug and not s == "0500":
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print("TX", s)
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x = bytes.fromhex(s)
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b = dev.exchange(x, duplex=True, readlen=len(x))
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if debug and not s == "0500":
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print("RX", b.hex())
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return int.from_bytes(b, byteorder='big')
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def delay(count):
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# run the clock with no CS asserted
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dev.exchange(b'\x00', duplex=True, readlen=count)
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#sleep(0.1)
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def tck(count,dly=0):
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delay(count >> 3)
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delay(count >> 3)
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delay(count >> 3)
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delay(count >> 3)
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delay(count >> 3)
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delay(count >> 3)
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def init():
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if debug:
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print("init")
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enable(1, 1)
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enable(1, 0) # reset high
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sleep(0.15)
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enable(0, 0) # enable and reset high
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sleep(0.12)
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enable(0, 1) # enable low, reset high
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sleep(0.12)
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enable(1, 1) # enable and reset low
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sleep(0.12)
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return True
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def status_wait(count=1000):
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for i in range(0,count):
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tck(5000)
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enable(0)
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x = sendhex("0500")
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enable(1)
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#print("x=%04x" %(x))
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if (x & 0x00c1) == 0:
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return True
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print("status failed to clear", file=sys.stdout)
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return False
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def nvcm_command(cmd):
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enable(0)
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sendhex(cmd)
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enable(1)
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if not status_wait():
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return False
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tck(8)
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return True
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def nvcm_pgm_enable():
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return nvcm_command("06")
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def nvcm_pgm_disable():
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return nvcm_command("04")
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def nvcm_enable_access():
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# ! Shift in Access-NVCM instruction;
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# SMCInstruction[1] = 0x70807E99557E;
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return nvcm_command("7eaa997e010e")
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# Returns a big integer
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def nvcm_read(address, length=8, cmd=0x03):
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enable(0)
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sendhex("%02x%06x" % (cmd, address))
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sendhex("00" * 9) # dummy bytes
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x = 0
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for i in range(0,length):
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x = x << 8 | sendhex("00")
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enable(1)
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return x
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# Returns a byte array of the contents
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def nvcm_read_bytes(address, length=8):
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return nvcm_read(address, length).to_bytes(length, byteorder="big")
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def nvcm_write(address, data, cmd=0x02):
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enable(0)
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sendhex("%02x%06x" % (cmd, address))
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sendhex(data)
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enable(1)
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if not status_wait():
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print("WRITE FAILED: cmd=%02x address=%06x data=%s" % (cmd, address, data.hex()), file=sys.stderr)
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return False
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tck(8)
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return True
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def nvcm_bank_select(bank):
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return nvcm_write(cmd=0x83, address=0x000025, data="%02x" % (bank))
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def nvcm_select_nvcm():
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# ! Shift in Restore Access-NVCM instruction;
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# SDR 40 TDI(0x00A40000C1);
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return nvcm_bank_select(0x00)
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def nvcm_select_trim():
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# ! Shift in Trim setup-NVCM instruction;
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# SDR 40 TDI(0x08A40000C1);
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return nvcm_bank_select(0x10)
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def nvcm_select_sig():
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# ! Shift in Access Silicon Signature instruction;
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# IDInstruction[1] = 0x04A40000C1;
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# SDR 40 TDI(IDInstruction[1]);
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return nvcm_bank_select(0x20)
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def nvcm_read_trim():
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# ! Shift in Access-NVCM instruction;
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# SMCInstruction[1] = 0x70807E99557E;
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if not nvcm_enable_access():
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return
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# ! Shift in READ_RF(0x84) instruction;
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# SDR 104 TDI(0x00000000000000000004000021);
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x = nvcm_read(cmd=0x84, address=0x000020, length=8)
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tck(8)
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#print("FSM Trim Register %x" % (x))
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nvcm_select_nvcm()
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return x
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def nvcm_write_trim(data):
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# ! Setup Programming Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000430F4FA80004000041;
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return nvcm_write(cmd=0x82, address=0x000020, data=data)
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def nvcm_enable():
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if debug:
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print("nvcm_enable")
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# ! Shift in Access-NVCM instruction;
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# SMCInstruction[1] = 0x70807E99557E;
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if not nvcm_enable_access():
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return
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# ! Setup Reading Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000230000000004000041;
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if debug:
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print("setup_nvcm")
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return nvcm_write_trim("00000000c4000000")
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def nvcm_enable_trim():
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# ! Setup Programming Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000430F4FA80004000041;
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return nvcm_write_trim("0015f2f0c2000000")
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def nvcm_disable():
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if not nvcm_select_nvcm():
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return
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reset(1)
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tck(8, 1)
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rest(0)
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tck(8, 2000)
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def nvcm_trim_blank_check():
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print ("NVCM Trim_Parameter_OTP blank check");
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if not nvcm_select_trim():
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return
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x = nvcm_read(0x000020, 1)
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nvcm_select_nvcm()
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if x != 0:
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die ("NVCM Trim_Parameter_OTP Block is not blank. (%02x)" % x);
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return True
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def nvcm_blank_check(total_fuse):
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nvcm_select_nvcm()
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status = True
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print ("NVCM main memory blank check");
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contents = nvcm_read_bytes(0x000000, total_fuse)
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for i in range(0,total_fuse):
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x = contents[i]
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if debug:
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print("%08x: %02x" % (i, x))
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if x != 0:
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print ("%08x: NVCM Main Memory Block is not blank." % (i), file=sys.stderr)
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status = False
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#break
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nvcm_select_nvcm()
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return status
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def nvcm_program(rows):
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nvcm_select_nvcm()
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if not nvcm_enable_trim():
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return False
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print ("NVCM Program main memory")
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if not nvcm_pgm_enable():
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return false
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status = True
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i = 0
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for row in rows:
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if i % 1024 == 0:
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print("%6d / %6d bytes" % (i, len(rows) * 8))
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i += 8
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if not nvcm_command(row):
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status = False
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break
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nvcm_pgm_disable()
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if not status:
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print("PROGRAMMING FAILED", file=sys.stderr)
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return status
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def nvcm_write_trim_pages(lock_bits):
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if not nvcm_select_nvcm():
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die("select trim failed")
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if not nvcm_enable_trim():
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die("write trim command failed")
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if not nvcm_select_trim():
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die("select trim failed")
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if not nvcm_pgm_enable():
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die("write enable failed")
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# ! Program Security Bit row 1;
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# ! Shift in PAGEPGM instruction;
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# SDR 96 TDI(0x000000008000000C04000040);
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# ! Program Security Bit row 2;
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# SDR 96 TDI(0x000000008000000C06000040);
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# ! Program Security Bit row 3;
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# SDR 96 TDI(0x000000008000000C05000040);
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# ! Program Security Bit row 4;
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# SDR 96 TDI(0x00000000800000C07000040);
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if not nvcm_write(0x000020, lock_bits):
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die("trim write 0x20 failed")
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if not nvcm_write(0x000060, lock_bits):
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die("trim write 0x60 failed")
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if not nvcm_write(0x0000a0, lock_bits):
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die("trim write 0xa0 failed")
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if not nvcm_write(0x0000e0, lock_bits):
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die("trim write 0xe0 failed")
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nvcm_pgm_disable()
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# verify a read back
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x = nvcm_read(0x000020, 8)
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nvcm_select_nvcm()
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lock_bits = int(lock_bits,16)
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if x & lock_bits != lock_bits:
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die("Failed to write trim lock bits: %016x != expected %016x" % (x,lock_bits))
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print("New state %016x" % (x))
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return True
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def nvcm_trim_secure():
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print ("NVCM Secure")
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trim = nvcm_read_trim()
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if (trim >> 60) & 0x3 != 0:
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print("NVCM already secure? trim=%016x" % (trim), file=sys.stderr)
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return nvcm_write_trim_pages("3000000100000000")
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def nvcm_trim_program():
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print ("NVCM Program Trim_Parameter_OTP");
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return nvcm_write_trim_pages("0015f2f1c4000000")
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def nvcm_info():
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nvcm_select_sig()
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sig1 = nvcm_read(0x000000, 8)
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nvcm_select_sig()
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sig2 = nvcm_read(0x000008, 8)
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# have to switch back to nvcm bank before switching to trim?
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nvcm_select_nvcm()
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trim = nvcm_read_trim()
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nvcm_select_nvcm()
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nvcm_select_trim()
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trim0 = nvcm_read(0x000020, 8)
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nvcm_select_trim()
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trim1 = nvcm_read(0x000060, 8)
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nvcm_select_trim()
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trim2 = nvcm_read(0x0000a0, 8)
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nvcm_select_trim()
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trim3 = nvcm_read(0x0000e0, 8)
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nvcm_select_nvcm()
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secured = ((trim >> 60) & 0x3)
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device_id = (sig1 >> 56) & 0xFF
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print("Device: %s (%02x) secure=%d" % (
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nvcm_id_table.get(device_id, "Unknown"),
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device_id,
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secured
|
||||
))
|
||||
print("Sig 0: %016x" % (sig1))
|
||||
print("Sig 1: %016x" % (sig2))
|
||||
|
||||
|
||||
print("TrimRF: %016x" % (trim))
|
||||
print("Trim 0: %016x" % (trim0))
|
||||
print("Trim 1: %016x" % (trim1))
|
||||
print("Trim 2: %016x" % (trim2))
|
||||
print("Trim 3: %016x" % (trim3))
|
||||
|
||||
return True
|
||||
|
||||
def nvcm_read_file(filename):
|
||||
nvcm_select_nvcm()
|
||||
|
||||
total_fuse = 104090
|
||||
|
||||
contents = b''
|
||||
|
||||
for offset in range(0,total_fuse,8):
|
||||
if offset % 1024 == 0:
|
||||
print("%6d / %6d bytes" % (offset, total_fuse))
|
||||
contents += nvcm_read_bytes(offset, 8)
|
||||
|
||||
if filename == '-':
|
||||
with os.fdopen(sys.stdout.fileno(), "wb", closefd=False) as f:
|
||||
f.write(contents)
|
||||
f.flush()
|
||||
else:
|
||||
with open(filename, "wb") as f:
|
||||
f.write(contents)
|
||||
f.flush()
|
||||
|
||||
|
||||
#
|
||||
# bistream to NVCM command conversion is based on majbthrd's work in
|
||||
# https://github.com/YosysHQ/icestorm/pull/272
|
||||
#
|
||||
def bitstream2nvcm(bitstream):
|
||||
# ensure that the file starts with the correct bistream preamble
|
||||
for origin in range(0,len(bitstream)):
|
||||
if bitstream[origin:origin+4] == bytes.fromhex('7EAA997E'):
|
||||
break
|
||||
|
||||
if origin == len(bitstream):
|
||||
print("Preamble not found", file=sys.stderr)
|
||||
return False
|
||||
|
||||
print("Found preamable at %08x" % (origin), file=sys.stderr)
|
||||
|
||||
# there might be stuff in the header with vendor tools,
|
||||
# but not usually in icepack produced output, so ignore it for now
|
||||
|
||||
# todo: what is the correct size?
|
||||
|
||||
rows = []
|
||||
|
||||
for pos in range(origin, len(bitstream), 8):
|
||||
row = bitstream[pos:pos+8]
|
||||
|
||||
# pad out to 8-bytes
|
||||
row += b'\0' * (8 - len(row))
|
||||
|
||||
if row == bytes(8):
|
||||
# skip any all-zero entries in the bistream
|
||||
continue
|
||||
|
||||
# NVCM addressing is very weird
|
||||
addr = pos - origin
|
||||
nvcm_addr = int(addr / 328) * 4096 + (addr % 328)
|
||||
rows += [ "02 %06x %s" % (nvcm_addr, row.hex()) ]
|
||||
|
||||
return rows
|
||||
|
||||
|
||||
if __name__ == "__main__":
|
||||
|
||||
import argparse
|
||||
|
||||
parser = argparse.ArgumentParser()
|
||||
|
||||
parser.add_argument( '--port',
|
||||
type=str,
|
||||
default='ftdi://::/1',
|
||||
help='FTDI port of the form ftdi://::/1')
|
||||
|
||||
parser.add_argument( '-v', '--verbose',
|
||||
dest='verbose',
|
||||
action='store_true',
|
||||
help='Show debug information and serial read/writes')
|
||||
|
||||
parser.add_argument('-b', '--boot',
|
||||
dest='do_boot',
|
||||
action='store_true',
|
||||
help='Deassert the reset line to allow the FPGA to boot')
|
||||
|
||||
parser.add_argument('-i', '--info',
|
||||
dest='read_info',
|
||||
action='store_true',
|
||||
help='Read chip ID, trim and other info')
|
||||
|
||||
parser.add_argument('--read',
|
||||
dest='read_file',
|
||||
type=str,
|
||||
default=None,
|
||||
help='Read contents of NVCM')
|
||||
|
||||
parser.add_argument('--write',
|
||||
dest='write_file',
|
||||
type=str,
|
||||
default=None,
|
||||
help='bitstream file to write to NVCM (warning: not reversable!)')
|
||||
|
||||
parser.add_argument('--ignore-blank',
|
||||
dest='ignore_blank',
|
||||
action='store_true',
|
||||
help='Proceed even if the chip is not blank')
|
||||
|
||||
parser.add_argument('--secure',
|
||||
dest='set_secure',
|
||||
action='store_true',
|
||||
help='Set security bits to prevent modification (warning: not reversable!')
|
||||
|
||||
parser.add_argument('--my-design-is-good-enough',
|
||||
dest='good_enough',
|
||||
action='store_true',
|
||||
help='Enable the dangerous commands --write and --secure')
|
||||
|
||||
args = parser.parse_args()
|
||||
|
||||
debug = args.verbose
|
||||
|
||||
if not args.good_enough \
|
||||
and (args.write_file or args.set_secure):
|
||||
print("Are you sure your design is good enough?", file=sys.stderr)
|
||||
exit(1)
|
||||
|
||||
# Instantiate a SPI controller, with separately managed CS line
|
||||
spi = SpiController()
|
||||
|
||||
# Configure the first interface (IF/1) of the FTDI device as a SPI controller
|
||||
spi.configure(args.port)
|
||||
|
||||
# Get a port to a SPI device w/ /CS on A*BUS3 and SPI mode 0 @ 12MHz
|
||||
# the CS line is not used in this case
|
||||
dev = spi.get_port(cs=0, freq=12E6, mode=0)
|
||||
|
||||
reset_pin = 7
|
||||
cs_pin = 4
|
||||
|
||||
# Get GPIO port to manage the CS and RESET pins
|
||||
gpio = spi.get_gpio()
|
||||
gpio.set_direction(1 << reset_pin | 1 << cs_pin, 1 << reset_pin | 1 << cs_pin)
|
||||
|
||||
## Request the JEDEC ID from the SPI device
|
||||
#jedec_id = dev.exchange([0x9f], 3)
|
||||
|
||||
|
||||
enable(1, 0) # enable and reset high
|
||||
sleep(0.2)
|
||||
enable(1, 1) # enable low, reset high
|
||||
|
||||
init() or exit(1)
|
||||
nvcm_enable() or exit(1)
|
||||
|
||||
if args.read_info:
|
||||
nvcm_info() or exit(1)
|
||||
|
||||
if args.write_file:
|
||||
with open(args.write_file, "rb") as f:
|
||||
bitstream = f.read()
|
||||
print("read %d bytes" % (len(bitstream)))
|
||||
cmds = bitstream2nvcm(bitstream)
|
||||
if not cmds:
|
||||
exit(1)
|
||||
|
||||
if not args.ignore_blank:
|
||||
nvcm_trim_blank_check() or exit(1)
|
||||
# how much should we check?
|
||||
nvcm_blank_check(0x100) or exit(1)
|
||||
|
||||
# this is it!
|
||||
nvcm_program(cmds) or exit(1)
|
||||
|
||||
# update the trim to boot from nvcm
|
||||
nvcm_trim_program() or exit(1)
|
||||
|
||||
if args.read_file:
|
||||
# read back after writing to the NVCM
|
||||
nvcm_read_file(args.read_file) or exit(1)
|
||||
|
||||
if args.set_secure:
|
||||
nvcm_trim_secure() or exit(1)
|
||||
|
||||
if args.do_boot:
|
||||
# hold reset low for half a second
|
||||
enable(1,0)
|
||||
sleep(0.5)
|
||||
enable(1,1)
|
||||
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|
After Width: | Height: | Size: 228 KiB |
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|
After Width: | Height: | Size: 171 KiB |
Loading…
Reference in New Issue