mirror of https://github.com/YosysHQ/icestorm.git
Figure out DSP config bits for all locs
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David Shah
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@ -109,9 +109,48 @@ A work-in-progress effort to determine where signals and configuration bits are
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to DSP1 <span style="font-family:monospace">CBIT[7:0]</span>, <span style="font-family:monospace">CBIT[23:16]</span> to DSP2 <span style="font-family:monospace">CBIT[7:0]</span>
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and <span style="font-family:monospace">CBIT[24]</span> to DSP3 <span style="font-family:monospace">CBIT0</span>.
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</p>
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<p>However, there are some locations where configuration bits are swapped between DSP tiles and IPConnect tiles. For example, DSP1 (0, 16) <span style="font-family:monospace">CBIT[4:3]</span> is used
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for the internal oscillator, and the DSP configuration bits are then located in IPConnect tile (0, 19) <span style="font-family:monospace">CBIT[6:5]</span>.</p>
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<p>The exact permutations are not yet known, but a script will be developed to find them.</p>
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<p>However, there is one location where configuration bits are swapped between DSP tiles and IPConnect tiles. In DSP1 (0, 16) <span style="font-family:monospace">CBIT[4:1]</span> are used
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for IP such as the internal oscillator, and the DSP configuration bits are then located in IPConnect tile (0, 19) <span style="font-family:monospace">CBIT[6:3]</span>.</p>
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<p>The full list of configuration bits, including the changes for the DSP at (0, 15) are described in the table below.</p>
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<table class="ctab">
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<tr><th>Parameter</th><th>Normal Position</th><th>DSP (0, 15)<br/>Changes</th></tr>
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<tr><td>C_REG</td><td>DSP0.CBIT_0</td><td></td></tr>
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<tr><td>A_REG</td><td>DSP0.CBIT_1</td><td></td></tr>
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<tr><td>B_REG</td><td>DSP0.CBIT_2</td><td></td></tr>
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<tr><td>D_REG</td><td>DSP0.CBIT_3</td><td></td></tr>
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<tr><td>TOP_8x8_MULT_REG</td><td>DSP0.CBIT_4</td><td></td></tr>
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<tr><td>BOT_8x8_MULT_REG</td><td>DSP0.CBIT_5</td><td></td></tr>
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<tr><td>PIPELINE_16x16_MULT_REG1</td><td>DSP0.CBIT_6</td><td></td></tr>
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<tr><td>PIPELINE_16x16_MULT_REG2</td><td>DSP0.CBIT_7</td><td></td></tr>
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<tr><td>TOPOUTPUT_SELECT[0]</td><td>DSP1.CBIT_0</td><td></td></tr>
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<tr><td>TOPOUTPUT_SELECT[1]</td><td>DSP1.CBIT_1</td><td>(0, 19).CBIT_3</td></tr>
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<tr><td>TOPADDSUB_LOWERINPUT[1:0]</td><td>DSP1.CBIT_[3:2]</td><td>(0, 19).CBIT_[5:4]</td></tr>
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<tr><td>TOPADDSUB_UPPERINUT</td><td>DSP1.CBIT_4</td><td>(0, 19).CBIT_6</td></tr>
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<tr><td>TOPADDSUB_CARRYSELECT[1:0]</td><td>DSP1.CBIT_[6:5]</td><td></td></tr>
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<tr><td>BOTOUTPUT_SELECT[0]</td><td>DSP1.CBIT_7</td><td></td></tr>
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<tr><td>BOTOUTPUT_SELECT[1]</td><td>DSP2.CBIT_0</td><td></td></tr>
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<tr><td>BOTADDSUB_LOWERINPUT[1:0]</td><td>DSP2.CBIT_[2:1]</td><td></td></tr>
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<tr><td>BOTADDSUB_UPPERINPUT</td><td>DSP2.CBIT_3</td><td></td></tr>
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<tr><td>BOTADDSUB_CARRYSELECT</td><td>DSP2.CBIT_[5:4]</td><td></td></tr>
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<tr><td>MODE_8x8</td><td>DSP2.CBIT_6</td><td></td></tr>
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<tr><td>A_SIGNED</td><td>DSP2.CBIT_7</td><td></td></tr>
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<tr><td>B_SIGNED</td><td>DSP3.CBIT_0</td><td></td></tr>
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</table>
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<p>Lattice document a limited number of supported configurations in the ICE Technology Library document, and Lattice's EDIF parser will
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reject designs not following a supported configuration. It is not yet known whether unsupported configurations (such as mixed
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signed and unsigned) function correctly or not.
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<p>
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<strong>Other Implementation Notes</strong><br/>
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<p>
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@ -0,0 +1 @@
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work_dsp_cbit/
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@ -0,0 +1,9 @@
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DSP (0, 15):
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Missing (0, 16, CBIT_1)
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Missing (0, 16, CBIT_2)
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Missing (0, 16, CBIT_3)
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Missing (0, 16, CBIT_4)
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New: (0, 19, CBIT_3)
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New: (0, 19, CBIT_5)
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New: (0, 19, CBIT_4)
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New: (0, 19, CBIT_6)
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@ -0,0 +1,132 @@
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#!/usr/bin/env python3
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import os, sys
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device = "up5k"
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# This script is designed to determine which DSPs have configuration bits
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# not in their usual position, as in some cases DSP and IPConnect tiles have
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# their config bits swapped
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# Unfortunately, arbitrary configurations are not allowed by icecube, so
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# we define a set that gives us maximum coverage (full coverage is not
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# possible as one CBIT is never set)
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allowed_configs = ["1110000010000001001110110", "0010000101000010111111111", "0001111000101100000000000"]
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coverage = set()
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for c in allowed_configs:
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for i in range(25):
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if c[i] == "1":
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coverage.add(i)
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assert len(coverage) >= 24
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def parse_exp(f):
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current_x = 0
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current_y = 0
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bits = set()
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for line in f:
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splitline = line.split(' ')
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if splitline[0].endswith("_tile"):
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current_x = int(splitline[1])
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current_y = int(splitline[2])
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elif splitline[0] == "IpConfig":
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if splitline[1][:5] == "CBIT_":
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bitidx = int(splitline[1][5:])
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bits.add((current_x, current_y, bitidx))
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return bits
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dsp_locs = [( 0, 5, 0), ( 0, 10, 0), ( 0, 15, 0), ( 0, 23, 0),
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(25, 5, 0), (25, 10, 0), (25, 15, 0), (25, 23, 0)]
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dsp_data = {}
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if not os.path.exists("./work_dsp_cbit"):
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os.mkdir("./work_dsp_cbit")
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for loc in dsp_locs:
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x, y, z = loc
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missing_bits = set()
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new_bits = set()
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for config in allowed_configs:
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params = config[::-1]
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with open("./work_dsp_cbit/dsp_cbit.v","w") as f:
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print("""
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module top(input clk, input a, input b, input c, input d, output y);
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""", file=f)
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print("""
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SB_MAC16 #(
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.C_REG(1'b%s),
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.A_REG(1'b%s),
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.B_REG(1'b%s),
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.D_REG(1'b%s),
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.TOP_8x8_MULT_REG(1'b%s),
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.BOT_8x8_MULT_REG(1'b%s),
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.PIPELINE_16x16_MULT_REG1(1'b%s),
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.PIPELINE_16x16_MULT_REG2(1'b%s),
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.TOPOUTPUT_SELECT(2'b%s),
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.TOPADDSUB_LOWERINPUT(2'b%s),
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.TOPADDSUB_UPPERINPUT(1'b%s),
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.TOPADDSUB_CARRYSELECT(2'b%s),
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.BOTOUTPUT_SELECT(2'b%s),
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.BOTADDSUB_LOWERINPUT(2'b%s),
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.BOTADDSUB_UPPERINPUT(1'b%s),
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.BOTADDSUB_CARRYSELECT(2'b%s),
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.MODE_8x8(1'b%s),
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.A_SIGNED(1'b%s),
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.B_SIGNED(1'b%s)
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) dsp (
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.CLK(clk),
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.C(c),
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.A(a),
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.B(b),
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.D(d),
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.O(y)
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);"""
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% (
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params[0], params[1], params[2], params[3],
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params[4], params[5], params[6], params[7],
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params[8:10][::-1], params[10:12][::-1], params[12], params[13:15][::-1],
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params[15:17][::-1], params[17:19][::-1], params[19], params[20:22][::-1],
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params[22], params[23], params[24]), file=f)
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print("endmodule",file=f)
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with open("./work_dsp_cbit/dsp_cbit.pcf","w") as f:
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print("set_location dsp %d %d %d" % loc, file=f)
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retval = os.system("bash ../../icecube.sh -" + device + " ./work_dsp_cbit/dsp_cbit.v > ./work_dsp_cbit/icecube.log 2>&1")
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if retval != 0:
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sys.stderr.write('ERROR: icecube returned non-zero error code\n')
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sys.exit(1)
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retval = os.system("../../../icebox/icebox_explain.py ./work_dsp_cbit/dsp_cbit.asc > ./work_dsp_cbit/dsp_cbit.exp")
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if retval != 0:
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sys.stderr.write('ERROR: icebox_explain returned non-zero error code\n')
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sys.exit(1)
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bits = set()
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known = set()
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with open('./work_dsp_cbit/dsp_cbit.exp', 'r') as f:
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bits = parse_exp(f)
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for i in range(25):
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if params[i] == "1":
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exp_pos = (x, y + (i // 8), i % 8)
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if exp_pos not in bits:
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missing_bits.add(exp_pos)
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else:
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known.add(exp_pos)
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for bit in bits:
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if bit not in known:
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new_bits.add(bit)
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if len(missing_bits) > 0 or len(new_bits) > 0:
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print("DSP (%d, %d):" % (x, y))
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for bit in missing_bits:
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print("\tMissing (%d, %d, CBIT_%d)" % bit)
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for bit in new_bits:
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print("\tNew: (%d, %d, CBIT_%d)" % bit)
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dsp_data[loc] = (missing_bits, new_bits)
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with open("dsp_cbits_%s.txt" % device, 'w') as f:
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for loc in dsp_data:
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x, y, z = loc
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missing_bits, new_bits = dsp_data[loc]
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print("DSP (%d, %d):" % (x, y), file=f)
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for bit in missing_bits:
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print("\tMissing (%d, %d, CBIT_%d)" % bit,file=f)
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for bit in new_bits:
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print("\tNew: (%d, %d, CBIT_%d)" % bit,file=f)
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