Port example to iceblink40 board.

examples/iceblink/Makefile

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+PROJ = example
+PIN_DEF = iceblink.pcf
+DEVICE = 1k
+
+all: $(PROJ).bin
+
+%.blif: %.v
+	yosys -p 'synth_ice40 -top top -blif $@' $<
+
+%.asc: $(PIN_DEF) %.blif
+	arachne-pnr -d $(DEVICE) -o $@ -p $^ -P vq100
+
+%.bin: %.asc
+	icepack $< $@
+
+prog: $(PROJ).bin
+	iCEburn.py  -e -v -w  $<
+
+sudo-prog: $(PROJ).bin
+	@echo 'Executing prog as root!!!'
+	iCEburn.py  -e -v -w  $<
+
+clean:
+	rm -f $(PROJ).blif $(PROJ).asc $(PROJ).bin
+
+.PHONY: all prog clean

examples/iceblink/README

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+Note, there are at least two similar looking versions of the iCEblink40 evaluation board:
+-iCEblink40-HX1K
+-iCEblink40-LP1K
+
+This example assumes the iCEblink40-HX1K board.
+
+The iCEblink40 boards have an on-board programmer with USB interface from Digilent.
+You need iCEburn to program the FPGA via this interface (or the original vendor 
+tools).
+https://github.com/davidcarne/iceBurn

examples/iceblink/example.v

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+/* Binary counter displayed on LEDs (the 4 green ones on the right).
+ * Changes value about once a second.
+ */
+module top (
+	input  clk,
+	output LED2,
+	output LED3,
+	output LED4,
+	output LED5
+);
+
+	localparam BITS = 4;
+	localparam LOG2DELAY = 22;
+
+	reg [BITS+LOG2DELAY-1:0] counter = 0;
+	reg [BITS-1:0] outcnt;
+
+	always@(posedge clk) begin
+		counter <= counter + 1;
+		outcnt <= counter >> LOG2DELAY;
+	end
+
+	assign {LED2, LED3, LED4, LED5} = outcnt;
+endmodule

examples/iceblink/iceblink.pcf

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+set_io LED2 59
+set_io LED3 56
+set_io LED4 53
+set_io LED5 51
+set_io clk 13