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icestorm
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Working up5k PLL support

This commit is contained in:
David Shah 2017-10-31 15:11:40 +00:00
parent 938bf7b65e
commit 2ad5600b47
1 changed files with 61 additions and 63 deletions
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124
icebox/icebox.py
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@ -159,8 +159,8 @@ class iceconfig:
def pll_list(self): def pll_list(self):
if self.device == "1k": if self.device == "1k":
return ["1k"] return ["1k"]
if self.device == "5k": #FIXME: PLL removed as it was causing problems in arachne, likely due to broken pin config for it if self.device == "5k":
return [ ] return ["5k"]
if self.device == "8k": if self.device == "8k":
return ["8k_0", "8k_1"] return ["8k_0", "8k_1"]
if self.device == "384": if self.device == "384":
@ -1289,7 +1289,6 @@ noplls_db = {
"1k-cb121": [ "1k" ], "1k-cb121": [ "1k" ],
"1k-vq100": [ "1k" ], "1k-vq100": [ "1k" ],
"384-qn32": [ "384" ], "384-qn32": [ "384" ],
"5k-sg48": [ "5k" ],
} }
pllinfo_db = { pllinfo_db = {
@ -1386,7 +1385,7 @@ pllinfo_db = {
"SDI": ( 4, 0, "fabout"), "SDI": ( 4, 0, "fabout"),
"SCLK": ( 3, 0, "fabout"), "SCLK": ( 3, 0, "fabout"),
}, },
"5k": { #FIXME: pins are definitely not correct "5k": {
"LOC" : (12, 31), "LOC" : (12, 31),
# 3'b000 = "DISABLED" # 3'b000 = "DISABLED"
@ -1395,89 +1394,88 @@ pllinfo_db = {
# 3'b110 = "SB_PLL40_2F_PAD" # 3'b110 = "SB_PLL40_2F_PAD"
# 3'b011 = "SB_PLL40_CORE" # 3'b011 = "SB_PLL40_CORE"
# 3'b111 = "SB_PLL40_2F_CORE" # 3'b111 = "SB_PLL40_2F_CORE"
"PLLTYPE_0": ( 16, 0, "PLLCONFIG_5"), "PLLTYPE_0": (12, 31, "PLLCONFIG_5"),
"PLLTYPE_1": ( 18, 0, "PLLCONFIG_1"), "PLLTYPE_1": (14, 31, "PLLCONFIG_1"),
"PLLTYPE_2": ( 18, 0, "PLLCONFIG_3"), "PLLTYPE_2": (14, 31, "PLLCONFIG_3"),
# 3'b000 = "DELAY" # 3'b000 = "DELAY"
# 3'b001 = "SIMPLE" # 3'b001 = "SIMPLE"
# 3'b010 = "PHASE_AND_DELAY" # 3'b010 = "PHASE_AND_DELAY"
# 3'b110 = "EXTERNAL" # 3'b110 = "EXTERNAL"
"FEEDBACK_PATH_0": ( 18, 0, "PLLCONFIG_5"), "FEEDBACK_PATH_0": (14, 31, "PLLCONFIG_5"),
"FEEDBACK_PATH_1": ( 15, 0, "PLLCONFIG_9"), "FEEDBACK_PATH_1": (11, 31, "PLLCONFIG_9"),
"FEEDBACK_PATH_2": ( 16, 0, "PLLCONFIG_1"), "FEEDBACK_PATH_2": (12, 31, "PLLCONFIG_1"),
# 1'b0 = "FIXED" # 1'b0 = "FIXED"
# 1'b1 = "DYNAMIC" (also set FDA_FEEDBACK=4'b1111) # 1'b1 = "DYNAMIC" (also set FDA_FEEDBACK=4'b1111)
"DELAY_ADJMODE_FB": ( 17, 0, "PLLCONFIG_4"), "DELAY_ADJMODE_FB": (13, 31, "PLLCONFIG_4"),
# 1'b0 = "FIXED" # 1'b0 = "FIXED"
# 1'b1 = "DYNAMIC" (also set FDA_RELATIVE=4'b1111) # 1'b1 = "DYNAMIC" (also set FDA_RELATIVE=4'b1111)
"DELAY_ADJMODE_REL": ( 17, 0, "PLLCONFIG_9"), "DELAY_ADJMODE_REL": (13, 31, "PLLCONFIG_9"),
# 2'b00 = "GENCLK" # 2'b00 = "GENCLK"
# 2'b01 = "GENCLK_HALF" # 2'b01 = "GENCLK_HALF"
# 2'b10 = "SHIFTREG_90deg" # 2'b10 = "SHIFTREG_90deg"
# 2'b11 = "SHIFTREG_0deg" # 2'b11 = "SHIFTREG_0deg"
"PLLOUT_SELECT_A_0": ( 16, 0, "PLLCONFIG_6"), "PLLOUT_SELECT_A_0": (12, 31, "PLLCONFIG_6"),
"PLLOUT_SELECT_A_1": ( 16, 0, "PLLCONFIG_7"), "PLLOUT_SELECT_A_1": (12, 31, "PLLCONFIG_7"),
# 2'b00 = "GENCLK" # 2'b00 = "GENCLK"
# 2'b01 = "GENCLK_HALF" # 2'b01 = "GENCLK_HALF"
# 2'b10 = "SHIFTREG_90deg" # 2'b10 = "SHIFTREG_90deg"
# 2'b11 = "SHIFTREG_0deg" # 2'b11 = "SHIFTREG_0deg"
"PLLOUT_SELECT_B_0": ( 16, 0, "PLLCONFIG_2"), "PLLOUT_SELECT_B_0": (12, 31, "PLLCONFIG_2"),
"PLLOUT_SELECT_B_1": ( 16, 0, "PLLCONFIG_3"), "PLLOUT_SELECT_B_1": (12, 31, "PLLCONFIG_3"),
# Numeric Parameters # Numeric Parameters
"SHIFTREG_DIV_MODE": ( 16, 0, "PLLCONFIG_4"), "SHIFTREG_DIV_MODE": (12, 31, "PLLCONFIG_4"),
"FDA_FEEDBACK_0": ( 16, 0, "PLLCONFIG_9"), "FDA_FEEDBACK_0": (12, 31, "PLLCONFIG_9"),
"FDA_FEEDBACK_1": ( 17, 0, "PLLCONFIG_1"), "FDA_FEEDBACK_1": (13, 31, "PLLCONFIG_1"),
"FDA_FEEDBACK_2": ( 17, 0, "PLLCONFIG_2"), "FDA_FEEDBACK_2": (13, 31, "PLLCONFIG_2"),
"FDA_FEEDBACK_3": ( 17, 0, "PLLCONFIG_3"), "FDA_FEEDBACK_3": (13, 31, "PLLCONFIG_3"),
"FDA_RELATIVE_0": ( 17, 0, "PLLCONFIG_5"), "FDA_RELATIVE_0": (13, 31, "PLLCONFIG_5"),
"FDA_RELATIVE_1": ( 17, 0, "PLLCONFIG_6"), "FDA_RELATIVE_1": (13, 31, "PLLCONFIG_6"),
"FDA_RELATIVE_2": ( 17, 0, "PLLCONFIG_7"), "FDA_RELATIVE_2": (13, 31, "PLLCONFIG_7"),
"FDA_RELATIVE_3": ( 17, 0, "PLLCONFIG_8"), "FDA_RELATIVE_3": (13, 31, "PLLCONFIG_8"),
"DIVR_0": ( 14, 0, "PLLCONFIG_1"), "DIVR_0": (10, 31, "PLLCONFIG_1"),
"DIVR_1": ( 14, 0, "PLLCONFIG_2"), "DIVR_1": (10, 31, "PLLCONFIG_2"),
"DIVR_2": ( 14, 0, "PLLCONFIG_3"), "DIVR_2": (10, 31, "PLLCONFIG_3"),
"DIVR_3": ( 14, 0, "PLLCONFIG_4"), "DIVR_3": (10, 31, "PLLCONFIG_4"),
"DIVF_0": ( 14, 0, "PLLCONFIG_5"), "DIVF_0": (10, 31, "PLLCONFIG_5"),
"DIVF_1": ( 14, 0, "PLLCONFIG_6"), "DIVF_1": (10, 31, "PLLCONFIG_6"),
"DIVF_2": ( 14, 0, "PLLCONFIG_7"), "DIVF_2": (10, 31, "PLLCONFIG_7"),
"DIVF_3": ( 14, 0, "PLLCONFIG_8"), "DIVF_3": (10, 31, "PLLCONFIG_8"),
"DIVF_4": ( 14, 0, "PLLCONFIG_9"), "DIVF_4": (10, 31, "PLLCONFIG_9"),
"DIVF_5": ( 15, 0, "PLLCONFIG_1"), "DIVF_5": (11, 31, "PLLCONFIG_1"),
"DIVF_6": ( 15, 0, "PLLCONFIG_2"), "DIVF_6": (11, 31, "PLLCONFIG_2"),
"DIVQ_0": ( 15, 0, "PLLCONFIG_3"), "DIVQ_0": (11, 31, "PLLCONFIG_3"),
"DIVQ_1": ( 15, 0, "PLLCONFIG_4"), "DIVQ_1": (11, 31, "PLLCONFIG_4"),
"DIVQ_2": ( 15, 0, "PLLCONFIG_5"), "DIVQ_2": (11, 31, "PLLCONFIG_5"),
"FILTER_RANGE_0": ( 15, 0, "PLLCONFIG_6"), "FILTER_RANGE_0": (11, 31, "PLLCONFIG_6"),
"FILTER_RANGE_1": ( 15, 0, "PLLCONFIG_7"), "FILTER_RANGE_1": (11, 31, "PLLCONFIG_7"),
"FILTER_RANGE_2": ( 15, 0, "PLLCONFIG_8"), "FILTER_RANGE_2": (11, 31, "PLLCONFIG_8"),
"TEST_MODE": ( 16, 0, "PLLCONFIG_8"), "TEST_MODE": (12, 31, "PLLCONFIG_8"),
# PLL Ports # PLL Ports
"PLLOUT_A": ( 16, 0, 1), "PLLOUT_A": ( 12, 31, 1),
"PLLOUT_B": ( 17, 0, 0), "PLLOUT_B": ( 13, 31, 0),
"REFERENCECLK": ( 13, 0, "fabout"), "REFERENCECLK": ( 10, 31, "fabout"),
"EXTFEEDBACK": ( 14, 0, "fabout"), "EXTFEEDBACK": ( 11, 31, "fabout"),
"DYNAMICDELAY_0": ( 5, 0, "fabout"), "DYNAMICDELAY_0": ( 1, 31, "fabout"),
"DYNAMICDELAY_1": ( 6, 0, "fabout"), "DYNAMICDELAY_1": ( 2, 31, "fabout"),
"DYNAMICDELAY_2": ( 7, 0, "fabout"), "DYNAMICDELAY_2": ( 3, 31, "fabout"),
"DYNAMICDELAY_3": ( 8, 0, "fabout"), "DYNAMICDELAY_3": ( 4, 31, "fabout"),
"DYNAMICDELAY_4": ( 9, 0, "fabout"), "DYNAMICDELAY_4": ( 5, 31, "fabout"),
"DYNAMICDELAY_5": ( 10, 0, "fabout"), "DYNAMICDELAY_5": ( 7, 31, "fabout"),
"DYNAMICDELAY_6": ( 11, 0, "fabout"), "DYNAMICDELAY_6": ( 8, 31, "fabout"),
"DYNAMICDELAY_7": ( 12, 0, "fabout"), "DYNAMICDELAY_7": ( 9, 31, "fabout"),
"LOCK": ( 1, 1, "neigh_op_bnl_1"), "LOCK": ( 1, 30, "neigh_op_tnl_1"), #check?
"BYPASS": ( 19, 0, "fabout"), "BYPASS": ( 15, 31, "fabout"),
"RESETB": ( 20, 0, "fabout"), "RESETB": ( 16, 31, "fabout"),
"LATCHINPUTVALUE": ( 15, 0, "fabout"), "LATCHINPUTVALUE": ( 14, 31, "fabout"),
"SDO": ( 24, 30, "neigh_op_bnr_3"), "SDO": ( 24, 30, "neigh_op_tnr_1"), #check?
"SDI": ( 22, 0, "fabout"), "SDI": ( 18, 31, "fabout"),
"SCLK": ( 21, 0, "fabout"), "SCLK": ( 17, 31, "fabout"),
}, },
"8k_0": { "8k_0": {
"LOC" : (16, 0), "LOC" : (16, 0),