mirror of https://github.com/YosysHQ/icestorm.git
Fix make_ram40 for UltraPlus
Sometimes make_ram40 was assigning too many IO pins, causing a placment failure, and also sometimes connecting a global clock net to WCLKE or RCLKE which was also causing a placment failure.
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@ -14,7 +14,11 @@ os.mkdir(working_dir)
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for idx in range(num):
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with open(working_dir + "/ram40_%02d.v" % idx, "w") as f:
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glbs = ["glb[%d]" % i for i in range(np.random.randint(8)+1)]
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glbs_choice = ["wa", "ra", "msk", "wd", "we", "wce", "wc", "re", "rce", "rc"]
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# Connecting GLB to CE pins seemingly disallowed
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if device_class == "5k":
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glbs_choice = ["wa", "ra", "msk", "wd", "we", "wc", "re", "rc"]
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else:
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glbs_choice = ["wa", "ra", "msk", "wd", "we", "wce", "wc", "re", "rce", "rc"]
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print("""
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module top (
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input [%d:0] glb_pins,
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@ -26,7 +30,7 @@ for idx in range(num):
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.USER_SIGNAL_TO_GLOBAL_BUFFER(glb_pins),
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.GLOBAL_BUFFER_OUTPUT(glb)
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);
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""" % (len(glbs)-1, len(pins) - 16 - 1, len(glbs)-1, len(glbs)-1), file=f)
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""" % (len(glbs)-1, len(pins) - len(glbs) - 16 - 1, len(glbs)-1, len(glbs)-1), file=f)
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bits = ["in_pins[%d]" % i for i in range(60)]
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bits = list(np.random.permutation(bits))
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for i in range(num_ramb40):
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@ -102,7 +106,7 @@ for idx in range(num):
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print("endmodule", file=f)
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with open(working_dir + "/ram40_%02d.pcf" % idx, "w") as f:
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p = list(np.random.permutation(pins))
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for i in range(len(pins) - 16):
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for i in range(len(pins) - len(glbs) - 16):
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print("set_io in_pins[%d] %s" % (i, p.pop()), file=f)
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for i in range(16):
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print("set_io out_pins[%d] %s" % (i, p.pop()), file=f)
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