mirror of https://github.com/YosysHQ/abc.git
135 lines
5.7 KiB
C
135 lines
5.7 KiB
C
/**CFile****************************************************************
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FileName [fsimInt.h]
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SystemName [ABC: Logic synthesis and verification system.]
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PackageName [Fast sequential AIG simulator.]
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Synopsis [Internal declarations.]
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Author [Alan Mishchenko]
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Affiliation [UC Berkeley]
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Date [Ver. 1.0. Started - June 20, 2005.]
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Revision [$Id: fsimInt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
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***********************************************************************/
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#ifndef __FSIM_INT_H__
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#define __FSIM_INT_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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////////////////////////////////////////////////////////////////////////
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/// INCLUDES ///
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////////////////////////////////////////////////////////////////////////
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#include "saig.h"
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#include "fsim.h"
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////////////////////////////////////////////////////////////////////////
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/// PARAMETERS ///
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////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////
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/// BASIC TYPES ///
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////////////////////////////////////////////////////////////////////////
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// simulation object
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typedef struct Fsim_Obj_t_ Fsim_Obj_t;
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struct Fsim_Obj_t_
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{
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int iNode; // the node ID
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int iFan0; // the first fanin
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int iFan1; // the second fanin
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};
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// fast sequential simulation manager
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struct Fsim_Man_t_
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{
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// parameters
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Aig_Man_t * pAig; // the AIG to be used for simulation
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int nWords; // the number of simulation words
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// AIG representation
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int nPis; // the number of primary inputs
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int nPos; // the number of primary outputs
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int nCis; // the number of combinational inputs
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int nCos; // the number of combinational outputs
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int nNodes; // the number of internal nodes
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int nObjs; // nCis + nNodes + nCos + 2
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int * pFans0; // fanin0 for all objects
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int * pFans1; // fanin1 for all objects
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int * pRefs; // reference counter for each node
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int * pRefsCopy; // reference counter for each node
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Vec_Int_t * vCis2Ids; // mapping of CIs into their PI ids
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Vec_Int_t * vLos; // register outputs
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Vec_Int_t * vLis; // register inputs
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// cross-cut representation
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int nCrossCut; // temporary cross-cut variable
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int nCrossCutMax; // maximum cross-cut variable
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int nFront; // the size of frontier
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// derived AIG representation
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int nDataAig; // the length of allocated data
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unsigned char * pDataAig; // AIG representation
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unsigned char * pDataCur; // AIG representation (current position)
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int iNodePrev; // previous extracted value
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int iNumber; // the number of the last object
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Fsim_Obj_t Obj; // current object
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// temporary AIG representation
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int * pDataAig2; // temporary representation
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int * pDataCur2; // AIG representation (current position)
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// simulation information
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unsigned * pDataSim; // simulation data
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unsigned * pDataSimCis; // simulation data for CIs
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unsigned * pDataSimCos; // simulation data for COs
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// other information
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int * pData1;
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int * pData2;
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};
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static inline unsigned * Fsim_SimData( Fsim_Man_t * p, int i ) { return p->pDataSim + i * p->nWords; }
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static inline unsigned * Fsim_SimDataCi( Fsim_Man_t * p, int i ) { return p->pDataSimCis + i * p->nWords; }
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static inline unsigned * Fsim_SimDataCo( Fsim_Man_t * p, int i ) { return p->pDataSimCos + i * p->nWords; }
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////////////////////////////////////////////////////////////////////////
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/// MACRO DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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static inline int Fsim_Var2Lit( int Var, int fCompl ) { return Var + Var + fCompl; }
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static inline int Fsim_Lit2Var( int Lit ) { return Lit >> 1; }
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static inline int Fsim_LitIsCompl( int Lit ) { return Lit & 1; }
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static inline int Fsim_LitNot( int Lit ) { return Lit ^ 1; }
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static inline int Fsim_LitNotCond( int Lit, int c ) { return Lit ^ (int)(c > 0); }
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static inline int Fsim_LitRegular( int Lit ) { return Lit & ~01; }
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#define Fsim_ManForEachObj( p, pObj, i )\
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for ( i = 2, p->pDataCur = p->pDataAig, p->iNodePrev = 0, pObj = &p->Obj;\
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i < p->nObjs && Fsim_ManRestoreObj( p, pObj ); i++ )
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////////////////////////////////////////////////////////////////////////
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/// FUNCTION DECLARATIONS ///
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////////////////////////////////////////////////////////////////////////
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/*=== fsimFront.c ========================================================*/
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extern void Fsim_ManFront( Fsim_Man_t * p, int fCompressAig );
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/*=== fsimMan.c ==========================================================*/
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extern Fsim_Man_t * Fsim_ManCreate( Aig_Man_t * pAig );
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extern void Fsim_ManDelete( Fsim_Man_t * p );
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extern void Fsim_ManTest( Aig_Man_t * pAig );
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#ifdef __cplusplus
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}
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#endif
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#endif
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////////////////////////////////////////////////////////////////////////
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/// END OF FILE ///
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////////////////////////////////////////////////////////////////////////
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