mirror of https://github.com/YosysHQ/abc.git
176 lines
9.0 KiB
C
176 lines
9.0 KiB
C
/**CFile****************************************************************
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FileName [fpga.h]
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PackageName [MVSIS 2.0: Multi-valued logic synthesis system.]
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Synopsis [Technology mapping for variable-size-LUT FPGAs.]
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Author [MVSIS Group]
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Affiliation [UC Berkeley]
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Date [Ver. 2.0. Started - August 18, 2004.]
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Revision [$Id: fpga.h,v 1.7 2004/09/30 21:18:09 satrajit Exp $]
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***********************************************************************/
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#ifndef ABC__map__fpga__fpga_h
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#define ABC__map__fpga__fpga_h
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////////////////////////////////////////////////////////////////////////
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/// INCLUDES ///
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////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////
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/// PARAMETERS ///
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////////////////////////////////////////////////////////////////////////
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ABC_NAMESPACE_HEADER_START
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// the maximum size of LUTs used for mapping
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#define FPGA_MAX_LUTSIZE 32
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////////////////////////////////////////////////////////////////////////
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/// STRUCTURE DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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typedef struct Fpga_ManStruct_t_ Fpga_Man_t;
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typedef struct Fpga_NodeStruct_t_ Fpga_Node_t;
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typedef struct Fpga_NodeVecStruct_t_ Fpga_NodeVec_t;
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typedef struct Fpga_CutStruct_t_ Fpga_Cut_t;
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typedef struct Fpga_LutLibStruct_t_ Fpga_LutLib_t;
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////////////////////////////////////////////////////////////////////////
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/// GLOBAL VARIABLES ///
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////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////
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/// MACRO DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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#define Fpga_IsComplement(p) (((int)((ABC_PTRUINT_T) (p) & 01)))
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#define Fpga_Regular(p) ((Fpga_Node_t *)((ABC_PTRUINT_T)(p) & ~01))
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#define Fpga_Not(p) ((Fpga_Node_t *)((ABC_PTRUINT_T)(p) ^ 01))
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#define Fpga_NotCond(p,c) ((Fpga_Node_t *)((ABC_PTRUINT_T)(p) ^ (c)))
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#define Fpga_Ref(p)
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#define Fpga_Deref(p)
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#define Fpga_RecursiveDeref(p,c)
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////////////////////////////////////////////////////////////////////////
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/// FUNCTION DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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/*=== fpgaCreate.c =============================================================*/
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extern Fpga_Man_t * Fpga_ManCreate( int nInputs, int nOutputs, int fVerbose );
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extern Fpga_Node_t * Fpga_NodeCreate( Fpga_Man_t * p, Fpga_Node_t * p1, Fpga_Node_t * p2 );
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extern void Fpga_ManFree( Fpga_Man_t * pMan );
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extern void Fpga_ManPrintTimeStats( Fpga_Man_t * p );
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extern int Fpga_ManReadInputNum( Fpga_Man_t * p );
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extern int Fpga_ManReadOutputNum( Fpga_Man_t * p );
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extern Fpga_Node_t ** Fpga_ManReadInputs ( Fpga_Man_t * p );
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extern Fpga_Node_t ** Fpga_ManReadOutputs( Fpga_Man_t * p );
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extern Fpga_Node_t * Fpga_ManReadConst1 ( Fpga_Man_t * p );
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extern float * Fpga_ManReadInputArrivals( Fpga_Man_t * p );
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extern int Fpga_ManReadVerbose( Fpga_Man_t * p );
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extern int Fpga_ManReadVarMax( Fpga_Man_t * p );
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extern float * Fpga_ManReadLutAreas( Fpga_Man_t * p );
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extern Fpga_NodeVec_t* Fpga_ManReadMapping( Fpga_Man_t * p );
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extern void Fpga_ManSetOutputNames( Fpga_Man_t * p, char ** ppNames );
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extern void Fpga_ManSetInputArrivals( Fpga_Man_t * p, float * pArrivals );
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extern void Fpga_ManSetAreaRecovery( Fpga_Man_t * p, int fAreaRecovery );
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extern void Fpga_ManSetDelayLimit( Fpga_Man_t * p, float DelayLimit );
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extern void Fpga_ManSetAreaLimit( Fpga_Man_t * p, float AreaLimit );
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extern void Fpga_ManSetObeyFanoutLimits( Fpga_Man_t * p, int fObeyFanoutLimits );
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extern void Fpga_ManSetNumIterations( Fpga_Man_t * p, int nNumIterations );
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extern int Fpga_ManReadFanoutViolations( Fpga_Man_t * p );
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extern void Fpga_ManSetFanoutViolations( Fpga_Man_t * p, int nVio );
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extern void Fpga_ManSetChoiceNodeNum( Fpga_Man_t * p, int nChoiceNodes );
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extern void Fpga_ManSetChoiceNum( Fpga_Man_t * p, int nChoices );
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extern void Fpga_ManSetVerbose( Fpga_Man_t * p, int fVerbose );
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extern void Fpga_ManSetSwitching( Fpga_Man_t * p, int fSwitching );
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extern void Fpga_ManSetLatchPaths( Fpga_Man_t * p, int fLatchPaths );
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extern void Fpga_ManSetLatchNum( Fpga_Man_t * p, int nLatches );
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extern void Fpga_ManSetDelayTarget( Fpga_Man_t * p, float DelayTarget );
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extern void Fpga_ManSetName( Fpga_Man_t * p, char * pFileName );
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extern int Fpga_LibReadLutMax( Fpga_LutLib_t * pLib );
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extern char * Fpga_NodeReadData0( Fpga_Node_t * p );
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extern Fpga_Node_t * Fpga_NodeReadData1( Fpga_Node_t * p );
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extern int Fpga_NodeReadRefs( Fpga_Node_t * p );
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extern int Fpga_NodeReadNum( Fpga_Node_t * p );
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extern int Fpga_NodeReadLevel( Fpga_Node_t * p );
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extern Fpga_Cut_t * Fpga_NodeReadCuts( Fpga_Node_t * p );
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extern Fpga_Cut_t * Fpga_NodeReadCutBest( Fpga_Node_t * p );
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extern Fpga_Node_t * Fpga_NodeReadOne( Fpga_Node_t * p );
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extern Fpga_Node_t * Fpga_NodeReadTwo( Fpga_Node_t * p );
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extern void Fpga_NodeSetLevel( Fpga_Node_t * p, Fpga_Node_t * pNode );
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extern void Fpga_NodeSetData0( Fpga_Node_t * p, char * pData );
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extern void Fpga_NodeSetData1( Fpga_Node_t * p, Fpga_Node_t * pNode );
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extern void Fpga_NodeSetArrival( Fpga_Node_t * p, float Time );
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extern void Fpga_NodeSetNextE( Fpga_Node_t * p, Fpga_Node_t * pNextE );
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extern void Fpga_NodeSetRepr( Fpga_Node_t * p, Fpga_Node_t * pRepr );
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extern void Fpga_NodeSetSwitching( Fpga_Node_t * p, float Switching );
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extern int Fpga_NodeIsConst( Fpga_Node_t * p );
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extern int Fpga_NodeIsVar( Fpga_Node_t * p );
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extern int Fpga_NodeIsAnd( Fpga_Node_t * p );
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extern int Fpga_NodeComparePhase( Fpga_Node_t * p1, Fpga_Node_t * p2 );
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extern int Fpga_CutReadLeavesNum( Fpga_Cut_t * p );
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extern Fpga_Node_t ** Fpga_CutReadLeaves( Fpga_Cut_t * p );
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extern Fpga_Node_t * Fpga_NodeAnd( Fpga_Man_t * p, Fpga_Node_t * p1, Fpga_Node_t * p2 );
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extern Fpga_Node_t * Fpga_NodeOr( Fpga_Man_t * p, Fpga_Node_t * p1, Fpga_Node_t * p2 );
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extern Fpga_Node_t * Fpga_NodeExor( Fpga_Man_t * p, Fpga_Node_t * p1, Fpga_Node_t * p2 );
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extern Fpga_Node_t * Fpga_NodeMux( Fpga_Man_t * p, Fpga_Node_t * pNode, Fpga_Node_t * pNodeT, Fpga_Node_t * pNodeE );
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extern void Fpga_NodeSetChoice( Fpga_Man_t * pMan, Fpga_Node_t * pNodeOld, Fpga_Node_t * pNodeNew );
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extern void Fpga_ManStats( Fpga_Man_t * p );
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/*=== fpgaCore.c =============================================================*/
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extern int Fpga_Mapping( Fpga_Man_t * p );
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/*=== fpgaCut.c ===============================================================*/
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extern void Fpga_MappingCreatePiCuts( Fpga_Man_t * p );
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extern void Fpga_CutsCleanSign( Fpga_Man_t * pMan );
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extern void Fpga_CutsCleanRoot( Fpga_Man_t * pMan );
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/*=== fpgaCutUtils.c =============================================================*/
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extern void Fpga_CutCreateFromNode( Fpga_Man_t * p, int iRoot, int * pLeaves, int nLeaves );
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extern void Fpga_MappingSetUsedCuts( Fpga_Man_t * p );
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/*=== fpgaLib.c =============================================================*/
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extern Fpga_LutLib_t * Fpga_LutLibDup( Fpga_LutLib_t * p );
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extern int Fpga_LutLibReadVarMax( Fpga_LutLib_t * p );
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extern float * Fpga_LutLibReadLutAreas( Fpga_LutLib_t * p );
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extern float * Fpga_LutLibReadLutDelays( Fpga_LutLib_t * p );
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extern float Fpga_LutLibReadLutArea( Fpga_LutLib_t * p, int Size );
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extern float Fpga_LutLibReadLutDelay( Fpga_LutLib_t * p, int Size );
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/*=== fpgaTruth.c =============================================================*/
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extern void * Fpga_TruthsCutBdd( void * dd, Fpga_Cut_t * pCut );
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extern int Fpga_CutVolume( Fpga_Cut_t * pCut );
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/*=== fpgaUtil.c =============================================================*/
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extern int Fpga_ManCheckConsistency( Fpga_Man_t * p );
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extern void Fpga_ManCleanData0( Fpga_Man_t * pMan );
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extern Fpga_NodeVec_t * Fpga_CollectNodeTfo( Fpga_Man_t * pMan, Fpga_Node_t * pNode );
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/*=== fpga.c =============================================================*/
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extern void Fpga_SetSimpleLutLib( int nLutSize );
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ABC_NAMESPACE_HEADER_END
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#endif
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////////////////////////////////////////////////////////////////////////
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/// END OF FILE ///
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////////////////////////////////////////////////////////////////////////
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