mirror of https://github.com/YosysHQ/abc.git
678 lines
24 KiB
C
678 lines
24 KiB
C
/**CFile****************************************************************
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FileName [sclLibScl.c]
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SystemName [ABC: Logic synthesis and verification system.]
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PackageName [Standard-cell library representation.]
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Synopsis [Liberty abstraction for delay-oriented mapping.]
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Author [Alan Mishchenko, Niklas Een]
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Affiliation [UC Berkeley]
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Date [Ver. 1.0. Started - August 24, 2012.]
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Revision [$Id: sclLibScl.c,v 1.0 2012/08/24 00:00:00 alanmi Exp $]
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***********************************************************************/
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#include "sclLib.h"
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#include "misc/st/st.h"
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#include "map/mio/mio.h"
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#include "bool/kit/kit.h"
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ABC_NAMESPACE_IMPL_START
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////////////////////////////////////////////////////////////////////////
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/// DECLARATIONS ///
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////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////
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/// FUNCTION DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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/**Function*************************************************************
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Synopsis [Reading library from file.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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static void Abc_SclReadSurface( Vec_Str_t * vOut, int * pPos, SC_Surface * p )
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{
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Vec_Flt_t * vVec;
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int i, j;
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for ( i = Vec_StrGetI(vOut, pPos); i != 0; i-- )
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Vec_FltPush( p->vIndex0, Vec_StrGetF(vOut, pPos) );
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for ( i = Vec_StrGetI(vOut, pPos); i != 0; i-- )
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Vec_FltPush( p->vIndex1, Vec_StrGetF(vOut, pPos) );
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for ( i = 0; i < Vec_FltSize(p->vIndex0); i++ )
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{
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vVec = Vec_FltAlloc( Vec_FltSize(p->vIndex1) );
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Vec_PtrPush( p->vData, vVec );
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for ( j = 0; j < Vec_FltSize(p->vIndex1); j++ )
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Vec_FltPush( vVec, Vec_StrGetF(vOut, pPos) );
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}
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for ( i = 0; i < 3; i++ )
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p->approx[0][i] = Vec_StrGetF( vOut, pPos );
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for ( i = 0; i < 4; i++ )
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p->approx[1][i] = Vec_StrGetF( vOut, pPos );
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for ( i = 0; i < 6; i++ )
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p->approx[2][i] = Vec_StrGetF( vOut, pPos );
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}
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static void Abc_SclReadLibrary( Vec_Str_t * vOut, int * pPos, SC_Lib * p )
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{
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int i, j, k, n;
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int version = Vec_StrGetI( vOut, pPos );
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assert( version == 5 || version == ABC_SCL_CUR_VERSION ); // wrong version of the file
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// Read non-composite fields:
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p->pName = Vec_StrGetS(vOut, pPos);
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p->default_wire_load = Vec_StrGetS(vOut, pPos);
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p->default_wire_load_sel = Vec_StrGetS(vOut, pPos);
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p->default_max_out_slew = Vec_StrGetF(vOut, pPos);
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p->unit_time = Vec_StrGetI(vOut, pPos);
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p->unit_cap_fst = Vec_StrGetF(vOut, pPos);
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p->unit_cap_snd = Vec_StrGetI(vOut, pPos);
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// Read 'wire_load' vector:
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for ( i = Vec_StrGetI(vOut, pPos); i != 0; i-- )
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{
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SC_WireLoad * pWL = Abc_SclWireLoadAlloc();
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Vec_PtrPush( p->vWireLoads, pWL );
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pWL->pName = Vec_StrGetS(vOut, pPos);
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pWL->res = Vec_StrGetF(vOut, pPos);
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pWL->cap = Vec_StrGetF(vOut, pPos);
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for ( j = Vec_StrGetI(vOut, pPos); j != 0; j-- )
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{
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Vec_IntPush( pWL->vFanout, Vec_StrGetI(vOut, pPos) );
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Vec_FltPush( pWL->vLen, Vec_StrGetF(vOut, pPos) );
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}
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}
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// Read 'wire_load_sel' vector:
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for ( i = Vec_StrGetI(vOut, pPos); i != 0; i-- )
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{
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SC_WireLoadSel * pWLS = Abc_SclWireLoadSelAlloc();
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Vec_PtrPush( p->vWireLoadSels, pWLS );
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pWLS->pName = Vec_StrGetS(vOut, pPos);
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for ( j = Vec_StrGetI(vOut, pPos); j != 0; j-- )
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{
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Vec_FltPush( pWLS->vAreaFrom, Vec_StrGetF(vOut, pPos) );
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Vec_FltPush( pWLS->vAreaTo, Vec_StrGetF(vOut, pPos) );
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Vec_PtrPush( pWLS->vWireLoadModel, Vec_StrGetS(vOut, pPos) );
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}
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}
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for ( i = Vec_StrGetI(vOut, pPos); i != 0; i-- )
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{
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SC_Cell * pCell = Abc_SclCellAlloc();
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pCell->Id = SC_LibCellNum(p);
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Vec_PtrPush( p->vCells, pCell );
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pCell->pName = Vec_StrGetS(vOut, pPos);
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pCell->area = Vec_StrGetF(vOut, pPos);
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pCell->drive_strength = Vec_StrGetI(vOut, pPos);
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pCell->n_inputs = Vec_StrGetI(vOut, pPos);
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pCell->n_outputs = Vec_StrGetI(vOut, pPos);
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/*
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printf( "%s\n", pCell->pName );
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if ( !strcmp( "XOR3_X4M_A9TL", pCell->pName ) )
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{
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int s = 0;
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}
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*/
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for ( j = 0; j < pCell->n_inputs; j++ )
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{
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SC_Pin * pPin = Abc_SclPinAlloc();
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Vec_PtrPush( pCell->vPins, pPin );
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pPin->dir = sc_dir_Input;
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pPin->pName = Vec_StrGetS(vOut, pPos);
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pPin->rise_cap = Vec_StrGetF(vOut, pPos);
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pPin->fall_cap = Vec_StrGetF(vOut, pPos);
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}
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for ( j = 0; j < pCell->n_outputs; j++ )
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{
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SC_Pin * pPin = Abc_SclPinAlloc();
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Vec_PtrPush( pCell->vPins, pPin );
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pPin->dir = sc_dir_Output;
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pPin->pName = Vec_StrGetS(vOut, pPos);
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pPin->max_out_cap = Vec_StrGetF(vOut, pPos);
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pPin->max_out_slew = Vec_StrGetF(vOut, pPos);
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k = Vec_StrGetI(vOut, pPos);
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assert( k == pCell->n_inputs );
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// read function
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if ( version == 5 )
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{
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// formula is not given
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assert( Vec_WrdSize(pPin->vFunc) == 0 );
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Vec_WrdGrow( pPin->vFunc, Abc_Truth6WordNum(pCell->n_inputs) );
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for ( k = 0; k < Vec_WrdCap(pPin->vFunc); k++ )
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Vec_WrdPush( pPin->vFunc, Vec_StrGetW(vOut, pPos) );
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}
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else
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{
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// (possibly empty) formula is always given
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assert( version == ABC_SCL_CUR_VERSION );
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assert( pPin->func_text == NULL );
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pPin->func_text = Vec_StrGetS(vOut, pPos);
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if ( pPin->func_text[0] == 0 )
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{
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// formula is not given - read truth table
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ABC_FREE( pPin->func_text );
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assert( Vec_WrdSize(pPin->vFunc) == 0 );
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Vec_WrdGrow( pPin->vFunc, Abc_Truth6WordNum(pCell->n_inputs) );
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for ( k = 0; k < Vec_WrdCap(pPin->vFunc); k++ )
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Vec_WrdPush( pPin->vFunc, Vec_StrGetW(vOut, pPos) );
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}
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else
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{
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// formula is given - derive truth table
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SC_Pin * pPin2;
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Vec_Ptr_t * vNames;
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// collect input names
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vNames = Vec_PtrAlloc( pCell->n_inputs );
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SC_CellForEachPinIn( pCell, pPin2, n )
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Vec_PtrPush( vNames, pPin2->pName );
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// derive truth table
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assert( Vec_WrdSize(pPin->vFunc) == 0 );
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Vec_WrdFree( pPin->vFunc );
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pPin->vFunc = Mio_ParseFormulaTruth( pPin->func_text, (char **)Vec_PtrArray(vNames), pCell->n_inputs );
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Vec_PtrFree( vNames );
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// skip truth table
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assert( Vec_WrdSize(pPin->vFunc) == Abc_Truth6WordNum(pCell->n_inputs) );
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for ( k = 0; k < Vec_WrdSize(pPin->vFunc); k++ )
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{
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word Value = Vec_StrGetW(vOut, pPos);
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assert( Value == Vec_WrdEntry(pPin->vFunc, k) );
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}
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}
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}
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// Read 'rtiming': (pin-to-pin timing tables for this particular output)
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for ( k = 0; k < pCell->n_inputs; k++ )
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{
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SC_Timings * pRTime = Abc_SclTimingsAlloc();
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Vec_PtrPush( pPin->vRTimings, pRTime );
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pRTime->pName = Vec_StrGetS(vOut, pPos);
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n = Vec_StrGetI(vOut, pPos); assert( n <= 1 );
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if ( n == 1 )
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{
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SC_Timing * pTime = Abc_SclTimingAlloc();
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Vec_PtrPush( pRTime->vTimings, pTime );
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pTime->tsense = (SC_TSense)Vec_StrGetI(vOut, pPos);
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Abc_SclReadSurface( vOut, pPos, pTime->pCellRise );
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Abc_SclReadSurface( vOut, pPos, pTime->pCellFall );
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Abc_SclReadSurface( vOut, pPos, pTime->pRiseTrans );
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Abc_SclReadSurface( vOut, pPos, pTime->pFallTrans );
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}
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else
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assert( Vec_PtrSize(pRTime->vTimings) == 0 );
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}
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}
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}
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}
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SC_Lib * Abc_SclReadFromStr( Vec_Str_t * vOut )
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{
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SC_Lib * p;
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int Pos = 0;
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// read the library
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p = Abc_SclLibAlloc();
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Abc_SclReadLibrary( vOut, &Pos, p );
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assert( Pos == Vec_StrSize(vOut) );
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// hash gates by name
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Abc_SclHashCells( p );
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Abc_SclLinkCells( p );
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return p;
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}
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SC_Lib * Abc_SclReadFromFile( char * pFileName )
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{
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SC_Lib * p;
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FILE * pFile;
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Vec_Str_t * vOut;
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int nFileSize;
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pFile = fopen( pFileName, "rb" );
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if ( pFile == NULL )
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{
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printf( "Cannot open file \"%s\" for reading.\n", pFileName );
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return NULL;
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}
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// get the file size, in bytes
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fseek( pFile, 0, SEEK_END );
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nFileSize = ftell( pFile );
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rewind( pFile );
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// load the contents
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vOut = Vec_StrAlloc( nFileSize );
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vOut->nSize = vOut->nCap;
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assert( nFileSize == Vec_StrSize(vOut) );
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nFileSize = fread( Vec_StrArray(vOut), 1, Vec_StrSize(vOut), pFile );
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assert( nFileSize == Vec_StrSize(vOut) );
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fclose( pFile );
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// read the library
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p = Abc_SclReadFromStr( vOut );
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p->pFileName = Abc_UtilStrsav( pFileName );
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Vec_StrFree( vOut );
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return p;
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}
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/**Function*************************************************************
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Synopsis [Writing library into file.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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static void Abc_SclWriteSurface( Vec_Str_t * vOut, SC_Surface * p )
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{
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Vec_Flt_t * vVec;
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float Entry;
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int i, k;
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Vec_StrPutI( vOut, Vec_FltSize(p->vIndex0) );
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Vec_FltForEachEntry( p->vIndex0, Entry, i )
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Vec_StrPutF( vOut, Entry );
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Vec_StrPutI( vOut, Vec_FltSize(p->vIndex1) );
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Vec_FltForEachEntry( p->vIndex1, Entry, i )
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Vec_StrPutF( vOut, Entry );
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Vec_PtrForEachEntry( Vec_Flt_t *, p->vData, vVec, i )
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Vec_FltForEachEntry( vVec, Entry, k )
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Vec_StrPutF( vOut, Entry );
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for ( i = 0; i < 3; i++ )
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Vec_StrPutF( vOut, p->approx[0][i] );
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for ( i = 0; i < 4; i++ )
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Vec_StrPutF( vOut, p->approx[1][i] );
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for ( i = 0; i < 6; i++ )
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Vec_StrPutF( vOut, p->approx[2][i] );
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}
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static void Abc_SclWriteLibrary( Vec_Str_t * vOut, SC_Lib * p )
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{
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SC_WireLoad * pWL;
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SC_WireLoadSel * pWLS;
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SC_Cell * pCell;
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SC_Pin * pPin;
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int n_valid_cells;
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int i, j, k;
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Vec_StrPutI( vOut, ABC_SCL_CUR_VERSION );
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// Write non-composite fields:
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Vec_StrPutS( vOut, p->pName );
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Vec_StrPutS( vOut, p->default_wire_load );
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Vec_StrPutS( vOut, p->default_wire_load_sel );
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Vec_StrPutF( vOut, p->default_max_out_slew );
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assert( p->unit_time >= 0 );
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assert( p->unit_cap_snd >= 0 );
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Vec_StrPutI( vOut, p->unit_time );
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Vec_StrPutF( vOut, p->unit_cap_fst );
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Vec_StrPutI( vOut, p->unit_cap_snd );
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// Write 'wire_load' vector:
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Vec_StrPutI( vOut, Vec_PtrSize(p->vWireLoads) );
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SC_LibForEachWireLoad( p, pWL, i )
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{
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Vec_StrPutS( vOut, pWL->pName );
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Vec_StrPutF( vOut, pWL->res );
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Vec_StrPutF( vOut, pWL->cap );
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Vec_StrPutI( vOut, Vec_IntSize(pWL->vFanout) );
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for ( j = 0; j < Vec_IntSize(pWL->vFanout); j++ )
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{
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Vec_StrPutI( vOut, Vec_IntEntry(pWL->vFanout, j) );
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Vec_StrPutF( vOut, Vec_FltEntry(pWL->vLen, j) );
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}
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}
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// Write 'wire_load_sel' vector:
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Vec_StrPutI( vOut, Vec_PtrSize(p->vWireLoadSels) );
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SC_LibForEachWireLoadSel( p, pWLS, i )
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{
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Vec_StrPutS( vOut, pWLS->pName );
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Vec_StrPutI( vOut, Vec_FltSize(pWLS->vAreaFrom) );
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for ( j = 0; j < Vec_FltSize(pWLS->vAreaFrom); j++)
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{
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Vec_StrPutF( vOut, Vec_FltEntry(pWLS->vAreaFrom, j) );
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Vec_StrPutF( vOut, Vec_FltEntry(pWLS->vAreaTo, j) );
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Vec_StrPutS( vOut, (char *)Vec_PtrEntry(pWLS->vWireLoadModel, j) );
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}
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}
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// Write 'cells' vector:
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n_valid_cells = 0;
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SC_LibForEachCell( p, pCell, i )
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if ( !(pCell->seq || pCell->unsupp) )
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n_valid_cells++;
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Vec_StrPutI( vOut, n_valid_cells );
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SC_LibForEachCell( p, pCell, i )
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{
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if ( pCell->seq || pCell->unsupp )
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continue;
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Vec_StrPutS( vOut, pCell->pName );
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Vec_StrPutF( vOut, pCell->area );
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Vec_StrPutI( vOut, pCell->drive_strength );
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// Write 'pins': (sorted at this point; first inputs, then outputs)
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Vec_StrPutI( vOut, pCell->n_inputs);
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Vec_StrPutI( vOut, pCell->n_outputs);
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SC_CellForEachPinIn( pCell, pPin, j )
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{
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assert(pPin->dir == sc_dir_Input);
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Vec_StrPutS( vOut, pPin->pName );
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Vec_StrPutF( vOut, pPin->rise_cap );
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Vec_StrPutF( vOut, pPin->fall_cap );
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}
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SC_CellForEachPinOut( pCell, pPin, j )
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{
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SC_Timings * pRTime;
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word uWord;
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assert(pPin->dir == sc_dir_Output);
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Vec_StrPutS( vOut, pPin->pName );
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Vec_StrPutF( vOut, pPin->max_out_cap );
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Vec_StrPutF( vOut, pPin->max_out_slew );
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Vec_StrPutI( vOut, pCell->n_inputs );
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// write function
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Vec_StrPutS( vOut, pPin->func_text ? pPin->func_text : (char *)"" );
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// write truth table
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assert( Vec_WrdSize(pPin->vFunc) == Abc_Truth6WordNum(pCell->n_inputs) );
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Vec_WrdForEachEntry( pPin->vFunc, uWord, k ) // -- 'size = 1u << (n_vars - 6)'
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Vec_StrPutW( vOut, uWord ); // -- 64-bit number, written uncompressed (low-byte first)
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// Write 'rtiming': (pin-to-pin timing tables for this particular output)
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assert( Vec_PtrSize(pPin->vRTimings) == pCell->n_inputs );
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SC_PinForEachRTiming( pPin, pRTime, k )
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{
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Vec_StrPutS( vOut, pRTime->pName );
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Vec_StrPutI( vOut, Vec_PtrSize(pRTime->vTimings) );
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// -- NOTE! After post-processing, the size of the 'rtiming[k]' vector is either
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// 0 or 1 (in static timing, we have merged all tables to get the worst case).
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// The case with size 0 should only occur for multi-output gates.
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if ( Vec_PtrSize(pRTime->vTimings) == 1 )
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{
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SC_Timing * pTime = (SC_Timing *)Vec_PtrEntry( pRTime->vTimings, 0 );
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// -- NOTE! We don't need to save 'related_pin' string because we have sorted
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// the elements on input pins.
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Vec_StrPutI( vOut, (int)pTime->tsense);
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Abc_SclWriteSurface( vOut, pTime->pCellRise );
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Abc_SclWriteSurface( vOut, pTime->pCellFall );
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Abc_SclWriteSurface( vOut, pTime->pRiseTrans );
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Abc_SclWriteSurface( vOut, pTime->pFallTrans );
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}
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else
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assert( Vec_PtrSize(pRTime->vTimings) == 0 );
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}
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}
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}
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}
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void Abc_SclWriteScl( char * pFileName, SC_Lib * p )
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{
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Vec_Str_t * vOut;
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vOut = Vec_StrAlloc( 10000 );
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Abc_SclWriteLibrary( vOut, p );
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if ( Vec_StrSize(vOut) > 0 )
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{
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FILE * pFile = fopen( pFileName, "wb" );
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|
if ( pFile == NULL )
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printf( "Cannot open file \"%s\" for writing.\n", pFileName );
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else
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|
{
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|
fwrite( Vec_StrArray(vOut), 1, Vec_StrSize(vOut), pFile );
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|
fclose( pFile );
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|
}
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|
}
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|
Vec_StrFree( vOut );
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|
}
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|
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/**Function*************************************************************
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Synopsis [Writing library into text file.]
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|
Description []
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|
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SideEffects []
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|
SeeAlso []
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|
***********************************************************************/
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static void Abc_SclWriteSurfaceText( FILE * s, SC_Surface * p )
|
|
{
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|
Vec_Flt_t * vVec;
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|
float Entry;
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|
int i, k;
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|
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fprintf( s, " index_1(\"" );
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|
Vec_FltForEachEntry( p->vIndex0, Entry, i )
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fprintf( s, "%f%s", Entry, i == Vec_FltSize(p->vIndex0)-1 ? "":", " );
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|
fprintf( s, "\");\n" );
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|
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|
fprintf( s, " index_2(\"" );
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|
Vec_FltForEachEntry( p->vIndex1, Entry, i )
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|
fprintf( s, "%f%s", Entry, i == Vec_FltSize(p->vIndex1)-1 ? "":", " );
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|
fprintf( s, "\");\n" );
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|
|
|
fprintf( s, " values (\"" );
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|
Vec_PtrForEachEntry( Vec_Flt_t *, p->vData, vVec, i )
|
|
{
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|
Vec_FltForEachEntry( vVec, Entry, k )
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|
fprintf( s, "%f%s", Entry, i == Vec_PtrSize(p->vData)-1 && k == Vec_FltSize(vVec)-1 ? "\");":", " );
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|
if ( i == Vec_PtrSize(p->vData)-1 )
|
|
fprintf( s, "\n" );
|
|
else
|
|
{
|
|
fprintf( s, "\\\n" );
|
|
fprintf( s, " " );
|
|
}
|
|
}
|
|
/*
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|
fprintf( s, " approximations: \n" );
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|
fprintf( s, " " );
|
|
for ( i = 0; i < 3; i++ )
|
|
fprintf( s, "%f ", p->approx[0][i] );
|
|
fprintf( s, "\n" );
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|
fprintf( s, " " );
|
|
for ( i = 0; i < 4; i++ )
|
|
fprintf( s, "%f ", p->approx[1][i] );
|
|
fprintf( s, "\n" );
|
|
fprintf( s, " " );
|
|
for ( i = 0; i < 6; i++ )
|
|
fprintf( s, "%f ", p->approx[2][i] );
|
|
fprintf( s, "\n" );
|
|
fprintf( s, " \n" );
|
|
*/
|
|
}
|
|
static void Abc_SclWriteLibraryText( FILE * s, SC_Lib * p )
|
|
{
|
|
SC_WireLoad * pWL;
|
|
SC_WireLoadSel * pWLS;
|
|
SC_Cell * pCell;
|
|
SC_Pin * pPin;
|
|
int n_valid_cells;
|
|
int i, j, k;
|
|
fprintf( s, "/* This Liberty file was generated by ABC on %s */\n", Extra_TimeStamp() );
|
|
fprintf( s, "/* The original unabridged library came from file \"%s\".*/\n\n", p->pFileName );
|
|
|
|
// fprintf( s, "%d", ABC_SCL_CUR_VERSION );
|
|
fprintf( s, "library(%s) {\n\n", p->pName );
|
|
if ( p->default_wire_load && strlen(p->default_wire_load) )
|
|
fprintf( s, " default_wire_load : \"%s\";\n", p->default_wire_load );
|
|
if ( p->default_wire_load_sel && strlen(p->default_wire_load_sel) )
|
|
fprintf( s, " default_wire_load_selection : \"%s\";\n", p->default_wire_load_sel );
|
|
if ( p->default_max_out_slew != -1 )
|
|
fprintf( s, " default_max_transition : %f;\n", p->default_max_out_slew );
|
|
if ( p->unit_time == 9 )
|
|
fprintf( s, " time_unit : \"1ns\";\n" );
|
|
else if ( p->unit_time == 10 )
|
|
fprintf( s, " time_unit : \"100ps\";\n" );
|
|
else if ( p->unit_time == 11 )
|
|
fprintf( s, " time_unit : \"10ps\";\n" );
|
|
else if ( p->unit_time == 12 )
|
|
fprintf( s, " time_unit : \"1ps\";\n" );
|
|
else assert( 0 );
|
|
fprintf( s, " capacitive_load_unit(%.1f,%s);\n", p->unit_cap_fst, p->unit_cap_snd == 12 ? "pf" : "ff" );
|
|
fprintf( s, "\n" );
|
|
|
|
// Write 'wire_load' vector:
|
|
SC_LibForEachWireLoad( p, pWL, i )
|
|
{
|
|
fprintf( s, " wire_load(\"%s\") {\n", pWL->pName );
|
|
fprintf( s, " resistance : %f;\n", pWL->res );
|
|
fprintf( s, " capacitance : %f;\n", pWL->cap );
|
|
for ( j = 0; j < Vec_IntSize(pWL->vFanout); j++ )
|
|
fprintf( s, " fanout_length( %d, %f );\n", Vec_IntEntry(pWL->vFanout, j), Vec_FltEntry(pWL->vLen, j) );
|
|
fprintf( s, " }\n\n" );
|
|
}
|
|
|
|
// Write 'wire_load_sel' vector:
|
|
SC_LibForEachWireLoadSel( p, pWLS, i )
|
|
{
|
|
fprintf( s, " wire_load_selection(\"%s\") {\n", pWLS->pName );
|
|
for ( j = 0; j < Vec_FltSize(pWLS->vAreaFrom); j++)
|
|
fprintf( s, " wire_load_from_area( %f, %f, %s );\n",
|
|
Vec_FltEntry(pWLS->vAreaFrom, j),
|
|
Vec_FltEntry(pWLS->vAreaTo, j),
|
|
(char *)Vec_PtrEntry(pWLS->vWireLoadModel, j) );
|
|
fprintf( s, " }\n\n" );
|
|
}
|
|
|
|
// Write 'cells' vector:
|
|
n_valid_cells = 0;
|
|
SC_LibForEachCell( p, pCell, i )
|
|
if ( !(pCell->seq || pCell->unsupp) )
|
|
n_valid_cells++;
|
|
|
|
SC_LibForEachCell( p, pCell, i )
|
|
{
|
|
if ( pCell->seq || pCell->unsupp )
|
|
continue;
|
|
|
|
fprintf( s, "\n" );
|
|
fprintf( s, " cell(%s) {\n", pCell->pName );
|
|
fprintf( s, " /* n_inputs = %d n_outputs = %d */\n", pCell->n_inputs, pCell->n_outputs );
|
|
fprintf( s, " area : %f;\n", pCell->area );
|
|
fprintf( s, " drive_strength : %d;\n", pCell->drive_strength );
|
|
|
|
SC_CellForEachPinIn( pCell, pPin, j )
|
|
{
|
|
assert(pPin->dir == sc_dir_Input);
|
|
fprintf( s, " pin(%s) {\n", pPin->pName );
|
|
fprintf( s, " direction : %s;\n", "input" );
|
|
fprintf( s, " fall_capacitance : %f;\n", pPin->fall_cap );
|
|
fprintf( s, " rise_capacitance : %f;\n", pPin->rise_cap );
|
|
fprintf( s, " }\n" );
|
|
}
|
|
|
|
SC_CellForEachPinOut( pCell, pPin, j )
|
|
{
|
|
SC_Timings * pRTime;
|
|
// word uWord;
|
|
assert(pPin->dir == sc_dir_Output);
|
|
fprintf( s, " pin(%s) {\n", pPin->pName );
|
|
fprintf( s, " direction : %s;\n", "output" );
|
|
fprintf( s, " max_capacitance : %f;\n", pPin->max_out_cap );
|
|
fprintf( s, " max_transition : %f;\n", pPin->max_out_slew );
|
|
fprintf( s, " function : \"%s\";\n", pPin->func_text ? pPin->func_text : "?" );
|
|
fprintf( s, " /* truth table = " );
|
|
Extra_PrintHex( s, (unsigned *)Vec_WrdArray(pPin->vFunc), pCell->n_inputs );
|
|
fprintf( s, " */\n" );
|
|
|
|
// Write 'rtiming': (pin-to-pin timing tables for this particular output)
|
|
assert( Vec_PtrSize(pPin->vRTimings) == pCell->n_inputs );
|
|
SC_PinForEachRTiming( pPin, pRTime, k )
|
|
{
|
|
if ( Vec_PtrSize(pRTime->vTimings) == 1 )
|
|
{
|
|
SC_Timing * pTime = (SC_Timing *)Vec_PtrEntry( pRTime->vTimings, 0 );
|
|
fprintf( s, " timing() {\n" );
|
|
fprintf( s, " related_pin : \"%s\"\n", pRTime->pName );
|
|
if ( pTime->tsense == sc_ts_Pos )
|
|
fprintf( s, " timing_sense : positive_unate;\n" );
|
|
else if ( pTime->tsense == sc_ts_Neg )
|
|
fprintf( s, " timing_sense : negative_unate;\n" );
|
|
else if ( pTime->tsense == sc_ts_Non )
|
|
fprintf( s, " timing_sense : non_unate;\n" );
|
|
else assert( 0 );
|
|
|
|
fprintf( s, " cell_rise() {\n" );
|
|
Abc_SclWriteSurfaceText( s, pTime->pCellRise );
|
|
fprintf( s, " }\n" );
|
|
|
|
fprintf( s, " cell_fall() {\n" );
|
|
Abc_SclWriteSurfaceText( s, pTime->pCellFall );
|
|
fprintf( s, " }\n" );
|
|
|
|
fprintf( s, " rise_transition() {\n" );
|
|
Abc_SclWriteSurfaceText( s, pTime->pRiseTrans );
|
|
fprintf( s, " }\n" );
|
|
|
|
fprintf( s, " fall_transition() {\n" );
|
|
Abc_SclWriteSurfaceText( s, pTime->pFallTrans );
|
|
fprintf( s, " }\n" );
|
|
fprintf( s, " }\n" );
|
|
}
|
|
else
|
|
assert( Vec_PtrSize(pRTime->vTimings) == 0 );
|
|
}
|
|
fprintf( s, " }\n" );
|
|
}
|
|
fprintf( s, " }\n" );
|
|
}
|
|
fprintf( s, "}\n\n" );
|
|
}
|
|
void Abc_SclWriteLiberty( char * pFileName, SC_Lib * p )
|
|
{
|
|
FILE * pFile = fopen( pFileName, "wb" );
|
|
if ( pFile == NULL )
|
|
printf( "Cannot open text file \"%s\" for writing.\n", pFileName );
|
|
else
|
|
{
|
|
Abc_SclWriteLibraryText( pFile, p );
|
|
fclose( pFile );
|
|
printf( "Dumped internal library into Liberty file \"%s\".\n", pFileName );
|
|
}
|
|
}
|
|
|
|
////////////////////////////////////////////////////////////////////////
|
|
/// END OF FILE ///
|
|
////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
ABC_NAMESPACE_IMPL_END
|
|
|