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187 lines
6.2 KiB
C
187 lines
6.2 KiB
C
/**CFile****************************************************************
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FileName [amapOutput.c]
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SystemName [ABC: Logic synthesis and verification system.]
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PackageName [Technology mapper for standard cells.]
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Synopsis [Core mapping procedures.]
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Author [Alan Mishchenko]
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Affiliation [UC Berkeley]
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Date [Ver. 1.0. Started - June 20, 2005.]
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Revision [$Id: amapOutput.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
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***********************************************************************/
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#include "amapInt.h"
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ABC_NAMESPACE_IMPL_START
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////////////////////////////////////////////////////////////////////////
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/// DECLARATIONS ///
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////////////////////////////////////////////////////////////////////////
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static inline char * Amap_OuputStrsav( Aig_MmFlex_t * p, char * pStr )
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{ return pStr ? strcpy(Aig_MmFlexEntryFetch(p, strlen(pStr)+1), pStr) : NULL; }
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////////////////////////////////////////////////////////////////////////
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/// FUNCTION DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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/**Function*************************************************************
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Synopsis [Allocates structure for storing one gate.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Amap_Out_t * Amap_OutputStructAlloc( Aig_MmFlex_t * pMem, Amap_Gat_t * pGate )
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{
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Amap_Out_t * pRes;
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int nFans = pGate? pGate->nPins : 1;
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pRes = (Amap_Out_t *)Aig_MmFlexEntryFetch( pMem, sizeof(Amap_Out_t)+sizeof(int)*nFans );
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memset( pRes, 0, sizeof(Amap_Out_t) );
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memset( pRes->pFans, 0xff, sizeof(int)*nFans );
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pRes->pName = pGate? Amap_OuputStrsav( pMem, pGate->pName ) : NULL;
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pRes->nFans = nFans;
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return pRes;
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}
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/**Function*************************************************************
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Synopsis [Returns mapped network as an array of structures.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Vec_Ptr_t * Amap_ManProduceMapped( Amap_Man_t * p )
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{
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Vec_Ptr_t * vNodes;
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Aig_MmFlex_t * pMem;
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Amap_Obj_t * pObj, * pFanin;
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Amap_Gat_t * pGate;
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Amap_Out_t * pRes;
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int i, k, iFanin, fCompl;
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float TotalArea = 0.0;
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pMem = Aig_MmFlexStart();
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// create mapping object for each node used in the mapping
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vNodes = Vec_PtrAlloc( 10 );
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Amap_ManForEachObj( p, pObj, i )
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{
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if ( Amap_ObjIsPi(pObj) )
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{
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assert( pObj->fPolar == 0 );
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pRes = Amap_OutputStructAlloc( pMem, NULL );
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pRes->Type = -1;
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pRes->nFans = 0;
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// save this structure
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pObj->iData = Vec_PtrSize( vNodes );
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Vec_PtrPush( vNodes, pRes );
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// create invertor if needed
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if ( pObj->nFouts[1] ) // this PI is used in the neg polarity
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{
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pRes = Amap_OutputStructAlloc( pMem, p->pLib->pGateInv );
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pRes->pFans[0] = pObj->iData;
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// save this structure
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Vec_PtrPush( vNodes, pRes );
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TotalArea += p->pLib->pGateInv->dArea;
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}
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continue;
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}
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if ( Amap_ObjIsNode(pObj) )
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{
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// skip the node that is not used in the mapping
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if ( Amap_ObjRefsTotal(pObj) == 0 )
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continue;
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// get the gate
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pGate = Amap_LibGate( p->pLib, pObj->Best.pSet->iGate );
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assert( pGate->nPins == pObj->Best.pCut->nFans );
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// allocate structure
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pRes = Amap_OutputStructAlloc( pMem, pGate );
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Amap_MatchForEachFaninCompl( p, &pObj->Best, pFanin, fCompl, k )
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{
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assert( Amap_ObjRefsTotal(pFanin) );
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if ( (int)pFanin->fPolar == fCompl )
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pRes->pFans[k] = pFanin->iData;
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else
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pRes->pFans[k] = pFanin->iData + 1;
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}
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// save this structure
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pObj->iData = Vec_PtrSize( vNodes );
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Vec_PtrPush( vNodes, pRes );
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TotalArea += pGate->dArea;
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// create invertor if needed
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if ( pObj->nFouts[!pObj->fPolar] ) // needed in the opposite polarity
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{
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pRes = Amap_OutputStructAlloc( pMem, p->pLib->pGateInv );
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pRes->pFans[0] = pObj->iData;
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// save this structure
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Vec_PtrPush( vNodes, pRes );
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TotalArea += p->pLib->pGateInv->dArea;
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}
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continue;
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}
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if ( Amap_ObjIsPo(pObj) )
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{
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assert( pObj->fPolar == 0 );
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pFanin = Amap_ObjFanin0(p, pObj);
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assert( Amap_ObjRefsTotal(pFanin) );
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if ( Amap_ObjIsConst1(pFanin) )
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{ // create constant node
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if ( Amap_ObjFaninC0(pObj) )
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{
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pRes = Amap_OutputStructAlloc( pMem, p->pLib->pGate0 );
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TotalArea += p->pLib->pGate0->dArea;
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}
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else
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{
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pRes = Amap_OutputStructAlloc( pMem, p->pLib->pGate1 );
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TotalArea += p->pLib->pGate1->dArea;
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}
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// save this structure
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iFanin = Vec_PtrSize( vNodes );
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Vec_PtrPush( vNodes, pRes );
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}
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else
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{
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if ( (int)pFanin->fPolar == Amap_ObjFaninC0(pObj) )
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iFanin = pFanin->iData;
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else
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iFanin = pFanin->iData + 1;
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}
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// create PO node
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pRes = Amap_OutputStructAlloc( pMem, NULL );
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pRes->Type = 1;
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pRes->pFans[0] = iFanin;
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// save this structure
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Vec_PtrPush( vNodes, pRes );
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}
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}
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// return memory manager in the last entry of the array
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Vec_PtrPush( vNodes, pMem );
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return vNodes;
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}
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////////////////////////////////////////////////////////////////////////
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/// END OF FILE ///
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////////////////////////////////////////////////////////////////////////
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ABC_NAMESPACE_IMPL_END
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