Alan Mishchenko b284016313 Handling latches in combinational sizing.

2014-02-13 09:22:25 -08:00

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amap

Debugging and finetuning the flow.

2013-09-17 16:43:42 -07:00

cov

Adding a wrapper around clock() for more accurate time counting in ABC.

2013-05-27 15:09:23 -07:00

fpga

Patching ABC for Yosys.

2013-11-27 12:17:00 -08:00

if

Explanation for one assetion.

2013-11-26 21:35:13 -08:00

mapper

Unifying standard cell library representations.

2013-09-17 13:16:20 -07:00

mio

Bug fix in technology mapper.

2013-11-24 09:51:48 -08:00

mpm

Changes in specialized matching.

2013-10-02 12:55:20 -07:00

scl

Handling latches in combinational sizing.

2014-02-13 09:22:25 -08:00

super

Adding a wrapper around clock() for more accurate time counting in ABC.

2013-05-27 15:09:23 -07:00