mirror of https://github.com/YosysHQ/abc.git
157 lines
4.6 KiB
C
157 lines
4.6 KiB
C
/**CFile****************************************************************
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FileName [fpgaSwitch.c]
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PackageName [MVSIS 1.3: Multi-valued logic synthesis system.]
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Synopsis [Generic technology mapping engine.]
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Author [MVSIS Group]
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Affiliation [UC Berkeley]
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Date [Ver. 1.0. Started - September 8, 2003.]
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Revision [$Id: fpgaSwitch.h,v 1.0 2003/09/08 00:00:00 alanmi Exp $]
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***********************************************************************/
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#include "fpgaInt.h"
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ABC_NAMESPACE_IMPL_START
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////////////////////////////////////////////////////////////////////////
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/// DECLARATIONS ///
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////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////
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/// FUNCTION DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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/**function*************************************************************
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synopsis [Computes the exact area associated with the cut.]
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description []
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sideeffects []
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seealso []
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***********************************************************************/
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float Fpga_CutGetSwitchDerefed( Fpga_Man_t * pMan, Fpga_Node_t * pNode, Fpga_Cut_t * pCut )
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{
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float aResult, aResult2;
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aResult2 = Fpga_CutRefSwitch( pMan, pNode, pCut, 0 );
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aResult = Fpga_CutDerefSwitch( pMan, pNode, pCut, 0 );
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// assert( aResult == aResult2 );
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return aResult;
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}
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/**function*************************************************************
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synopsis [References the cut.]
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description [This procedure is similar to the procedure NodeReclaim.]
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sideeffects []
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seealso []
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***********************************************************************/
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float Fpga_CutRefSwitch( Fpga_Man_t * pMan, Fpga_Node_t * pNode, Fpga_Cut_t * pCut, int fFanouts )
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{
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Fpga_Node_t * pNodeChild;
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float aArea;
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int i;
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// start the area of this cut
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aArea = pNode->Switching;
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if ( pCut->nLeaves == 1 )
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return aArea;
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// go through the children
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for ( i = 0; i < pCut->nLeaves; i++ )
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{
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pNodeChild = pCut->ppLeaves[i];
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assert( pNodeChild->nRefs >= 0 );
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if ( pNodeChild->nRefs++ > 0 )
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continue;
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aArea += Fpga_CutRefSwitch( pMan, pNodeChild, pNodeChild->pCutBest, fFanouts );
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}
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return aArea;
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}
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/**function*************************************************************
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synopsis [Dereferences the cut.]
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description [This procedure is similar to the procedure NodeRecusiveDeref.]
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sideeffects []
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seealso []
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***********************************************************************/
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float Fpga_CutDerefSwitch( Fpga_Man_t * pMan, Fpga_Node_t * pNode, Fpga_Cut_t * pCut, int fFanouts )
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{
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Fpga_Node_t * pNodeChild;
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float aArea;
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int i;
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// start the area of this cut
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aArea = pNode->Switching;
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if ( pCut->nLeaves == 1 )
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return aArea;
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// go through the children
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for ( i = 0; i < pCut->nLeaves; i++ )
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{
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pNodeChild = pCut->ppLeaves[i];
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assert( pNodeChild->nRefs > 0 );
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if ( --pNodeChild->nRefs > 0 )
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continue;
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aArea += Fpga_CutDerefSwitch( pMan, pNodeChild, pNodeChild->pCutBest, fFanouts );
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}
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return aArea;
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}
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/**Function*************************************************************
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Synopsis [Computes the array of mapping.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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float Fpga_MappingGetSwitching( Fpga_Man_t * pMan, Fpga_NodeVec_t * vMapping )
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{
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Fpga_Node_t * pNode;
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float Switch;
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int i;
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Switch = 0.0;
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for ( i = 0; i < vMapping->nSize; i++ )
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{
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pNode = vMapping->pArray[i];
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// at least one phase has the best cut assigned
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assert( !Fpga_NodeIsAnd(pNode) || pNode->pCutBest != NULL );
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// at least one phase is used in the mapping
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assert( pNode->nRefs > 0 );
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// compute the array due to the supergate
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Switch += pNode->Switching;
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}
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// add buffer for each CO driven by a CI
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for ( i = 0; i < pMan->nOutputs; i++ )
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if ( Fpga_NodeIsVar(Fpga_Regular(pMan->pOutputs[i])) && !Fpga_IsComplement(pMan->pOutputs[i]) )
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Switch += Fpga_Regular(pMan->pOutputs[i])->Switching;
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return Switch;
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}
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////////////////////////////////////////////////////////////////////////
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/// END OF FILE ///
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////////////////////////////////////////////////////////////////////////
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ABC_NAMESPACE_IMPL_END
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