mirror of https://github.com/YosysHQ/abc.git
171 lines
5.6 KiB
C
171 lines
5.6 KiB
C
/**CFile****************************************************************
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FileName [seqFpgaCore.c]
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SystemName [ABC: Logic synthesis and verification system.]
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PackageName [Construction and manipulation of sequential AIGs.]
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Synopsis []
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Author [Alan Mishchenko]
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Affiliation [UC Berkeley]
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Date [Ver. 1.0. Started - June 20, 2005.]
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Revision [$Id: seqFpgaCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
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***********************************************************************/
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#include "seqInt.h"
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////////////////////////////////////////////////////////////////////////
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/// DECLARATIONS ///
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////////////////////////////////////////////////////////////////////////
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static Abc_Ntk_t * Seq_NtkSeqFpgaDup( Abc_Ntk_t * pNtk );
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static Abc_Ntk_t * Seq_NtkSeqFpgaMapped( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk );
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////////////////////////////////////////////////////////////////////////
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/// FUNCTION DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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/**Function*************************************************************
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Synopsis [Performs FPGA mapping and retiming.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Abc_Ntk_t * Seq_NtkSeqFpgaRetime( Abc_Ntk_t * pNtk, int fVerbose )
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{
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Abc_Seq_t * p;
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Abc_Ntk_t * pNtkNew;
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Abc_Ntk_t * pNtkMap;
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int RetValue;
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// find the best mapping and retiming (p->vMapping, p->vLags)
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Seq_NtkSeqFpgaMapping( pNtk, fVerbose );
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// duplicate the nodes contained in multiple cuts
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pNtkNew = Seq_NtkSeqFpgaDup( pNtk );
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// implement this retiming
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p = pNtkNew->pManFunc;
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RetValue = Seq_NtkImplementRetiming( pNtkNew, p->vLags, fVerbose );
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if ( RetValue == 0 )
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printf( "Retiming completed but initial state computation has failed.\n" );
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// create the final mapped network
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pNtkMap = Seq_NtkSeqFpgaMapped( pNtkNew, pNtk );
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Abc_NtkDelete( pNtkNew );
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return pNtkMap;
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}
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/**Function*************************************************************
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Synopsis [Derives the network by duplicating some of the nodes.]
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Description [Information about mapping is given as
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(1) array of mapping nodes (p->vMapAnds),
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(2) array of best cuts for each node (p->vMapCuts),
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(3) array of nodes subsumed by each cut (p->vMapBags),
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(4) array of lags of each node in the cut (p->vMapLags).]
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Abc_Ntk_t * Seq_NtkSeqFpgaDup( Abc_Ntk_t * pNtk )
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{
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Abc_Seq_t * p = pNtk->pManFunc;
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Abc_Ntk_t * pNtkNew;
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Abc_Obj_t * pObj, * pLeaf, * pNode, * pDriver, * pDriverNew;
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Vec_Ptr_t * vLeaves, * vInside, * vLags;
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int i, k, TotalLag;
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assert( Abc_NtkIsSeq(pNtk) );
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// start the network
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pNtkNew = Abc_NtkStartFrom( pNtk, pNtk->ntkType, pNtk->ntkFunc );
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// set the next pointers
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Abc_NtkForEachPi( pNtk, pObj, i )
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pObj->pNext = pObj->pCopy;
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Abc_NtkForEachNode( pNtk, pObj, i )
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pObj->pNext = NULL;
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// start the new sequential AIG manager
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Seq_Resize( pNtkNew->pManFunc, 10 + Abc_NtkPiNum(pNtk) + Abc_NtkPoNum(pNtk) + Vec_VecSizeSize(p->vMapBags) );
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// create the nodes
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Vec_PtrForEachEntry( p->vMapAnds, pObj, i )
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{
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// make sure the leaves are assigned
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vLeaves = Vec_VecEntry( p->vMapCuts, i );
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Vec_PtrForEachEntry( vLeaves, pLeaf, k )
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{
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assert( pLeaf->pNext );
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pLeaf->pCopy = pLeaf->pNext;
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}
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// recursively construct the internals
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vInside = Vec_VecEntry( p->vMapBags, i );
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vLags = Vec_VecEntry( p->vMapLags, i );
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Vec_PtrForEachEntry( vInside, pNode, k )
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{
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Abc_NtkDupObj( pNtkNew, pNode );
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Abc_ObjAddFanin( pNode->pCopy, Abc_ObjChild0Copy(pNode) );
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Abc_ObjAddFanin( pNode->pCopy, Abc_ObjChild1Copy(pNode) );
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Abc_ObjSetFaninL( pNode->pCopy, 0, Abc_ObjFaninL(pNode, 0) );
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Abc_ObjSetFaninL( pNode->pCopy, 1, Abc_ObjFaninL(pNode, 1) );
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Seq_NodeDupLats( pNode->pCopy, pNode, 0 );
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Seq_NodeDupLats( pNode->pCopy, pNode, 1 );
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// set the lag of the new node
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TotalLag = Seq_NodeGetLag(pObj) + (char)Vec_PtrEntry(vLags, k);
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Seq_NodeSetLag( pNode->pCopy, (char)TotalLag );
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}
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// set the copy of the last node
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pObj->pNext = pObj->pCopy;
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}
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// set the POs
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Abc_NtkForEachPo( pNtk, pObj, i )
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{
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pDriver = Abc_ObjFanin0(pObj);
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pDriverNew = Abc_ObjNotCond(pDriver->pNext, Abc_ObjFaninC0(pObj));
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Abc_ObjAddFanin( pObj->pCopy, pDriverNew );
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}
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if ( !Abc_NtkCheck( pNtkNew ) )
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fprintf( stdout, "Seq_NtkSeqFpgaDup(): Network check has failed.\n" );
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return pNtkNew;
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}
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/**Function*************************************************************
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Synopsis [Derives the final mapped network.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Abc_Ntk_t * Seq_NtkSeqFpgaMapped( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk )
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{
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Abc_Ntk_t * pNtkMap;
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pNtkMap = NULL;
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if ( !Abc_NtkCheck( pNtkMap ) )
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fprintf( stdout, "Seq_NtkSeqFpgaMapped(): Network check has failed.\n" );
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return pNtkMap;
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}
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////////////////////////////////////////////////////////////////////////
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/// END OF FILE ///
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////////////////////////////////////////////////////////////////////////
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