mirror of https://github.com/YosysHQ/abc.git
716 lines
21 KiB
C
716 lines
21 KiB
C
/**CFile****************************************************************
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FileName [mioUtils.c]
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PackageName [MVSIS 1.3: Multi-valued logic synthesis system.]
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Synopsis [File reading/writing for technology mapping.]
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Author [MVSIS Group]
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Affiliation [UC Berkeley]
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Date [Ver. 1.0. Started - September 8, 2003.]
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Revision [$Id: mioUtils.c,v 1.6 2004/09/03 18:02:20 satrajit Exp $]
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***********************************************************************/
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#include <math.h>
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#include "mioInt.h"
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#include "base/main/main.h"
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#include "exp.h"
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ABC_NAMESPACE_IMPL_START
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////////////////////////////////////////////////////////////////////////
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/// DECLARATIONS ///
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////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////
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/// FUNCTION DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Mio_LibraryDelete( Mio_Library_t * pLib )
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{
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Mio_Gate_t * pGate, * pGate2;
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if ( pLib == NULL )
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return;
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// free the bindings of nodes to gates from this library for all networks
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Abc_FrameUnmapAllNetworks( Abc_FrameGetGlobalFrame() );
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// free the library
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ABC_FREE( pLib->pName );
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Mio_LibraryForEachGateSafe( pLib, pGate, pGate2 )
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Mio_GateDelete( pGate );
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Mem_FlexStop( pLib->pMmFlex, 0 );
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Vec_StrFree( pLib->vCube );
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if ( pLib->tName2Gate )
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st__free_table( pLib->tName2Gate );
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// if ( pLib->dd )
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// Cudd_Quit( pLib->dd );
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ABC_FREE( pLib->ppGates0 );
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ABC_FREE( pLib->ppGatesName );
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ABC_FREE( pLib );
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Mio_GateDelete( Mio_Gate_t * pGate )
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{
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Mio_Pin_t * pPin, * pPin2;
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if ( pGate->nInputs > 6 )
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ABC_FREE( pGate->pTruth );
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Vec_IntFreeP( &pGate->vExpr );
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ABC_FREE( pGate->pOutName );
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ABC_FREE( pGate->pName );
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ABC_FREE( pGate->pForm );
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// if ( pGate->bFunc )
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// Cudd_RecursiveDeref( pGate->pLib->dd, pGate->bFunc );
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Mio_GateForEachPinSafe( pGate, pPin, pPin2 )
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Mio_PinDelete( pPin );
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ABC_FREE( pGate );
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Mio_PinDelete( Mio_Pin_t * pPin )
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{
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ABC_FREE( pPin->pName );
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ABC_FREE( pPin );
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Mio_Pin_t * Mio_PinDup( Mio_Pin_t * pPin )
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{
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Mio_Pin_t * pPinNew;
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pPinNew = ABC_ALLOC( Mio_Pin_t, 1 );
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*pPinNew = *pPin;
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pPinNew->pName = (pPinNew->pName ? Mio_UtilStrsav(pPinNew->pName) : NULL);
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pPinNew->pNext = NULL;
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return pPinNew;
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}
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/**Function*************************************************************
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Synopsis [Check if pin characteristics are the same.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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int Mio_CheckPins( Mio_Pin_t * pPin1, Mio_Pin_t * pPin2 )
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{
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if ( pPin1 == NULL || pPin2 == NULL )
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return 1;
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if ( pPin1->dLoadInput != pPin2->dLoadInput )
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return 0;
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if ( pPin1->dLoadMax != pPin2->dLoadMax )
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return 0;
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if ( pPin1->dDelayBlockRise != pPin2->dDelayBlockRise )
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return 0;
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if ( pPin1->dDelayFanoutRise != pPin2->dDelayFanoutRise )
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return 0;
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if ( pPin1->dDelayBlockFall != pPin2->dDelayBlockFall )
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return 0;
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if ( pPin1->dDelayFanoutFall != pPin2->dDelayFanoutFall )
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return 0;
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return 1;
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}
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int Mio_CheckGates( Mio_Library_t * pLib )
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{
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Mio_Gate_t * pGate;
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Mio_Pin_t * pPin0 = NULL, * pPin = NULL;
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Mio_LibraryForEachGate( pLib, pGate )
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Mio_GateForEachPin( pGate, pPin )
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if ( Mio_CheckPins( pPin0, pPin ) )
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pPin0 = pPin;
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else
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return 0;
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return 1;
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Mio_WritePin( FILE * pFile, Mio_Pin_t * pPin, int NameLen, int fAllPins )
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{
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char * pPhaseNames[10] = { "UNKNOWN", "INV", "NONINV" };
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if ( fAllPins )
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fprintf( pFile, "PIN * " );
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else
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fprintf( pFile, "\n PIN %*s ", NameLen, pPin->pName );
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fprintf( pFile, "%7s ", pPhaseNames[pPin->Phase] );
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fprintf( pFile, "%3d ", (int)pPin->dLoadInput );
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fprintf( pFile, "%3d ", (int)pPin->dLoadMax );
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fprintf( pFile, "%6.2f ", pPin->dDelayBlockRise );
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fprintf( pFile, "%6.2f ", pPin->dDelayFanoutRise );
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fprintf( pFile, "%6.2f ", pPin->dDelayBlockFall );
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fprintf( pFile, "%6.2f", pPin->dDelayFanoutFall );
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Mio_WriteGate( FILE * pFile, Mio_Gate_t * pGate, int GateLen, int NameLen, int FormLen, int fPrintSops, int fAllPins )
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{
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char Buffer[5000];
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Mio_Pin_t * pPin;
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assert( NameLen+FormLen+2 < 5000 );
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sprintf( Buffer, "%s=%s;", pGate->pOutName, pGate->pForm );
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fprintf( pFile, "GATE %-*s ", GateLen, pGate->pName );
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fprintf( pFile, "%8.2f ", pGate->dArea );
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fprintf( pFile, "%-*s ", Abc_MinInt(NameLen+FormLen+2, 30), Buffer );
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// print the pins
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if ( fPrintSops )
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fprintf( pFile, "%s", pGate->pSop? pGate->pSop : "unspecified\n" );
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if ( fAllPins && pGate->pPins ) // equal pins
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Mio_WritePin( pFile, pGate->pPins, NameLen, 1 );
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else // different pins
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Mio_GateForEachPin( pGate, pPin )
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Mio_WritePin( pFile, pPin, NameLen, 0 );
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fprintf( pFile, "\n" );
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Mio_WriteLibrary( FILE * pFile, Mio_Library_t * pLib, int fPrintSops )
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{
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Mio_Gate_t * pGate;
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Mio_Pin_t * pPin;
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int i, GateLen = 0, NameLen = 0, FormLen = 0;
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int fAllPins = Mio_CheckGates( pLib );
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Mio_LibraryForEachGate( pLib, pGate )
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{
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GateLen = Abc_MaxInt( GateLen, strlen(pGate->pName) );
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NameLen = Abc_MaxInt( NameLen, strlen(pGate->pOutName) );
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FormLen = Abc_MaxInt( FormLen, strlen(pGate->pForm) );
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Mio_GateForEachPin( pGate, pPin )
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NameLen = Abc_MaxInt( NameLen, strlen(pPin->pName) );
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}
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fprintf( pFile, "# The genlib library \"%s\".\n", pLib->pName );
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for ( i = 0; i < pLib->nGates; i++ )
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Mio_WriteGate( pFile, pLib->ppGates0[i], GateLen, NameLen, FormLen, fPrintSops, fAllPins );
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}
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/**Function*************************************************************
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Synopsis [Compares the max delay of two gates.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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int Mio_DelayCompare( Mio_Gate_t ** ppG1, Mio_Gate_t ** ppG2 )
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{
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if ( (*ppG1)->dDelayMax < (*ppG2)->dDelayMax )
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return -1;
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if ( (*ppG1)->dDelayMax > (*ppG2)->dDelayMax )
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return 1;
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return 0;
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}
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/**Function*************************************************************
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Synopsis [Collects the set of root gates.]
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Description [Only collects the gates with unique functionality,
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which have fewer inputs and shorter delay than the given limits.]
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Mio_Gate_t ** Mio_CollectRoots( Mio_Library_t * pLib, int nInputs, float tDelay, int fSkipInv, int * pnGates, int fVerbose )
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{
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Mio_Gate_t * pGate;
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Mio_Gate_t ** ppGates;
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int i, nGates, iGate;
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nGates = Mio_LibraryReadGateNum( pLib );
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ppGates = ABC_ALLOC( Mio_Gate_t *, nGates );
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iGate = 0;
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// for each functionality, select gate with the smallest area
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// if equal areas, select gate with lexicographically smaller name
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Mio_LibraryForEachGate( pLib, pGate )
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{
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if ( pGate->nInputs > nInputs )
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continue;
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if ( tDelay > 0.0 && pGate->dDelayMax > (double)tDelay )
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continue;
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if ( pGate->uTruth == 0 || pGate->uTruth == ~0 )
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continue;
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if ( pGate->uTruth == 0xAAAAAAAAAAAAAAAA )
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continue;
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if ( pGate->uTruth == ~0xAAAAAAAAAAAAAAAA && fSkipInv )
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continue;
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if ( pGate->pTwin ) // skip multi-output gates for now
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continue;
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// check if the gate with this functionality already exists
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for ( i = 0; i < iGate; i++ )
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if ( ppGates[i]->uTruth == pGate->uTruth )
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{
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if ( ppGates[i]->dArea > pGate->dArea ||
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(ppGates[i]->dArea == pGate->dArea && strcmp(ppGates[i]->pName, pGate->pName) > 0) )
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ppGates[i] = pGate;
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break;
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}
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if ( i < iGate )
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continue;
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assert( iGate < nGates );
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ppGates[ iGate++ ] = pGate;
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if ( fVerbose )
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printf( "Selected gate %3d: %-20s A = %7.2f D = %7.2f %3s = %-s\n",
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iGate+1, pGate->pName, pGate->dArea, pGate->dDelayMax, pGate->pOutName, pGate->pForm );
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}
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// sort by delay
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if ( iGate > 0 )
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{
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qsort( (void *)ppGates, iGate, sizeof(Mio_Gate_t *),
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(int (*)(const void *, const void *)) Mio_DelayCompare );
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assert( Mio_DelayCompare( ppGates, ppGates + iGate - 1 ) <= 0 );
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}
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if ( pnGates )
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*pnGates = iGate;
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return ppGates;
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}
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/**Function*************************************************************
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Synopsis [Derives the truth table of the gate.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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word Mio_DeriveTruthTable6( Mio_Gate_t * pGate )
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{
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static unsigned uTruths6[6][2] = {
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{ 0xAAAAAAAA, 0xAAAAAAAA },
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{ 0xCCCCCCCC, 0xCCCCCCCC },
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{ 0xF0F0F0F0, 0xF0F0F0F0 },
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{ 0xFF00FF00, 0xFF00FF00 },
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{ 0xFFFF0000, 0xFFFF0000 },
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{ 0x00000000, 0xFFFFFFFF }
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};
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unsigned uTruthRes[2];
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assert( pGate->nInputs <= 6 );
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Mio_DeriveTruthTable( pGate, uTruths6, pGate->nInputs, 6, uTruthRes );
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return *((word *)uTruthRes);
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}
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#if 0
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/**Function*************************************************************
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Synopsis [Recursively derives the truth table of the gate.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Mio_DeriveTruthTable_rec( DdNode * bFunc, unsigned uTruthsIn[][2], unsigned uTruthRes[] )
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{
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unsigned uTruthsCof0[2];
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unsigned uTruthsCof1[2];
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// complement the resulting truth table, if the function is complemented
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if ( Cudd_IsComplement(bFunc) )
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{
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Mio_DeriveTruthTable_rec( Cudd_Not(bFunc), uTruthsIn, uTruthRes );
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uTruthRes[0] = ~uTruthRes[0];
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uTruthRes[1] = ~uTruthRes[1];
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return;
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}
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// if the function is constant 1, return the constant 1 truth table
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if ( bFunc->index == CUDD_CONST_INDEX )
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{
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uTruthRes[0] = MIO_FULL;
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uTruthRes[1] = MIO_FULL;
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return;
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}
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// solve the problem for both cofactors
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Mio_DeriveTruthTable_rec( cuddE(bFunc), uTruthsIn, uTruthsCof0 );
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Mio_DeriveTruthTable_rec( cuddT(bFunc), uTruthsIn, uTruthsCof1 );
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// derive the resulting truth table using the input truth tables
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uTruthRes[0] = (uTruthsCof0[0] & ~uTruthsIn[bFunc->index][0]) |
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(uTruthsCof1[0] & uTruthsIn[bFunc->index][0]);
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uTruthRes[1] = (uTruthsCof0[1] & ~uTruthsIn[bFunc->index][1]) |
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(uTruthsCof1[1] & uTruthsIn[bFunc->index][1]);
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}
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/**Function*************************************************************
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Synopsis [Derives the truth table of the gate.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Mio_DeriveTruthTable( Mio_Gate_t * pGate, unsigned uTruthsIn[][2], int nSigns, int nInputs, unsigned uTruthRes[] )
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{
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Mio_DeriveTruthTable_rec( pGate->bFunc, uTruthsIn, uTruthRes );
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}
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#endif
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/**Function*************************************************************
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Synopsis [Derives the truth table of the gate.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Mio_DeriveTruthTable( Mio_Gate_t * pGate, unsigned uTruthsIn[][2], int nSigns, int nInputs, unsigned uTruthRes[] )
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{
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word uRes, uFanins[6];
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int i;
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assert( pGate->nInputs == nSigns );
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for ( i = 0; i < nSigns; i++ )
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uFanins[i] = (((word)uTruthsIn[i][1]) << 32) | (word)uTruthsIn[i][0];
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uRes = Exp_Truth6( nSigns, pGate->vExpr, (word *)uFanins );
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uTruthRes[0] = uRes & 0xFFFFFFFF;
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uTruthRes[1] = uRes >> 32;
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}
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/**Function*************************************************************
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Synopsis [Reads the number of variables in the cover.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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int Mio_SopGetVarNum( char * pSop )
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{
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char * pCur;
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for ( pCur = pSop; *pCur != '\n'; pCur++ )
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if ( *pCur == 0 )
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return -1;
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return pCur - pSop - 2;
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}
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/**Function*************************************************************
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Synopsis [Derives the truth table of the root of the gate.]
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Description [Given the truth tables of the leaves of the gate,
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this procedure derives the truth table of the root.]
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Mio_DeriveTruthTable2( Mio_Gate_t * pGate, unsigned uTruthsIn[][2], int nTruths, int nInputs, unsigned uTruthRes[] )
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{
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unsigned uSignCube[2];
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int i, nFanins;
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char * pCube;
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// make sure that the number of input truth tables in equal to the number of gate inputs
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assert( pGate->nInputs == nTruths );
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assert( nInputs < 7 );
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nFanins = Mio_SopGetVarNum( pGate->pSop );
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assert( nFanins == nInputs );
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// clean the resulting truth table
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uTruthRes[0] = 0;
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uTruthRes[1] = 0;
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if ( nInputs < 6 )
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{
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// Abc_SopForEachCube( pGate->pSop, nFanins, pCube )
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for ( pCube = pGate->pSop; *pCube; pCube += (nFanins) + 3 )
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{
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// add the clause
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uSignCube[0] = MIO_FULL;
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for ( i = 0; i < nFanins; i++ )
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{
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if ( pCube[i] == '0' )
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uSignCube[0] &= ~uTruthsIn[i][0];
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else if ( pCube[i] == '1' )
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uSignCube[0] &= uTruthsIn[i][0];
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}
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|
}
|
|
if ( nInputs < 5 )
|
|
uTruthRes[0] &= MIO_MASK(1<<nInputs);
|
|
}
|
|
else
|
|
{
|
|
// consider the case when two unsigneds should be used
|
|
// Abc_SopForEachCube( pGate->pSop, nFanins, pCube )
|
|
for ( pCube = pGate->pSop; *pCube; pCube += (nFanins) + 3 )
|
|
{
|
|
uSignCube[0] = MIO_FULL;
|
|
uSignCube[1] = MIO_FULL;
|
|
for ( i = 0; i < nFanins; i++ )
|
|
{
|
|
if ( pCube[i] == '0' )
|
|
{
|
|
uSignCube[0] &= ~uTruthsIn[i][0];
|
|
uSignCube[1] &= ~uTruthsIn[i][1];
|
|
}
|
|
else if ( pCube[i] == '1' )
|
|
{
|
|
uSignCube[0] &= uTruthsIn[i][0];
|
|
uSignCube[1] &= uTruthsIn[i][1];
|
|
}
|
|
}
|
|
uTruthRes[0] |= uSignCube[0];
|
|
uTruthRes[1] |= uSignCube[1];
|
|
}
|
|
}
|
|
}
|
|
|
|
/**Function*************************************************************
|
|
|
|
Synopsis [Derives the area and delay of the root of the gate.]
|
|
|
|
Description [Array of the resulting delays should be initialized
|
|
to the (negative) SUPER_NO_VAR value.]
|
|
|
|
SideEffects []
|
|
|
|
SeeAlso []
|
|
|
|
***********************************************************************/
|
|
void Mio_DeriveGateDelays( Mio_Gate_t * pGate,
|
|
float ** ptPinDelays, int nPins, int nInputs, float tDelayZero,
|
|
float * ptDelaysRes, float * ptPinDelayMax )
|
|
{
|
|
Mio_Pin_t * pPin;
|
|
float Delay, DelayMax;
|
|
int i, k;
|
|
assert( pGate->nInputs == nPins );
|
|
// set all the delays to the unused delay
|
|
for ( i = 0; i < nInputs; i++ )
|
|
ptDelaysRes[i] = tDelayZero;
|
|
// compute the delays for each input and the max delay at the same time
|
|
DelayMax = 0;
|
|
for ( i = 0; i < nInputs; i++ )
|
|
{
|
|
for ( k = 0, pPin = pGate->pPins; pPin; pPin = pPin->pNext, k++ )
|
|
{
|
|
if ( ptPinDelays[k][i] < 0 )
|
|
continue;
|
|
Delay = ptPinDelays[k][i] + (float)pPin->dDelayBlockMax;
|
|
if ( ptDelaysRes[i] < Delay )
|
|
ptDelaysRes[i] = Delay;
|
|
}
|
|
if ( k != nPins )
|
|
{
|
|
printf ("DEBUG: problem gate is %s\n", Mio_GateReadName( pGate ));
|
|
}
|
|
assert( k == nPins );
|
|
if ( DelayMax < ptDelaysRes[i] )
|
|
DelayMax = ptDelaysRes[i];
|
|
}
|
|
*ptPinDelayMax = DelayMax;
|
|
}
|
|
|
|
|
|
/**Function*************************************************************
|
|
|
|
Synopsis [Creates a pseudo-gate.]
|
|
|
|
Description [The pseudo-gate is a N-input gate with all info set to 0.]
|
|
|
|
SideEffects []
|
|
|
|
SeeAlso []
|
|
|
|
***********************************************************************/
|
|
Mio_Gate_t * Mio_GateCreatePseudo( int nInputs )
|
|
{
|
|
Mio_Gate_t * pGate;
|
|
Mio_Pin_t * pPin;
|
|
int i;
|
|
// allocate the gate structure
|
|
pGate = ABC_ALLOC( Mio_Gate_t, 1 );
|
|
memset( pGate, 0, sizeof(Mio_Gate_t) );
|
|
pGate->nInputs = nInputs;
|
|
// create pins
|
|
for ( i = 0; i < nInputs; i++ )
|
|
{
|
|
pPin = ABC_ALLOC( Mio_Pin_t, 1 );
|
|
memset( pPin, 0, sizeof(Mio_Pin_t) );
|
|
pPin->pNext = pGate->pPins;
|
|
pGate->pPins = pPin;
|
|
}
|
|
return pGate;
|
|
}
|
|
|
|
/**Function*************************************************************
|
|
|
|
Synopsis [Adds constant value to all delay values.]
|
|
|
|
Description [The pseudo-gate is a N-input gate with all info set to 0.]
|
|
|
|
SideEffects []
|
|
|
|
SeeAlso []
|
|
|
|
***********************************************************************/
|
|
void Mio_LibraryShiftDelay( Mio_Library_t * pLib, double Shift )
|
|
{
|
|
Mio_Gate_t * pGate;
|
|
Mio_Pin_t * pPin;
|
|
Mio_LibraryForEachGate( pLib, pGate )
|
|
{
|
|
pGate->dDelayMax += Shift;
|
|
Mio_GateForEachPin( pGate, pPin )
|
|
{
|
|
pPin->dDelayBlockRise += Shift;
|
|
pPin->dDelayBlockFall += Shift;
|
|
pPin->dDelayBlockMax += Shift;
|
|
}
|
|
}
|
|
}
|
|
|
|
/**Function*************************************************************
|
|
|
|
Synopsis [Multiply areas/delays by values proportional to fanin count.]
|
|
|
|
Description []
|
|
|
|
SideEffects []
|
|
|
|
SeeAlso []
|
|
|
|
***********************************************************************/
|
|
void Mio_LibraryMultiArea( Mio_Library_t * pLib, double Multi )
|
|
{
|
|
Mio_Gate_t * pGate;
|
|
Mio_LibraryForEachGate( pLib, pGate )
|
|
{
|
|
if ( pGate->nInputs < 2 )
|
|
continue;
|
|
// printf( "Before %8.3f ", pGate->dArea );
|
|
pGate->dArea *= pow( pGate->nInputs, Multi );
|
|
// printf( "After %8.3f Inputs = %d. Factor = %8.3f\n", pGate->dArea, pGate->nInputs, pow( pGate->nInputs, Multi ) );
|
|
}
|
|
}
|
|
void Mio_LibraryMultiDelay( Mio_Library_t * pLib, double Multi )
|
|
{
|
|
Mio_Gate_t * pGate;
|
|
Mio_Pin_t * pPin;
|
|
Mio_LibraryForEachGate( pLib, pGate )
|
|
{
|
|
if ( pGate->nInputs < 2 )
|
|
continue;
|
|
// printf( "Before %8.3f ", pGate->dDelayMax );
|
|
pGate->dDelayMax *= pow( pGate->nInputs, Multi );
|
|
// printf( "After %8.3f Inputs = %d. Factor = %8.3f\n", pGate->dDelayMax, pGate->nInputs, pow( pGate->nInputs, Multi ) );
|
|
Mio_GateForEachPin( pGate, pPin )
|
|
{
|
|
pPin->dDelayBlockRise *= pow( pGate->nInputs, Multi );
|
|
pPin->dDelayBlockFall *= pow( pGate->nInputs, Multi );
|
|
pPin->dDelayBlockMax *= pow( pGate->nInputs, Multi );
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
////////////////////////////////////////////////////////////////////////
|
|
/// END OF FILE ///
|
|
////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
ABC_NAMESPACE_IMPL_END
|
|
|