Alan Mishchenko 79f3ecb15f Technology mapper.		2013-01-08 05:50:37 +08:00
..
cgt	Updating project settings to have simpler include paths.	2012-07-07 20:14:12 -07:00
csw	Updating project settings to have simpler include paths.	2012-07-07 20:14:12 -07:00
cut	Replacing 'st_table' by 'st__table' to resolve linker problems.	2012-09-29 17:11:03 -04:00
dar	Bug fix in XOR balancing (command 'balance -x').	2012-10-05 15:02:26 -07:00
dau	Technology mapper.	2013-01-08 05:50:37 +08:00
fsim	Replacing Mb/Gb to be MB/GB.	2012-07-09 22:57:03 -07:00
fxu	Added an API to convert a multi-output PLA into a shared AIG.	2012-08-29 12:43:55 -07:00
lpk	Renaming If_Lut_t into If_LibLut_t.	2012-12-10 01:07:41 -08:00
mfs	Enabled recording the name of the file GIA is coming from.	2012-09-04 13:52:42 -07:00
nwk	Renaming If_Lut_t into If_LibLut_t.	2012-12-10 01:07:41 -08:00
res	Updating project settings to have simpler include paths.	2012-07-07 20:14:12 -07:00
ret	Replacing 'st_table' by 'st__table' to resolve linker problems.	2012-09-29 17:11:03 -04:00
rwr	Replacing 'st_table' by 'st__table' to resolve linker problems.	2012-09-29 17:11:03 -04:00
rwt	Updating project settings to have simpler include paths.	2012-07-07 20:14:12 -07:00
sim	Updating project settings to have simpler include paths.	2012-07-07 20:14:12 -07:00