mirror of https://github.com/YosysHQ/abc.git
340 lines
11 KiB
C
340 lines
11 KiB
C
/**CFile****************************************************************
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FileName [sclUtil.c]
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SystemName [ABC: Logic synthesis and verification system.]
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PackageName [Standard-cell library representation.]
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Synopsis [Various utilities.]
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Author [Alan Mishchenko, Niklas Een]
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Affiliation [UC Berkeley]
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Date [Ver. 1.0. Started - August 24, 2012.]
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Revision [$Id: sclUtil.c,v 1.0 2012/08/24 00:00:00 alanmi Exp $]
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***********************************************************************/
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#include "sclInt.h"
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#include "map/mio/mio.h"
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#include "bool/kit/kit.h"
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ABC_NAMESPACE_IMPL_START
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////////////////////////////////////////////////////////////////////////
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/// DECLARATIONS ///
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////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////
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/// FUNCTION DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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/**Function*************************************************************
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Synopsis [Reading library from file.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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static unsigned Abc_SclHashString( char * pName, int TableSize )
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{
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static int s_Primes[10] = { 1291, 1699, 2357, 4177, 5147, 5647, 6343, 7103, 7873, 8147 };
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unsigned i, Key = 0;
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for ( i = 0; pName[i] != '\0'; i++ )
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Key += s_Primes[i%10]*pName[i]*pName[i];
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return Key % TableSize;
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}
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int * Abc_SclHashLookup( SC_Lib * p, char * pName )
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{
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int i;
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for ( i = Abc_SclHashString(pName, p->nBins); i < p->nBins; i = (i + 1) % p->nBins )
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if ( p->pBins[i] == -1 || !strcmp(pName, SC_LibCell(p, p->pBins[i])->pName) )
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return p->pBins + i;
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assert( 0 );
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return NULL;
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}
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void Abc_SclHashCells( SC_Lib * p )
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{
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SC_Cell * pCell;
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int i, * pPlace;
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assert( p->nBins == 0 );
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p->nBins = Abc_PrimeCudd( 5 * Vec_PtrSize(p->vCells) );
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p->pBins = ABC_FALLOC( int, p->nBins );
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SC_LibForEachCell( p, pCell, i )
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{
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pPlace = Abc_SclHashLookup( p, pCell->pName );
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assert( *pPlace == -1 );
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*pPlace = i;
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}
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}
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int Abc_SclCellFind( SC_Lib * p, char * pName )
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{
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return *Abc_SclHashLookup( p, pName );
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}
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/**Function*************************************************************
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Synopsis [Links equal gates into rings while sorting them by area.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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static int Abc_SclCompareCells( SC_Cell ** pp1, SC_Cell ** pp2 )
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{
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if ( (*pp1)->n_inputs < (*pp2)->n_inputs )
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return -1;
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if ( (*pp1)->n_inputs > (*pp2)->n_inputs )
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return 1;
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if ( (*pp1)->area < (*pp2)->area )
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return -1;
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if ( (*pp1)->area > (*pp2)->area )
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return 1;
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return strcmp( (*pp1)->pName, (*pp2)->pName );
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}
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void Abc_SclLinkCells( SC_Lib * p )
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{
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SC_Cell * pCell, * pRepr = NULL;
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int i, k;
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assert( Vec_PtrSize(p->vCellClasses) == 0 );
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SC_LibForEachCell( p, pCell, i )
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{
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// find gate with the same function
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SC_LibForEachCellClass( p, pRepr, k )
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if ( pCell->n_inputs == pRepr->n_inputs &&
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pCell->n_outputs == pRepr->n_outputs &&
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Vec_WrdEqual(SC_CellFunc(pCell), SC_CellFunc(pRepr)) )
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break;
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if ( k == Vec_PtrSize(p->vCellClasses) )
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{
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Vec_PtrPush( p->vCellClasses, pCell );
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pCell->pNext = pCell->pPrev = pCell;
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continue;
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}
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// add it to the list before the cell
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pRepr->pPrev->pNext = pCell; pCell->pNext = pRepr;
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pCell->pPrev = pRepr->pPrev; pRepr->pPrev = pCell;
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}
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// sort cells by size the then by name
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qsort( (void *)Vec_PtrArray(p->vCellClasses), Vec_PtrSize(p->vCellClasses), sizeof(void *), (int(*)(const void *,const void *))Abc_SclCompareCells );
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// sort cell lists
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SC_LibForEachCellClass( p, pRepr, k )
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{
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Vec_Ptr_t * vList = Vec_PtrAlloc( 100 );
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SC_RingForEachCell( pRepr, pCell, i )
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Vec_PtrPush( vList, pCell );
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qsort( (void *)Vec_PtrArray(vList), Vec_PtrSize(vList), sizeof(void *), (int(*)(const void *,const void *))Abc_SclCompareCells );
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// create new representative
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pRepr = (SC_Cell *)Vec_PtrEntry( vList, 0 );
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pRepr->pNext = pRepr->pPrev = pRepr;
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pRepr->Order = 0;
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// relink cells
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Vec_PtrForEachEntryStart( SC_Cell *, vList, pCell, i, 1 )
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{
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pRepr->pPrev->pNext = pCell; pCell->pNext = pRepr;
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pCell->pPrev = pRepr->pPrev; pRepr->pPrev = pCell;
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pCell->Order = i;
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}
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// update list
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Vec_PtrWriteEntry( p->vCellClasses, k, pRepr );
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Vec_PtrFree( vList );
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}
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}
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void Abc_SclPrintCells( SC_Lib * p )
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{
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SC_Cell * pCell, * pRepr;
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int i, k, j, nLength = 0;
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assert( Vec_PtrSize(p->vCellClasses) > 0 );
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printf( "Library \"%s\" ", p->pName );
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printf( "containing %d cells in %d classes.\n",
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Vec_PtrSize(p->vCells), Vec_PtrSize(p->vCellClasses) );
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// find the longest name
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SC_LibForEachCellClass( p, pRepr, k )
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SC_RingForEachCell( pRepr, pCell, i )
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nLength = Abc_MaxInt( nLength, strlen(pRepr->pName) );
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// print cells
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SC_LibForEachCellClass( p, pRepr, k )
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{
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printf( "Class%3d : ", k );
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printf( "Ins = %d ", pRepr->n_inputs );
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printf( "Outs = %d", pRepr->n_outputs );
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for ( i = 0; i < pRepr->n_outputs; i++ )
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{
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printf( " " );
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Kit_DsdPrintFromTruth( (unsigned *)Vec_WrdArray(SC_CellPin(pRepr, pRepr->n_inputs+i)->vFunc), pRepr->n_inputs );
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}
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printf( "\n" );
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SC_RingForEachCell( pRepr, pCell, i )
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{
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printf( " %3d : ", i+1 );
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printf( "%-*s ", nLength, pCell->pName );
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printf( "%2d ", pCell->drive_strength );
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printf( "A =%8.2f D =", pCell->area );
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// print linear approximation
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for ( j = 0; j < 3; j++ )
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{
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SC_Pin * pPin = SC_CellPin( pCell, pCell->n_inputs );
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if ( Vec_PtrSize(pPin->vRTimings) > 0 )
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{
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SC_Timings * pRTime = (SC_Timings *)Vec_PtrEntry( pPin->vRTimings, 0 );
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SC_Timing * pTime = (SC_Timing *)Vec_PtrEntry( pRTime->vTimings, 0 );
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printf( " %6.2f", j ? pTime->pCellRise->approx[0][j] : SC_LibTimePs(p, pTime->pCellRise->approx[0][j]) );
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}
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}
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// print input capacitance
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printf( " Cap =" );
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for ( j = 0; j < pCell->n_inputs; j++ )
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{
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SC_Pin * pPin = SC_CellPin( pCell, j );
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printf( " %6.2f", SC_LibCapFf(p, pPin->rise_cap) );
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}
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printf( "\n" );
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}
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}
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}
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/**Function*************************************************************
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Synopsis [Converts pNode->pData gates into array of SC_Lit gate IDs and back.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Vec_Int_t * Abc_SclManFindGates( SC_Lib * pLib, Abc_Ntk_t * p )
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{
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Vec_Int_t * vVec;
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Abc_Obj_t * pObj;
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int i;
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vVec = Vec_IntStartFull( Abc_NtkObjNumMax(p) );
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Abc_NtkForEachNode1( p, pObj, i )
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{
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char * pName = Mio_GateReadName((Mio_Gate_t *)pObj->pData);
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int gateId = Abc_SclCellFind( pLib, pName );
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assert( gateId >= 0 );
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Vec_IntWriteEntry( vVec, i, gateId );
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//printf( "Found gate %s\n", pName );
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}
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return vVec;
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}
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void Abc_SclManSetGates( SC_Lib * pLib, Abc_Ntk_t * p, Vec_Int_t * vGates )
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{
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Abc_Obj_t * pObj;
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int i;
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Abc_NtkForEachNode1( p, pObj, i )
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{
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SC_Cell * pCell = SC_LibCell( pLib, Vec_IntEntry(vGates, Abc_ObjId(pObj)) );
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assert( pCell->n_inputs == Abc_ObjFaninNum(pObj) );
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pObj->pData = Mio_LibraryReadGateByName( (Mio_Library_t *)p->pManFunc, pCell->pName, NULL );
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assert( pObj->fMarkA == 0 && pObj->fMarkB == 0 );
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//printf( "Found gate %s\n", pCell->name );
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}
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}
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/**Function*************************************************************
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Synopsis [Reports percentage of gates of each size.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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#define ABC_SCL_MAX_SIZE 64
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void Abc_SclManPrintGateSizes( SC_Lib * pLib, Abc_Ntk_t * p, Vec_Int_t * vGates )
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{
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Abc_Obj_t * pObj;
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int i, nGates = 0, Counters[ABC_SCL_MAX_SIZE] = {0};
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double TotArea = 0, Areas[ABC_SCL_MAX_SIZE] = {0};
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Abc_NtkForEachNode1( p, pObj, i )
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{
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SC_Cell * pCell = SC_LibCell( pLib, Vec_IntEntry(vGates, Abc_ObjId(pObj)) );
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assert( pCell->Order < ABC_SCL_MAX_SIZE );
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Counters[pCell->Order]++;
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Areas[pCell->Order] += pCell->area;
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TotArea += pCell->area;
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nGates++;
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}
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printf( "Total gates = %d. Total area = %.1f\n", nGates, TotArea );
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for ( i = 0; i < ABC_SCL_MAX_SIZE; i++ )
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{
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if ( Counters[i] == 0 )
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continue;
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printf( "Cell size = %d. ", i );
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printf( "Count = %6d ", Counters[i] );
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printf( "(%5.1f %%) ", 100.0 * Counters[i] / nGates );
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printf( "Area = %12.1f ", Areas[i] );
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printf( "(%5.1f %%) ", 100.0 * Areas[i] / TotArea );
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printf( "\n" );
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}
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}
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void Abc_SclPrintGateSizes( SC_Lib * pLib, Abc_Ntk_t * p )
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{
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Vec_Int_t * vGates;
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vGates = Abc_SclManFindGates( pLib, p );
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Abc_SclManPrintGateSizes( pLib, p, vGates );
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Vec_IntFree( vGates );
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}
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/**Function*************************************************************
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Synopsis [Downsizes each gate to its minimium size.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Abc_SclMinsizePerform( SC_Lib * pLib, Abc_Ntk_t * p, int fVerbose )
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{
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Vec_Int_t * vMinCells, * vGates;
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SC_Cell * pCell, * pRepr = NULL;
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Abc_Obj_t * pObj;
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int i, k, gateId;
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// map each gate in the library into its min-size prototype
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vMinCells = Vec_IntStartFull( Vec_PtrSize(pLib->vCells) );
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SC_LibForEachCellClass( pLib, pRepr, i )
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SC_RingForEachCell( pRepr, pCell, k )
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Vec_IntWriteEntry( vMinCells, pCell->Id, pRepr->Id );
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// update each cell
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vGates = Abc_SclManFindGates( pLib, p );
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Abc_NtkForEachNode1( p, pObj, i )
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{
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gateId = Vec_IntEntry( vGates, i );
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assert( gateId >= 0 && gateId < Vec_PtrSize(pLib->vCells) );
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gateId = Vec_IntEntry( vMinCells, gateId );
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assert( gateId >= 0 && gateId < Vec_PtrSize(pLib->vCells) );
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Vec_IntWriteEntry( vGates, i, gateId );
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}
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Abc_SclManSetGates( pLib, p, vGates );
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Vec_IntFree( vMinCells );
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Vec_IntFree( vGates );
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}
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////////////////////////////////////////////////////////////////////////
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/// END OF FILE ///
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////////////////////////////////////////////////////////////////////////
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ABC_NAMESPACE_IMPL_END
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