Alan Mishchenko 24d9ce6baf Special case in Verilog parser.

2019-12-06 02:19:50 -08:00

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aig

Changes to several APIs.

2019-12-05 09:53:42 -08:00

base

Special case in Verilog parser.

2019-12-06 02:19:50 -08:00

bdd

Fixing some update gcc.

2019-07-24 11:44:28 +07:00

bool

Experiments with truth tables.

2019-11-19 19:30:31 +08:00

map

Adding limit on the depth of recursion when counting exact area in 'amap'.

2019-10-26 16:29:05 +03:00

misc

Adding macro to disable bridge output and APIs by popular demand.

2019-11-09 10:30:02 +02:00

opt

Fixing compilication problem related to shiftFunc().

2019-09-27 11:00:44 -07:00

phys/place

Fixing some warnings by adding cast from 'int' to 'size_t' in memset, memcpy, etc.

2019-03-05 15:57:50 -08:00

proof

Remove assertions when the solver becomes UNSAT after adding constraints in 'scorr -c'.

2019-10-05 10:40:01 -07:00

sat

Changes to several APIs.

2019-11-01 00:58:12 +02:00

demo.c

Travis: build with namespaces enabled, and

2018-04-02 15:30:58 -07:00

generic.c

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generic.h

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starter.c

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template.c

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