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2,810 Commits 27 Branches 57 Tags 58 MiB
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2810 Commits

Author SHA1 Message Date
Alan Mishchenko fa5f05e3a2 Deriving AIG after cell mapping. 2014-10-03 17:15:43 -07:00
Alan Mishchenko 3f31a8580f Bug fix in Verilog writer. 2014-10-02 14:53:30 -07:00
Alan Mishchenko 889b329d01 Adding switch -R to 'if'. 2014-10-02 13:17:53 -07:00
Alan Mishchenko 6d94b6b1a2 Improvements to bit-blaster. 2014-10-01 22:54:08 -07:00
Alan Mishchenko 27b1e49dee Improvements to bit-blaster. 2014-09-30 20:28:49 -07:00
Alan Mishchenko ed1bf0000e Improvements to bit-blaster. 2014-09-30 19:51:39 -07:00
Alan Mishchenko 69519f86cd Adding options to &flow. 2014-09-29 18:08:57 -07:00
Alan Mishchenko a6c81c65df Adding options to &flow2. 2014-09-29 16:23:24 -07:00
Alan Mishchenko 69b4a92286 Adding options to &flow2. 2014-09-29 16:08:59 -07:00
Alan Mishchenko 4960af4e76 Adding options to &flow. 2014-09-29 14:54:55 -07:00
Alan Mishchenko 05ee370f85 Command to rename files in the same directory. 2014-09-28 20:48:53 -07:00
Alan Mishchenko 0c070a35e5 Adding out-of-bounds checks to AIGER readers. 2014-09-28 12:17:02 -07:00
Alan Mishchenko 98e377bdff Adding features to CNF generation. 2014-09-28 12:10:13 -07:00
Alan Mishchenko fbc9c00fd1 Renaming DSD commands (dsd_tune -> dsd_match; dsd_clean -> dsd_filter). 2014-09-28 11:32:26 -07:00
Alan Mishchenko 69bd355467 Support for sequential designs in word-level Verilog. 2014-09-26 16:11:36 -07:00
Alan Mishchenko 6aa1c94ea5 Enabling print-out, for each operator, of the percetage of AND nodes after bit-blasting. 2014-09-25 20:33:29 -07:00
Alan Mishchenko a1b4773c77 Printing node type statistics. 2014-09-24 17:29:34 -04:00
Alan Mishchenko 7d21182067 Printing node type statistics. 2014-09-24 13:01:24 -04:00
Alan Mishchenko 4db5e3c02d Printing node type statistics. 2014-09-24 12:46:35 -04:00
Alan Mishchenko ffaad9ba10 Bug fix in handling MUXes in Verilog parser, induced by recent changes. 2014-09-24 09:05:40 -04:00
Alan Mishchenko ad079f7207 Added switch -t to &flow2. 2014-09-24 00:33:16 -04:00
Alan Mishchenko ea9c1c0bff Added support of word-level MUXes represented as 'always'-statements. 2014-09-24 00:24:54 -04:00
Alan Mishchenko a4d5a9b5bc Added support of word-level MUXes represented as 'always'-statements. 2014-09-24 00:22:18 -04:00
Alan Mishchenko d9b5aa49f7 Enables dumping stats into a file. 2014-09-23 20:32:37 -04:00
Alan Mishchenko 3f95853f3e Extending &cec to take a single-output miter (usage of switch -d has changed!). 2014-09-23 16:22:21 -04:00
Alan Mishchenko 93e5631cff Debugging the bit-blaster. 2014-09-23 16:04:35 -04:00
Alan Mishchenko 3f6c08dfc6 Debugging the bit-blaster. 2014-09-23 12:54:57 -04:00
Alan Mishchenko 15f5428989 Adding switch to enable SOP balancing in '&flow2'. 2014-09-21 21:40:34 -04:00
Alan Mishchenko 8f3dd475ee Tuning the flow scripts. 2014-09-20 23:37:07 -07:00
Alan Mishchenko dc9d327a58 Extending resource limit. 2014-09-20 23:11:32 -07:00
Alan Mishchenko dc9a08bddc Tuning the flow scripts. 2014-09-20 21:52:39 -07:00
Alan Mishchenko 5ce7aa572f Synchronizing packages. 2014-09-20 17:01:47 -07:00
Alan Mishchenko 76666174b4 Synchronizing packages. 2014-09-20 16:41:11 -07:00
Alan Mishchenko 2d4342f8c4 Synchronizing packages. 2014-09-20 14:50:52 -07:00
Alan Mishchenko 00b8cda3d3 Synchronizing packages. 2014-09-20 14:10:05 -07:00
Alan Mishchenko 1fb65889a3 Updating command 'dsd_clean'. 2014-09-20 13:56:26 -07:00
Alan Mishchenko 29494c3a00 Tuning the flow scripts. 2014-09-20 13:15:57 -07:00
Alan Mishchenko a02b020356 Updating DSD balance to handle XOR gate as having the same delay as AND gate. 2014-09-19 19:06:01 -07:00
Alan Mishchenko f989aea224 Improvements to Boolean matching. 2014-09-19 15:08:46 -07:00
Alan Mishchenko b05ee94311 Improvements to Boolean matching. 2014-09-19 14:06:51 -07:00
Alan Mishchenko ee72791293 Improvements to Boolean matching. 2014-09-18 22:26:54 -07:00
Alan Mishchenko 69699da912 Improvements to Boolean matching. 2014-09-18 16:44:04 -07:00
Alan Mishchenko 596f387b03 Improvements to Boolean matching. 2014-09-18 15:13:12 -07:00
Alan Mishchenko a0ed347992 Improving DSD manager. 2014-09-18 14:50:08 -07:00
Alan Mishchenko 043cfcd775 Concurrency for Boolean matching. 2014-09-18 11:46:14 -07:00
Alan Mishchenko 023e92c470 Improvements to Boolean matching. 2014-09-17 18:58:20 -07:00
Alan Mishchenko 69827a5a88 Improvements to word-level Verilog parser. 2014-09-17 15:20:04 -07:00
Alan Mishchenko ffd77ffedd Improvements to word-level Verilog parser. 2014-09-17 15:14:17 -07:00
Alan Mishchenko 43ee0cff25 Spurious assertion. 2014-09-17 09:54:08 -07:00
Alan Mishchenko ec0b9b6b6e Improvements to word-level Verilog parser. 2014-09-16 22:08:22 -07:00