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14 Commits

Author SHA1 Message Date
Alan Mishchenko 0c719ab69e Adding procedure to merge two libraries. 2023-09-08 14:23:14 +07:00
Alan Mishchenko 22a5ab19c8 Adding API to convert Genlib into a simple Liberty. 2016-03-11 00:15:13 +09:00
Alan Mishchenko a4f9776388 Consolidating timing manager Scl_Con_t and propagating changes. 2016-01-07 16:50:01 -08:00
Alan Mishchenko f7c969ca66 Improvements to timing optimization. 2015-11-11 23:12:05 -08:00
Alan Mishchenko 96d8f899d9 Extending and improving timing manager. 2015-11-08 11:44:37 -08:00
Alan Mishchenko 78951b4c6f Improvements to Scl_Lib/SC_Cell data-structure. 2015-09-24 12:12:36 -07:00
Alan Mishchenko 77d64787e0 Changes to be able to compile ABC without CUDD. 2015-08-24 19:49:18 -07:00
Alan Mishchenko 6d0b555dab Support for leakage power in Liberty parser and sizer. 2014-09-16 16:44:51 -07:00
Alan Mishchenko 4774dc56fe Fixing the wire-load approximation problem. 2013-11-07 10:24:47 -08:00
Alan Mishchenko c6b80ffc13 Normalization of slew/load values. 2013-10-13 19:11:49 -07:00
Alan Mishchenko c62f380eff Debugging and finetuning the flow. 2013-09-17 16:59:22 -07:00
Alan Mishchenko a2d97cf2b6 Debugging and finetuning the flow. 2013-09-17 16:43:42 -07:00
Alan Mishchenko 7d3976a763 Unifying standard cell library representations. 2013-09-17 13:16:20 -07:00
Alan Mishchenko ff5d3591d1 Infrastructure to support full Liberty format and unitification of library representations. 2013-09-15 18:23:49 -07:00