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2,074 Commits 27 Branches 57 Tags 58 MiB
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2074 Commits

Author SHA1 Message Date
Alan Mishchenko e9d0466494 Updates for the new BMC engine. 2013-09-05 15:39:18 -07:00
Alan Mishchenko e651e22788 Adding check to &sim3 for the case when the AIG is combinational. 2013-09-05 12:57:55 -07:00
Alan Mishchenko db34dbeb80 Temporarily (?) undoing previous change because it is incompatible with old AIGER files generated by ABC. 2013-09-05 12:55:40 -07:00
Alan Mishchenko e4f9ebfa87 Improved unrolling manager. 2013-09-05 12:52:40 -07:00
Alan Mishchenko eddb194ce0 Making selecting duplication procedure creates a smaller AIG. 2013-09-05 02:15:36 -07:00
Alan Mishchenko e5ae3f28f7 Adding interpolant computation sat_solver2. 2013-09-05 01:47:46 -07:00
Alan Mishchenko f53e56e822 Improved unrolling manager. 2013-09-05 01:44:44 -07:00
Alan Mishchenko 6570fe145c Added Python API status_get_vector() similar to cex_get_vector(). 2013-09-04 17:37:26 -07:00
Alan Mishchenko 63e165bc5f Added Python API status_get_vector() similar to cex_get_vector(). 2013-09-04 17:32:16 -07:00
Alan Mishchenko f591f1cd9a Added Python API status_get_vector() similar to cex_get_vector(). 2013-09-04 17:25:40 -07:00
Alan Mishchenko 30c2c48a65 Adding switch 'ps -s' to skip counting buffers/inverters as nodes. 2013-09-02 23:21:55 -07:00
Alan Mishchenko d1b9ade535 Adding switch 'ps -s' to skip counting buffers/inverters as nodes. 2013-09-02 23:15:15 -07:00
Alan Mishchenko b6cb626a12 Removing some old useless code. 2013-09-02 22:14:20 -07:00
Alan Mishchenko e16e3edae8 Removing some old useless code. 2013-09-02 22:10:27 -07:00
Alan Mishchenko fabc84d15b Adding interpolant computation sat_solver2. 2013-09-02 15:14:57 -07:00
Alan Mishchenko 9914c16868 Adding interpolant computation sat_solver2. 2013-09-02 15:14:49 -07:00
Alan Mishchenko 57b9a9fe13 Modify level computation to take discretized arrival times into account. 2013-09-02 11:07:05 -07:00
Alan Mishchenko 5023be4aa0 Adding switch &get -m to import mapped network into the &-space. 2013-09-01 19:37:47 -07:00
Alan Mishchenko e2f11e14d0 Adding switch &get -m to import mapped network into the &-space. 2013-09-01 19:34:32 -07:00
Alan Mishchenko 44a83bde28 Adding new line (\n) after 'c' at the beginning of the comment section in AIGER format. 2013-08-29 16:25:55 -07:00
Alan Mishchenko 009cc92e05 Buf fixes and minor changes to the &if mapper. 2013-08-29 16:03:40 -07:00
Alan Mishchenko a495163f74 Buf fixes and minor changes to the &if mapper. 2013-08-29 14:41:01 -07:00
Alan Mishchenko eec022ea64 Adding procedures to specify permutations with unused flops. 2013-08-28 20:21:01 -07:00
Alan Mishchenko 42f8082c59 Added switch &sim -g to enable flop grouping. 2013-08-20 12:04:41 -07:00
Alan Mishchenko 1ad363c156 Added switch &sim -g to enable flop grouping. 2013-08-20 08:46:31 -07:00
Alan Mishchenko b7c8f9188d Adding code to count statistics about decomposable LUT5. 2013-08-18 10:42:57 -07:00
Alan Mishchenko 3459683e3b Extending 'permute' to handle user-specified flop permutation. 2013-08-16 13:13:38 -07:00
Alan Mishchenko 7013e0b672 Small changes to compile on Mac. 2013-08-15 00:58:23 -07:00
Alan Mishchenko 9c2b007556 Enabling LUT decomposition in two special cases. 2013-08-14 22:54:25 -07:00
Alan Mishchenko 426b1d2d43 Enabling LUT decomposition in two special cases. 2013-08-14 22:51:28 -07:00
Alan Mishchenko 6de83eb3b6 Enabling LUT decomposition in two special cases. 2013-08-14 22:50:49 -07:00
Alan Mishchenko 728291b087 Enabling LUT decomposition in two special cases. 2013-08-14 20:03:25 -07:00
Alan Mishchenko 0916417e2e Enabling LUT decomposition in two special cases. 2013-08-14 12:10:55 -07:00
Alan Mishchenko 1eae17a89d Bug fix in &if -z. 2013-08-14 11:32:11 -07:00
Alan Mishchenko 9b3dd44cd6 Enabling additional matching feature in the LUT mapper. 2013-08-13 13:01:18 -07:00
Alan Mishchenko ee1e20ddf8 Enabling additional matching feature in the LUT mapper. 2013-08-12 23:34:54 -07:00
Alan Mishchenko fcfafb0601 Enabling additional matching feature in the LUT mapper. 2013-08-12 23:27:20 -07:00
Alan Mishchenko ae27704c13 Integrated buffering and sizing. 2013-08-11 11:35:22 -07:00
Alan Mishchenko ec4804aab6 Integrated buffering and sizing. 2013-08-11 00:49:34 -07:00
Alan Mishchenko 679a9a021a Integrated buffering and sizing. 2013-08-10 18:13:03 -07:00
Alan Mishchenko 6c4252c5c9 Integrated buffering and sizing. 2013-08-10 18:11:09 -07:00
Alan Mishchenko 55872bc302 Integrated buffering and sizing. 2013-08-10 11:36:23 -07:00
Alan Mishchenko 5d0ba30518 Bug fix in incremental timing. 2013-08-10 11:14:33 -07:00
Alan Mishchenko 573d6d7ab7 Enable wire load estimation in buffering/sizing. 2013-08-10 10:27:55 -07:00
Alan Mishchenko 118cb03be4 Integrated buffering and sizing. 2013-08-09 22:55:09 -07:00
Alan Mishchenko 6e2ee1d30a Integrated buffering and sizing. 2013-08-09 22:13:13 -07:00
Alan Mishchenko 4af5587cbf Integrated buffering and sizing. 2013-08-09 21:44:18 -07:00
Alan Mishchenko fbdaf2075f Integrated buffering and sizing. 2013-08-09 21:05:06 -07:00
Alan Mishchenko d4ad3b4156 Improvements to buffering and sizing. 2013-08-09 19:47:58 -07:00
Alan Mishchenko 633db0f4ad Improvements to buffering and sizing. 2013-08-09 17:54:18 -07:00