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2981 Commits

Author SHA1 Message Date
Alan Mishchenko 77dbe2b656 Major rehash of the CBA code. 2015-01-31 19:52:32 -08:00
Alan Mishchenko a523ab792c Preprocessing for multi-output PLA tables. 2015-01-31 15:10:24 -08:00
Alan Mishchenko e30dae5a61 Preprocessing for multi-output PLA tables. 2015-01-31 15:10:01 -08:00
Alan Mishchenko 13cd3a6a4c Preprocessing for multi-output PLA tables. 2015-01-31 14:53:58 -08:00
Alan Mishchenko e293489f71 Preprocessing for multi-output PLA tables. 2015-01-31 13:42:14 -08:00
Alan Mishchenko 6c3f191172 Preprocessing for multi-output PLA tables. 2015-01-31 11:23:22 -08:00
Alan Mishchenko ff1fb1757b Preprocessing for multi-output PLA tables. 2015-01-31 11:10:07 -08:00
Alan Mishchenko c58dd06259 Fixing reported memory alignment issue. 2015-01-27 10:09:57 -08:00
Alan Mishchenko 0f22046bcb New assertions and bug fix in DSD balancing. 2015-01-27 09:54:35 -08:00
Alan Mishchenko 8ff4b79fc2 Several ongoing changes. 2015-01-26 20:48:59 -08:00
Alan Mishchenko 40cbacaf40 Several ongoing changes. 2015-01-26 20:45:28 -08:00
Alan Mishchenko 65cd556b1d Outputting initial state in Wlc_Ntk_t. 2015-01-26 09:14:51 -08:00
Alan Mishchenko 24dbdbae23 Experiment with prime computation. 2015-01-25 14:24:50 -08:00
Alan Mishchenko 416cc3b2ae Outputting initial state in Wlc_Ntk_t. 2015-01-25 11:21:36 -08:00
Alan Mishchenko 3dd4e356fc Fix in deriving the init values for Wlc_Ntk_t. 2015-01-22 15:16:45 -08:00
Alan Mishchenko 674622a3c0 Bug fix in &cone (not able to extract the last PO). 2015-01-22 13:13:30 -08:00
Alan Mishchenko cf83242458 Support of init-state in AIGs derived from word-level designs in Wlc_Ntk_t. 2015-01-21 17:45:48 -08:00
Alan Mishchenko ffc7b60d2d Support of init-state in AIGs derived from word-level designs in Wlc_Ntk_t. 2015-01-21 17:43:46 -08:00
Alan Mishchenko 14425c111e Organizing commands for barbuf-aware flow. 2015-01-20 21:20:31 -08:00
Alan Mishchenko dc8926a928 Word-level extension of Cba_Ntk_t. 2015-01-18 20:38:52 -08:00
Alan Mishchenko d688af2601 Several small bug fixes. 2015-01-17 20:48:42 -08:00
Alan Mishchenko 17610c039f Organizing commands for barbuf-aware flow. 2015-01-17 20:27:23 -08:00
Alan Mishchenko 42cc56576b Compiler warnings. 2015-01-16 16:16:32 -08:00
Alan Mishchenko d6d0627d13 Organizing commands for barbuf-aware flow. 2015-01-16 16:14:16 -08:00
Alan Mishchenko 1a5a11cbc6 Various transformations of Cba_Ntk_t. 2015-01-15 20:08:15 -08:00
Alan Mishchenko c7e3c8f375 Various transformations of Cba_Ntk_t. 2015-01-15 18:23:32 -08:00
Alan Mishchenko e27edf5e1e Various transformations of Cba_Ntk_t. 2015-01-15 18:21:02 -08:00
Alan Mishchenko 8ac8923a91 Various transformations of Cba_Ntk_t. 2015-01-13 21:54:59 -08:00
Alan Mishchenko 2b2f05bacd Various transformations of Cba_Ntk_t. 2015-01-13 17:05:22 -08:00
Alan Mishchenko ee72b500d5 Various transformations of Cba_Ntk_t. 2015-01-11 16:42:38 -08:00
Alan Mishchenko 26b8116ac6 Changing memory model of Cba_Ntk_t. 2015-01-10 17:19:54 -08:00
Alan Mishchenko 63ce84d824 Implementation of CE extraction for multiple MUXes driving D-inputs of FFs. 2015-01-08 16:30:32 -08:00
Alan Mishchenko 4af39856b2 Returning multiple counter-examples. 2015-01-03 22:59:34 -08:00
Alan Mishchenko 3b9e363ef2 Returning multiple counter-examples. 2015-01-03 22:53:58 -08:00
Alan Mishchenko d01810f071 Computing polynomials for AIGs representing arithmetic functions. 2015-01-01 01:20:04 -08:00
Alan Mishchenko 58d28539a7 Gate sizing with barrier buffers. 2014-12-21 22:22:31 -08:00
Alan Mishchenko fa32acde61 Exprimental features in tech-mapping. 2014-12-21 11:30:21 -08:00
Alan Mishchenko 6733abd72e Exprimental features in tech-mapping. 2014-12-21 01:04:39 -08:00
Alan Mishchenko 55f0a2805c Bug fix in reading box library. 2014-12-20 10:16:13 -08:00
Alan Mishchenko 259d53ca3e Simplifying AIG with barrier buffers. 2014-12-19 22:02:28 -08:00
Alan Mishchenko c1d7f29dbd Bug fix in 'testcex' when flop count in the CEX is different from the network (say, after seq synthesis). 2014-12-19 18:36:10 -08:00
Alan Mishchenko d5a952c462 Bug fix in 'testcex' when flop count in the CEX is different from the network (say, after seq synthesis). 2014-12-19 18:34:29 -08:00
Alan Mishchenko dd912b5c61 Incorrect assertion added by recent changes. 2014-12-19 18:24:24 -08:00
Alan Mishchenko c5162ba6d2 Induced bug with in DFS computation. 2014-12-16 21:48:16 -08:00
Alan Mishchenko e658da711c Commenting out assertions in the mapper, which do not work for barrier buffers. 2014-12-14 20:45:24 -08:00
Alan Mishchenko 4ca862f8d2 Compiler warnings. 2014-12-13 22:37:07 -08:00
Alan Mishchenko 88c57c931b Several additional files for source control. 2014-12-13 22:31:48 -08:00
Alan Mishchenko 6b6e5861e5 Integrating barrier buffers. 2014-12-13 20:45:11 -08:00
Alan Mishchenko 6e59e4e542 Adding relax ratio to &synch2. 2014-12-13 20:10:24 -08:00
Alan Mishchenko e946deec81 Integrating barrier buffers. 2014-12-13 20:03:29 -08:00