Alan Mishchenko
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a2d59be3f7
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Integrating SAT-based CEX minimization (bug fix).
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2018-03-25 18:19:06 -07:00 |
Alan Mishchenko
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e639e8fd1b
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Integrating SAT-based CEX minimization.
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2018-03-25 16:46:09 -07:00 |
Alan Mishchenko
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a6d489e7d8
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Updating &mfs to support hard objects.
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2018-03-23 21:32:14 -07:00 |
Alan Mishchenko
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53e7d1f9ef
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Adding switch 'scorr -f' to dump inductive invariant as an AIG.
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2018-03-22 10:10:09 -07:00 |
Alan Mishchenko
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7e9f3f027b
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Adding parameters and improvements to %blast.
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2018-02-28 18:45:44 -08:00 |
Alan Mishchenko
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33971604cf
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Adding support for adders with carry-in in WLC and NDR.
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2018-02-24 09:50:24 -08:00 |
Alan Mishchenko
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b2055bd637
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Improvements to circuit based solver.
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2018-02-20 16:00:58 -08:00 |
Alan Mishchenko
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1d1b11cb65
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Improvements to circuit based solver.
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2018-02-17 13:10:48 -08:00 |
Alan Mishchenko
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fd390aae9d
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Extending MiniLUT to return attributes.
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2018-02-11 17:14:07 -08:00 |
Alan Mishchenko
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f716948c27
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Experiments with LUT mapping.
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2018-02-10 15:45:54 -08:00 |
Alan Mishchenko
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f8d9fc3a9d
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Improvements to NDR to represent hierarchical designs.
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2018-02-05 00:41:05 -08:00 |
Alan Mishchenko
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28602ccf2c
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Improvements to NDR to represent hierarchical designs.
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2018-02-05 00:39:10 -08:00 |
Alan Mishchenko
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3202c2581e
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Improvements to NDR to represent hierarchical designs.
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2018-02-05 00:37:39 -08:00 |
Alan Mishchenko
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99ddb64095
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Adding support of reading and writing designs using a new internal format.
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2018-01-28 18:53:20 -08:00 |
Alan Mishchenko
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c8008383cf
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Experiments with circuit-based SAT.
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2018-01-27 20:29:46 -08:00 |
Alan Mishchenko
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20603c7585
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Experiments with circuit-based SAT.
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2018-01-27 15:25:31 -08:00 |
Alan Mishchenko
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f826956b07
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Experiments with circuit-based SAT.
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2018-01-27 14:33:49 -08:00 |
Alan Mishchenko
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99c4dda767
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Experiments with circuit-based SAT.
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2018-01-27 14:05:00 -08:00 |
Alan Mishchenko
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5158acb113
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Experiments with circuit-based SAT.
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2018-01-27 13:05:37 -08:00 |
Alan Mishchenko
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e4cd0d60f1
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Experiments with SAT-based simulation.
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2018-01-25 00:09:27 -08:00 |
Alan Mishchenko
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066e8d1b17
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Experiments with SAT-based simulation.
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2018-01-23 19:45:17 -08:00 |
Alan Mishchenko
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0ec5d2f7bc
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Fixed crash in &nf when there is no buffer gate.
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2018-01-12 22:28:30 -08:00 |
Alan Mishchenko
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c3dccf3020
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Corner-case bug fixed in CNF generation.
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2017-12-28 13:32:02 -08:00 |
Alan Mishchenko
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feebac4156
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Corner-case bug fixed in CNF generation.
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2017-12-28 13:26:08 -08:00 |
Alan Mishchenko
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e5d8335268
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Experiments with AIG-based simulation.
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2017-12-05 09:49:02 -08:00 |
Alan Mishchenko
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1743979b75
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Adding switch -a to 'write_verilog' to write factored forms without XORs and MUXes.
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2017-12-03 14:39:11 -08:00 |
Alan Mishchenko
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3cc4080c55
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Portability changes for gcc-6 suggested by Clifford.
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2017-12-02 19:44:08 -08:00 |
Alan Mishchenko
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c681506b48
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Improvements to AIG-based quantification.
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2017-11-26 14:41:05 -08:00 |
Baruch Sterin
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d438d9c1b6
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C++ compatibility: fix incompatible parameter list
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2017-11-23 23:32:43 -08:00 |
Baruch Sterin
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d37cc72417
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C++ compatibility: cast returned void*
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2017-11-23 23:32:41 -08:00 |
Alan Mishchenko
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ecccfe0ed5
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Experimental CEX minimization code.
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2017-11-23 21:06:20 -08:00 |
Alan Mishchenko
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203629fd0f
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Extracting CSAT interface and several cleanups.
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2017-11-13 21:49:52 -08:00 |
Alan Mishchenko
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d85bc1dd68
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Changes to make GIA structural hashing use a dedicated array instead of pObj->Value.
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2017-11-13 18:50:04 -08:00 |
Alan Mishchenko
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71d9a16714
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Improvements to quantification.
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2017-11-13 14:56:40 -08:00 |
Alan Mishchenko
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5fd6dc0fca
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Profiling quantification and other changes.
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2017-11-06 22:08:54 -08:00 |
Alan Mishchenko
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716969190a
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Profiling quantification and other changes.
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2017-11-06 16:43:32 -08:00 |
Alan Mishchenko
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e21052dfdd
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Improvements to quantification.
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2017-10-29 12:24:07 -07:00 |
Bruno Schmitt
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50e17ae0f4
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Small fix. Garanteeing pPars is not NULL before checking pPars->fSlacks
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2017-10-24 23:03:32 +02:00 |
Alan Mishchenko
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accf4825e5
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Adding API to dump MiniAIG into a Verilog file and other small changes.
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2017-10-22 15:44:13 -07:00 |
Alan Mishchenko
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298ec14efa
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Integrating Glucose into &qbf.
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2017-10-17 14:09:41 +09:00 |
Alan Mishchenko
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c1b4b79e99
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Integrating Glucose into &qbf.
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2017-10-17 13:53:48 +09:00 |
Alan Mishchenko
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f97b8d2882
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Improvements to SAT based SOP computation.
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2017-10-06 17:16:16 +03:00 |
Alan Mishchenko
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396215532c
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Updates and bug fixes.
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2017-10-04 12:37:38 +03:00 |
Alan Mishchenko
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05ca7dbf47
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Adding printout of slack distribution for mapped networks.
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2017-10-02 13:44:48 +03:00 |
Alan Mishchenko
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c696ae95d0
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Maintenance and updates.
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2017-09-24 23:38:01 -07:00 |
Alan Mishchenko
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287f9efcce
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Maintenance and updates.
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2017-09-20 19:27:46 -07:00 |
Alan Mishchenko
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1e0bbef1ef
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Uncommenting handling of initial values of the flops.
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2017-09-19 17:29:03 -07:00 |
Alan Mishchenko
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b5d42e8bf3
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Adding support for Dimacs input to &satoko.
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2017-09-16 13:13:30 -07:00 |
Alan Mishchenko
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b63e3ee4b4
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Experiment with mapping.
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2017-09-15 12:40:43 -07:00 |
Alan Mishchenko
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5a9fded57f
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Several small changes.
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2017-09-05 21:54:27 -07:00 |