mirror of https://github.com/YosysHQ/abc.git
Version abc70930
This commit is contained in:
Alan Mishchenko
parent
7d7e60f2dc
commit
e54d969161
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@ -0,0 +1,7 @@
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{\rtf1\ansi\ansicpg1252\cocoartf949\cocoasubrtf330
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{\fonttbl\f0\fswiss\fcharset0 Helvetica;}
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{\colortbl;\red255\green255\blue255;}
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\paperw11900\paperh16840\margl1440\margr1440\vieww9000\viewh8400\viewkind0
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\pard\tx566\tx1133\tx1700\tx2267\tx2834\tx3401\tx3968\tx4535\tx5102\tx5669\tx6236\tx6803\ql\qnatural\pardirnatural
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\f0\fs24 \cf0 Go to src folder and open the Xcode Project. Compile and enjoy.}
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@ -8,21 +8,18 @@ PROG := abc
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MODULES := src/base/abc src/base/abci src/base/cmd \
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src/base/io src/base/main src/base/ver \
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src/aig/ivy src/aig/hop src/aig/rwt src/aig/deco \
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src/aig/mem src/aig/dar src/aig/fra src/aig/cnf \
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src/aig/csw src/aig/ioa src/aig/aig src/aig/kit \
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src/aig/bdc src/aig/bar \
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src/bdd/cudd src/bdd/dsd src/bdd/epd src/bdd/mtr \
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src/bdd/parse src/bdd/reo src/bdd/cas \
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src/map/fpga src/map/mapper src/map/mio \
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src/map/super src/map/if src/map/pcm \
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src/map/fpga src/map/mapper src/map/mio src/map/super src/map/if \
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src/misc/extra src/misc/mvc src/misc/st src/misc/util \
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src/misc/espresso src/misc/nm src/misc/vec \
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src/misc/hash \
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src/misc/espresso src/misc/nm src/misc/vec src/misc/hash \
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src/opt/cut src/opt/dec src/opt/fxu src/opt/rwr \
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src/opt/sim src/opt/ret src/opt/res src/opt/lpk \
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src/sat/bsat src/sat/csat src/sat/msat src/sat/fraig \
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src/phys/place
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src/aig/ivy src/aig/hop src/aig/rwt src/aig/deco \
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src/aig/mem src/aig/dar src/aig/fra src/aig/cnf \
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src/aig/csw src/aig/ioa src/aig/aig src/aig/kit \
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src/aig/bdc src/aig/bar
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default: $(PROG)
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Load Diff
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@ -1,29 +1,29 @@
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|||
Microsoft Developer Studio Workspace File, Format Version 6.00
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# WARNING: DO NOT EDIT OR DELETE THIS WORKSPACE FILE!
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###############################################################################
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||||
Project: "abc"=.\abc.dsp - Package Owner=<4>
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Package=<5>
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{{{
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}}}
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Package=<4>
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Package=<5>
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{{{
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Package=<3>
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{{{
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###############################################################################
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Microsoft Developer Studio Workspace File, Format Version 6.00
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# WARNING: DO NOT EDIT OR DELETE THIS WORKSPACE FILE!
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###############################################################################
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Project: "abc"=.\abc.dsp - Package Owner=<4>
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Package=<5>
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{{{
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}}}
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Package=<4>
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{{{
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###############################################################################
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Global:
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Package=<5>
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{{{
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Package=<3>
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{{{
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||||
###############################################################################
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||||
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@ -88,7 +88,6 @@ alias wp write_pla
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alias wv write_verilog
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# standard scripts
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alias share "b; multi; fx; b"
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alias resyn "b; rw; rwz; b; rwz; b"
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alias resyn2 "b; rw; rf; b; rw; rwz; b; rfz; rwz; b"
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alias resyn2a "b; rw; b; rw; rwz; b; rwz; b"
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@ -100,6 +99,7 @@ alias choice2 "fraig_store; balance; fraig_store; resyn; fraig_store; resyn2
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alias rwsat "st; rw -l; b -l; rw -l; rf -l"
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alias rwsat2 "st; rw -l; b -l; rw -l; rf -l; fraig; rw -l; b -l; rw -l; rf -l"
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alias shake "st; ps; sat -C 5000; rw -l; ps; sat -C 5000; b -l; rf -l; ps; sat -C 5000; rfz -l; ps; sat -C 5000; rwz -l; ps; sat -C 5000; rfz -l; ps; sat -C 5000"
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alias share "st; multi -m; fx; resyn2"
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# resubstitution scripts for the IWLS paper
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alias src_rw "st; rw -l; rwz -l; rwz -l"
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@ -112,65 +112,13 @@ alias compress2rs "b -l; rs -K 6 -l; rw -l; rs -K 6 -N 2 -l; rf -l; rs -K 8 -l;
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alias resyn2rsdc "b; rs -K 6 -F 2; rw; rs -K 6 -N 2 -F 2; rf; rs -K 8 -F 2; b; rs -K 8 -N 2 -F 2; rw; rs -K 10 -F 2; rwz; rs -K 10 -N 2 -F 2; b; rs -K 12 -F 2; rfz; rs -K 12 -N 2 -F 2; rwz; b"
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alias compress2rsdc "b -l; rs -K 6 -F 2 -l; rw -l; rs -K 6 -N 2 -F 2 -l; rf -l; rs -K 8 -F 2 -l; b -l; rs -K 8 -N 2 -F 2 -l; rw -l; rs -K 10 -F 2 -l; rwz -l; rs -K 10 -N 2 -F 2 -l; b -l; rs -K 12 -F 2 -l; rfz -l; rs -K 12 -N 2 -F 2 -l; rwz -l; b -l"
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# minimizing for FF literals
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alias fflitmin "compress2rs; ren; sop; ps -f"
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||||
# temporaries
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#alias t "rvl th/lib.v; rvv th/t2.v"
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||||
#alias t "so c/pure_sat/test.c"
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#alias t "r c/14/csat_998.bench; st; ps"
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#alias t0 "r res.blif; aig; mfs"
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#alias t "r res2.blif; aig; mfs"
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#alias tt "r a/quip_opt/nut_001_opt.blif"
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#alias ttb "wh a/quip_opt/nut_001_opt.blif 1.blif"
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#alias ttv "wh a/quip_opt/nut_001_opt.blif 1.v"
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alias reach "st; ps; compress2; ps; qrel; ps; compress2; ps; qreach -v; ps"
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alias qs1 "qvar -I 96 -u; ps; qbf -P 96"
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alias qs2 "qvar -I 96 -u; qvar -I 97 -u; ps; qbf -P 96"
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alias qs3 "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; ps; qbf -P 96"
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||||
alias qs4 "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; qvar -I 99 -u; ps; qbf -P 96"
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alias qs5 "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; qvar -I 99 -u; qvar -I 100 -u; ps; qbf -P 96"
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alias qs6 "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; qvar -I 99 -u; qvar -I 100 -u; qvar -I 101 -u; ps; qbf -P 96"
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alias qs7 "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; qvar -I 99 -u; qvar -I 100 -u; qvar -I 101 -u; qvar -I 102 -u; ps; qbf -P 96"
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||||
alias qs8 "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; qvar -I 99 -u; qvar -I 100 -u; qvar -I 101 -u; qvar -I 102 -u; qvar -I 103 -u; ps; qbf -P 96"
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alias qs9 "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; qvar -I 99 -u; qvar -I 100 -u; qvar -I 101 -u; qvar -I 102 -u; qvar -I 103 -u; qvar -I 104 -u; ps; qbf -P 96"
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alias qsA "qvar -I 96 -u; qvar -I 97 -u; qvar -I 98 -u; qvar -I 99 -u; qvar -I 100 -u; qvar -I 101 -u; qvar -I 102 -u; qvar -I 103 -u; qvar -I 104 -u; qvar -I 105 -u; ps; qbf -P 96"
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||||
alias chnew "st; haig_start; resyn2; haig_use"
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alias chnewrs "st; haig_start; resyn2rs; haig_use"
|
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|
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alias stdsd "r test/6in.blif; st; ps; u; bdd; dsd -g; st; ps"
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alias trec "rec_start; r c.blif; st; rec_add; rec_use"
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alias trec4 "rec_start -K 4; r i10.blif; st; rec_add; rec_use"
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alias trec5 "rec_start -K 5; r i10.blif; st; rec_add; rec_use"
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alias trec6 "rec_start -K 6; r i10.blif; st; rec_add; rec_use"
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alias trec7 "rec_start -K 7; r i10.blif; st; rec_add; rec_use"
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alias trec8 "rec_start -K 8; r i10.blif; st; rec_add; rec_use"
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alias trec10 "rec_start -K 10; r i10.blif; st; rec_add; rec_use"
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alias trec12 "rec_start -K 12; r i10.blif; st; rec_add; rec_use"
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||||
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||||
#alias tsh "r i10_if.blif; st; ps; u; sw; st; ps; cec"
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||||
alias tst4 "r i10_if4.blif; st; ps; r x/rec4_.blif; st; rec_start; r i10_if4.blif; st -r; ps; cec"
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||||
alias tst4n "r i10_if4.blif; st; ps; r 5npn/all_functions.aig; st; rec_start; r i10_if4.blif; st -r; ps; cec"
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alias tst6 "r i10_if6.blif; st; ps; r x/rec6_16_.blif; st; rec_start; r i10_if6.blif; st -r; ps; cec"
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#alias t "r c.blif; st; wc c.cnf"
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||||
#alias t "r test/dsdmap6.blif; lutpack -vw; cec"
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#alias t "r i10_if4.blif; lp"
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#alias t1 "r pj1_if4.blif; lp"
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||||
#alias t2 "r pj1_if6.blif; lp"
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||||
#alias t "r pj/pj1.blif; st; dfraig -v"
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||||
#alias t "r c/16/csat_2.bench; st; dfraig -C 100 -v -r"
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||||
#alias t "r c/16/csat_147.bench; st; dfraig -C 10 -v -r"
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||||
#alias t "r i10.blif; st; ps; csweep; ps; cec"
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||||
#alias t "r c/5/csat_777.bench; st; csweep -v"
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||||
#alias t "r i10.blif; st; drw -v"
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#alias t "r c.blif; st; drf"
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alias t "r i10.blif; st; dchoice; ps"
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||||
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||||
alias bmc "frames -i -F 10; orpos; iprove"
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||||
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||||
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||||
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@ -1,29 +1,29 @@
|
|||
Microsoft Developer Studio Workspace File, Format Version 6.00
|
||||
# WARNING: DO NOT EDIT OR DELETE THIS WORKSPACE FILE!
|
||||
|
||||
###############################################################################
|
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|
||||
Project: "abclib"=.\abclib.dsp - Package Owner=<4>
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Package=<5>
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Package=<4>
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Package=<5>
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Package=<3>
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Microsoft Developer Studio Workspace File, Format Version 6.00
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Project: "abclib"=.\abclib.dsp - Package Owner=<4>
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@ -1,102 +1,102 @@
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# Microsoft Developer Studio Project File - Name="abctestlib" - Package Owner=<4>
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# TARGTYPE "Win32 (x86) Console Application" 0x0103
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CFG=abctestlib - Win32 Debug
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# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib C:\_projects\abc\abclib\abclib_release.lib /nologo /subsystem:console /machine:I386 /out:"_TEST/abctestlib.exe"
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# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib C:\_projects\abc\abclib\abclib_debug.lib /nologo /subsystem:console /debug /machine:I386 /out:"_TEST/abctestlib.exe" /pdbtype:sept
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<html>
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<body>
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<pre>
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||||
<h1>Build Log</h1>
|
||||
<h3>
|
||||
--------------------Configuration: abctestlib - Win32 Release--------------------
|
||||
</h3>
|
||||
<h3>Command Lines</h3>
|
||||
Creating temporary file "C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP20B8.tmp" with contents
|
||||
[
|
||||
/nologo /ML /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /Fp"Release/abctestlib.pch" /YX /Fo"Release/" /Fd"Release/" /FD /c
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|
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|
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[
|
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kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib C:\_projects\abc\abclib\abclib_release.lib /nologo /subsystem:console /incremental:no /pdb:"Release/abctestlib.pdb" /machine:I386 /out:"_TEST/abctestlib.exe"
|
||||
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|
||||
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|
||||
Creating command line "link.exe @C:\DOCUME~1\alanmi\LOCALS~1\Temp\RSP20B9.tmp"
|
||||
<h3>Output Window</h3>
|
||||
Compiling...
|
||||
demo.c
|
||||
Linking...
|
||||
|
||||
|
||||
|
||||
<h3>Results</h3>
|
||||
abctestlib.exe - 0 error(s), 0 warning(s)
|
||||
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10--01011 0000001000000000000
|
||||
110110100 0001000110011000000
|
||||
100010011 0100010110011000000
|
||||
101110010 0000000111100000000
|
||||
001001100 0000010110001101110
|
||||
110100001 0010000111000000000
|
||||
110100011 0010010100001100000
|
||||
010100-10 0000010100100000000
|
||||
010100000 0000100101001101001
|
||||
11101-110 0000001010000000000
|
||||
1-01010-1 0000000001000000000
|
||||
001111000 0000001101100001001
|
||||
00101100- 0010000001100000000
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||||
0100010-0 0000001100100000000
|
||||
010000110 0001110011000000000
|
||||
001-11110 0000001010100000000
|
||||
101101111 0101110000010010000
|
||||
-1-011101 0000000010000000000
|
||||
00101-101 0000000101100000000
|
||||
0101-0010 0010011000000000000
|
||||
10100010- 0000100001010000000
|
||||
-1011001- 0000000001000000000
|
||||
10111100- 0100001001000000000
|
||||
1111-1100 0000001100000000000
|
||||
10000000- 0000100000110010000
|
||||
110100101 0000011101000000000
|
||||
010-01111 0000001110000000000
|
||||
001010110 0000101000110011111
|
||||
001111100 0011011100000000000
|
||||
101100-11 0010100010000000000
|
||||
11101111- 0000000000110010000
|
||||
010111011 0011101001000000000
|
||||
11001-1-1 0000000001000000000
|
||||
101110111 0010000011010010000
|
||||
111001001 0000101001100000000
|
||||
0-1001010 0000000111000000000
|
||||
100011010 0010101110000000000
|
||||
01110100- 0011000001000000000
|
||||
11-111-00 0010000000000000000
|
||||
11-1-1111 0010000000000000000
|
||||
110110-10 0010100010000000000
|
||||
011101101 0000001011001010000
|
||||
1-110110- 0000010000000000000
|
||||
0-1001001 0000000100111000000
|
||||
100100101 0011101000010010000
|
||||
1-0111011 0100011000010000000
|
||||
111110010 0010011100000000000
|
||||
11-010-10 0000001000000000000
|
||||
111101101 0000101000101100000
|
||||
010111001 0000111100100000000
|
||||
011001-01 0010001010000000000
|
||||
010110001 0001110001011000000
|
||||
10100000- 0010000000101100000
|
||||
01110-111 0000110001000000000
|
||||
111010001 0010000001100110000
|
||||
1-1101011 0010010000100000000
|
||||
100-11011 0000010010100100000
|
||||
100111100 0010100110000110000
|
||||
111000000 0010000001110010000
|
||||
100010101 0010011101000000000
|
||||
01011011- 0000010001010010000
|
||||
10100101- 0010000000110010000
|
||||
010010110 0001001101100000101
|
||||
01111001- 0010000000100110000
|
||||
-11000010 0000010001100000000
|
||||
101-10001 0010000000110010000
|
||||
010000100 0010010101000110000
|
||||
10-00-100 0010000000100000000
|
||||
110000111 0010111010000000000
|
||||
1-00100-0 0010000000100000000
|
||||
-100-0000 0010000000100000000
|
||||
011000000 0001011101000000000
|
||||
011-10011 0000001101000000000
|
||||
1111011-0 0000100010100000000
|
||||
-11010011 0000010011000000000
|
||||
101000111 0010001110100000000
|
||||
011010001 0001000101101100000
|
||||
1-1100100 0010000101000000000
|
||||
010010011 0000000111110010000
|
||||
001111010 0000110111000001001
|
||||
111-11010 0000100110000000000
|
||||
010001011 0000011101011000000
|
||||
01110001- 0010000001010010000
|
||||
1010--011 0010000000100000000
|
||||
010010001 0010001101010010000
|
||||
110-01011 0000100110000100000
|
||||
10-011001 0001010110000000000
|
||||
10-1100-1 0000000001100000000
|
||||
010001111 0011110001100000000
|
||||
001111001 0000011011100001001
|
||||
001110110 0010011101000001001
|
||||
0101000-1 0001001101000000000
|
||||
01100-01- 0000101000000000000
|
||||
110110101 0010101101000000000
|
||||
010101100 0010011010001101001
|
||||
11001-01- 0010000000100000000
|
||||
110001111 0010001010111000000
|
||||
010110000 0000111010011001001
|
||||
1-1-00011 0010100000000000000
|
||||
0101101-0 0000111100000000000
|
||||
011010101 0010000011111000000
|
||||
110010110 0010000110110010000
|
||||
11-01-101 0001000100000000000
|
||||
101--0100 0010001000000000000
|
||||
001010100 0000001011111001100
|
||||
10-000101 0010100101000000000
|
||||
101111010 0000101001100110000
|
||||
101-01000 0001010110000000000
|
||||
111011001 0000111010100000000
|
||||
1010--110 0000001100000000000
|
||||
01-000110 0010001100100000000
|
||||
101010010 0010000111010010000
|
||||
11-10-010 0010000000100000000
|
||||
1011--011 0000010001000000000
|
||||
110110011 0010011100011000000
|
||||
110001010 0100111010001100000
|
||||
01011-110 0001001010010010000
|
||||
110-10111 0001010110000000000
|
||||
100011111 0001111000111000000
|
||||
10100111- 0000111000100000000
|
||||
11111111- 0010001000011000000
|
||||
00-0000-- 0000000000000110001
|
||||
100111000 0001111010011000000
|
||||
011000100 0011101110000000000
|
||||
-1100101- 0000000101000000000
|
||||
0110-1111 0010001100100000000
|
||||
111100000 0001011100010010000
|
||||
011111111 0011111000100000000
|
||||
1111-100- 0010000000100000000
|
||||
100-01010 0100001101100000000
|
||||
010010111 0010011101100000000
|
||||
1101-1000 0000101110000000000
|
||||
111010101 0010001001101100000
|
||||
110010-11 0000101011000000000
|
||||
1-1100001 0000111010000000000
|
||||
111000001 0000000111110010000
|
||||
1100--0-0 0000000000100000000
|
||||
011001100 0001111000110100000
|
||||
001111110 0010110101001010000
|
||||
1010-100- 0001110000000000000
|
||||
111110000 0010000111001010000
|
||||
100010111 0010101101000110000
|
||||
011110101 0001111101000000000
|
||||
01111110- 0000001011100000000
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||||
-1--00011 0000001000000000000
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||||
011111010 0011010110011000000
|
||||
101010111 0000111011100000000
|
||||
010111101 0010011100110010000
|
||||
-11-01-11 0000000000100000000
|
||||
111110100 0000011101010100000
|
||||
010101001 0010001111000110000
|
||||
1-1011-1- 0010000000000000000
|
||||
011110001 0011011100010100000
|
||||
100000111 0000011111010010000
|
||||
101111100 0010010111100000000
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||||
110100111 0001111001011000000
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||||
101100010 0001011011000110000
|
||||
111100-10 0000101011000000000
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||||
101101001 0010101110011000000
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||||
10-000011 0000111010100000000
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||||
11001010- 0010001001010010000
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||||
101100110 0010101101001100000
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||||
101-01110 0001111000100000000
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||||
011010010 0010001101101100000
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||||
10-001110 0001011011000000000
|
||||
10000-000 0001011100010010000
|
||||
110-11101 0001111000100000000
|
||||
101011100 0000101111001010000
|
||||
1-0000110 0010001101100000000
|
||||
100011100 0011011001101100000
|
||||
111110110 0001111001000110000
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||||
0110111-1 0001011101000000000
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||||
010000111 0001001111101100000
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||||
11011000- 0001011011000000000
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||||
101010000 0001101111100000000
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||||
100110111 0011001101101010000
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||||
1101-1001 0010010101100000000
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||||
111100101 0010001110110010000
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||||
110011111 0001101110100110000
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||||
100101101 0010010111110010000
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||||
111001000 0100001111101100000
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||||
0010001-- 0000000011011101110
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||||
010111000 0000011111110010000
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||||
1-0000000 0001101111000000000
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||||
110111010 0011011001110010000
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||||
101101010 0010010111111000000
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||||
011110111 0010101111001100000
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||||
110100110 0000111011101010000
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||||
111110111 0001111111000000000
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||||
01-011000 0001011111000000000
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||||
00-00-0-- 0000000000011001110
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||||
11110-1-0 0001001101000000000
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111110101 0000111011100110000
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001101100 0010011111111000000
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010101101 0001111111001101001
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010001100 0000111111111000011
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||||
111001111 0011101111010100000
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||||
1000000-0 0000111111010010000
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||||
011110110 0001111111101100000
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||||
000------ 0000000000011111111
|
||||
.e
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,353 @@
|
|||
.model s444
|
||||
.inputs G0 G1 G2
|
||||
.outputs G118 G167 G107 G119 G168 G108
|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
10 1
|
||||
.names [131] [156] [157]
|
||||
00 1
|
||||
.names G17 [157] [158]
|
||||
01 1
|
||||
.names [131] [156] [159]
|
||||
10 1
|
||||
.names [158] [159] G28_in
|
||||
00 1
|
||||
.names [122] [126] [161]
|
||||
11 1
|
||||
.names G21 G22 [162]
|
||||
01 1
|
||||
.names G0 [162] [163]
|
||||
01 1
|
||||
.names [161] [163] [164]
|
||||
00 1
|
||||
.names G20 [164] [165]
|
||||
00 1
|
||||
.names G19 [165] [166]
|
||||
01 1
|
||||
.names [130] [166] [167]
|
||||
00 1
|
||||
.names [131] [167] [168]
|
||||
00 1
|
||||
.names G17 [168] [169]
|
||||
01 1
|
||||
.names [131] [167] [170]
|
||||
10 1
|
||||
.names [169] [170] G29_in
|
||||
00 1
|
||||
.names G20 G21 [172]
|
||||
10 1
|
||||
.names G0 G24 [173]
|
||||
00 1
|
||||
.names [172] [173] [174]
|
||||
11 1
|
||||
.names G19 [174] G30_in
|
||||
11 1
|
||||
.names G1 G31 [176]
|
||||
00 1
|
||||
.names G1 G31 [177]
|
||||
11 1
|
||||
.names [176] [177] [178]
|
||||
00 1
|
||||
.names G0 [178] G31_in
|
||||
01 1
|
||||
.names [131] G24_in
|
||||
0 1
|
||||
.names [153] G27_in
|
||||
0 1
|
||||
.names G27 G118
|
||||
1 1
|
||||
.names G29 G167
|
||||
0 1
|
||||
.names G25 G107
|
||||
1 1
|
||||
.names G28 G119
|
||||
0 1
|
||||
.names G30 G168
|
||||
1 1
|
||||
.names G26 G108
|
||||
1 1
|
||||
.end
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -17,7 +17,7 @@ Several things to try if it does not compile on your platform:
|
|||
(c) Comment calls to Libs_Init() and Libs_End() in "src\base\main\mainInit.c"
|
||||
- Try linking with gcc (rather than g++)
|
||||
For this replace "LD := g++" with "LD := gcc -lm" in Makefile
|
||||
- If your Linux distributin does not have "readline", you may have problems
|
||||
- If your Linux distribution does not have "readline", you may have problems
|
||||
compiling ABC with gcc. Please try installing this library from
|
||||
http://tiswww.case.edu/php/chet/readline/rltop.html
|
||||
|
||||
Binary file not shown.
|
|
@ -0,0 +1,79 @@
|
|||
.\"Modified from man(1) of FreeBSD, the NetBSD mdoc.template, and mdoc.samples.
|
||||
.\"See Also:
|
||||
.\"man mdoc.samples for a complete listing of options
|
||||
.\"man mdoc for the short list of editing options
|
||||
.\"/usr/share/misc/mdoc.template
|
||||
.Dd 7/21/08 \" DATE
|
||||
.Dt abc 1 \" Program name and manual section number
|
||||
.Os Darwin
|
||||
.Sh NAME \" Section Header - required - don't modify
|
||||
.Nm abc,
|
||||
.\" The following lines are read in generating the apropos(man -k) database. Use only key
|
||||
.\" words here as the database is built based on the words here and in the .ND line.
|
||||
.Nm Other_name_for_same_program(),
|
||||
.Nm Yet another name for the same program.
|
||||
.\" Use .Nm macro to designate other names for the documented program.
|
||||
.Nd This line parsed for whatis database.
|
||||
.Sh SYNOPSIS \" Section Header - required - don't modify
|
||||
.Nm
|
||||
.Op Fl abcd \" [-abcd]
|
||||
.Op Fl a Ar path \" [-a path]
|
||||
.Op Ar file \" [file]
|
||||
.Op Ar \" [file ...]
|
||||
.Ar arg0 \" Underlined argument - use .Ar anywhere to underline
|
||||
arg2 ... \" Arguments
|
||||
.Sh DESCRIPTION \" Section Header - required - don't modify
|
||||
Use the .Nm macro to refer to your program throughout the man page like such:
|
||||
.Nm
|
||||
Underlining is accomplished with the .Ar macro like this:
|
||||
.Ar underlined text .
|
||||
.Pp \" Inserts a space
|
||||
A list of items with descriptions:
|
||||
.Bl -tag -width -indent \" Begins a tagged list
|
||||
.It item a \" Each item preceded by .It macro
|
||||
Description of item a
|
||||
.It item b
|
||||
Description of item b
|
||||
.El \" Ends the list
|
||||
.Pp
|
||||
A list of flags and their descriptions:
|
||||
.Bl -tag -width -indent \" Differs from above in tag removed
|
||||
.It Fl a \"-a flag as a list item
|
||||
Description of -a flag
|
||||
.It Fl b
|
||||
Description of -b flag
|
||||
.El \" Ends the list
|
||||
.Pp
|
||||
.\" .Sh ENVIRONMENT \" May not be needed
|
||||
.\" .Bl -tag -width "ENV_VAR_1" -indent \" ENV_VAR_1 is width of the string ENV_VAR_1
|
||||
.\" .It Ev ENV_VAR_1
|
||||
.\" Description of ENV_VAR_1
|
||||
.\" .It Ev ENV_VAR_2
|
||||
.\" Description of ENV_VAR_2
|
||||
.\" .El
|
||||
.Sh FILES \" File used or created by the topic of the man page
|
||||
.Bl -tag -width "/Users/joeuser/Library/really_long_file_name" -compact
|
||||
.It Pa /usr/share/file_name
|
||||
FILE_1 description
|
||||
.It Pa /Users/joeuser/Library/really_long_file_name
|
||||
FILE_2 description
|
||||
.El \" Ends the list
|
||||
.\" .Sh DIAGNOSTICS \" May not be needed
|
||||
.\" .Bl -diag
|
||||
.\" .It Diagnostic Tag
|
||||
.\" Diagnostic informtion here.
|
||||
.\" .It Diagnostic Tag
|
||||
.\" Diagnostic informtion here.
|
||||
.\" .El
|
||||
.Sh SEE ALSO
|
||||
.\" List links in ascending order by section, alphabetically within a section.
|
||||
.\" Please do not reference files that do not exist without filing a bug report
|
||||
.Xr a 1 ,
|
||||
.Xr b 1 ,
|
||||
.Xr c 1 ,
|
||||
.Xr a 2 ,
|
||||
.Xr b 2 ,
|
||||
.Xr a 3 ,
|
||||
.Xr b 3
|
||||
.\" .Sh BUGS \" Document known, unremedied bugs
|
||||
.\" .Sh HISTORY \" Document history if command behaves in a unique manner
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -137,8 +137,6 @@ struct Aig_Man_t_
|
|||
void (*pImpFunc) (void*, void*); // implication checking precedure
|
||||
void * pImpData; // implication checking data
|
||||
Aig_TMan_t * pManTime; // the timing manager
|
||||
Vec_Int_t * vPiIds;
|
||||
Vec_Int_t * vPoIds;
|
||||
Vec_Ptr_t * vMapped;
|
||||
Vec_Int_t * vFlopNums;
|
||||
// timing statistics
|
||||
|
|
@ -228,7 +226,6 @@ static inline void Aig_ObjSetTravIdPrevious( Aig_Man_t * p, Aig_Obj_t *
|
|||
static inline int Aig_ObjIsTravIdCurrent( Aig_Man_t * p, Aig_Obj_t * pObj ) { return (int)(pObj->TravId == p->nTravIds); }
|
||||
static inline int Aig_ObjIsTravIdPrevious( Aig_Man_t * p, Aig_Obj_t * pObj ) { return (int)(pObj->TravId == p->nTravIds - 1); }
|
||||
|
||||
static inline int Aig_ObjTravId( Aig_Obj_t * pObj ) { return (int)pObj->pData; }
|
||||
static inline int Aig_ObjPhase( Aig_Obj_t * pObj ) { return pObj->fPhase; }
|
||||
static inline int Aig_ObjPhaseReal( Aig_Obj_t * pObj ) { return pObj? Aig_Regular(pObj)->fPhase ^ Aig_IsComplement(pObj) : 1; }
|
||||
static inline int Aig_ObjRefs( Aig_Obj_t * pObj ) { return pObj->nRefs; }
|
||||
|
|
@ -187,7 +187,7 @@ Vec_Ptr_t * Aig_ManDfsChoices( Aig_Man_t * p )
|
|||
void Aig_ManDfsReverse_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vNodes )
|
||||
{
|
||||
Aig_Obj_t * pFanout;
|
||||
int iFanout, i;
|
||||
int iFanout = -1, i;
|
||||
assert( !Aig_IsComplement(pObj) );
|
||||
if ( Aig_ObjIsTravIdCurrent(p, pObj) )
|
||||
return;
|
||||
|
|
@ -315,6 +315,7 @@ void Aig_ManPrintStats( Aig_Man_t * p )
|
|||
if ( Aig_ManRegNum(p) )
|
||||
printf( "Lat = %5d. ", Aig_ManRegNum(p) );
|
||||
printf( "\n" );
|
||||
fflush( stdout );
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////////////////////////
|
||||
|
|
@ -140,8 +140,8 @@ void Aig_ObjConnect( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pFan0, Aig_Obj
|
|||
if ( Aig_ObjIsHash(pObj) )
|
||||
Aig_TableInsert( p, pObj );
|
||||
// add the node to the dynamically updated topological order
|
||||
if ( p->pOrderData && Aig_ObjIsNode(pObj) )
|
||||
Aig_ObjOrderInsert( p, pObj->Id );
|
||||
// if ( p->pOrderData && Aig_ObjIsNode(pObj) )
|
||||
// Aig_ObjOrderInsert( p, pObj->Id );
|
||||
}
|
||||
|
||||
/**Function*************************************************************
|
||||
|
|
@ -178,8 +178,8 @@ void Aig_ObjDisconnect( Aig_Man_t * p, Aig_Obj_t * pObj )
|
|||
pObj->pFanin0 = NULL;
|
||||
pObj->pFanin1 = NULL;
|
||||
// remove the node from the dynamically updated topological order
|
||||
if ( p->pOrderData && Aig_ObjIsNode(pObj) )
|
||||
Aig_ObjOrderRemove( p, pObj->Id );
|
||||
// if ( p->pOrderData && Aig_ObjIsNode(pObj) )
|
||||
// Aig_ObjOrderRemove( p, pObj->Id );
|
||||
}
|
||||
|
||||
/**Function*************************************************************
|
||||
|
|
@ -107,7 +107,7 @@ Aig_Obj_t * Aig_CanonPair_rec( Aig_Man_t * p, Aig_Obj_t * pGhost )
|
|||
// consider the case when the pair is canonical
|
||||
if ( !Aig_ObjIsLatch(Aig_ObjFanin0(pGhost)) || !Aig_ObjIsLatch(Aig_ObjFanin1(pGhost)) )
|
||||
{
|
||||
if ( pResult = Aig_TableLookup( p, pGhost ) )
|
||||
if ( (pResult = Aig_TableLookup( p, pGhost )) )
|
||||
return pResult;
|
||||
return Aig_ObjCreate( p, pGhost );
|
||||
}
|
||||
|
|
@ -115,7 +115,7 @@ char * Part_ManFetch( Part_Man_t * p, int nSize )
|
|||
assert( nSize > 0 );
|
||||
Type = Part_SizeType( nSize, p->nStepSize );
|
||||
Vec_PtrFillExtra( p->vFree, Type + 1, NULL );
|
||||
if ( pMemory = Vec_PtrEntry( p->vFree, Type ) )
|
||||
if ( (pMemory = Vec_PtrEntry( p->vFree, Type )) )
|
||||
{
|
||||
Vec_PtrWriteEntry( p->vFree, Type, Part_OneNext(pMemory) );
|
||||
return pMemory;
|
||||
|
|
@ -274,9 +274,9 @@ Vec_Ptr_t * Aig_ManSupports( Aig_Man_t * pMan )
|
|||
int i;
|
||||
// set the number of PIs/POs
|
||||
Aig_ManForEachPi( pMan, pObj, i )
|
||||
pObj->pNext = (Aig_Obj_t *)i;
|
||||
pObj->pNext = (Aig_Obj_t *)(long)i;
|
||||
Aig_ManForEachPo( pMan, pObj, i )
|
||||
pObj->pNext = (Aig_Obj_t *)i;
|
||||
pObj->pNext = (Aig_Obj_t *)(long)i;
|
||||
// start the support computation manager
|
||||
p = Part_ManStart( 1 << 20, 1 << 6 );
|
||||
// consider objects in the topological order
|
||||
|
|
@ -301,7 +301,7 @@ Vec_Ptr_t * Aig_ManSupports( Aig_Man_t * pMan )
|
|||
{
|
||||
pPart0 = Aig_ObjFanin0(pObj)->pData;
|
||||
vSupp = Part_ManTransferEntry(pPart0);
|
||||
Vec_IntPush( vSupp, (int)pObj->pNext );
|
||||
Vec_IntPush( vSupp, (int)(long)pObj->pNext );
|
||||
Vec_PtrPush( vSupports, vSupp );
|
||||
assert( pPart0->nRefs > 0 );
|
||||
if ( --pPart0->nRefs == 0 )
|
||||
|
|
@ -313,7 +313,7 @@ Vec_Ptr_t * Aig_ManSupports( Aig_Man_t * pMan )
|
|||
if ( pObj->nRefs )
|
||||
{
|
||||
pPart0 = Part_ManFetchEntry( p, 1, pObj->nRefs );
|
||||
pPart0->pOuts[ pPart0->nOuts++ ] = (int)pObj->pNext;
|
||||
pPart0->pOuts[ pPart0->nOuts++ ] = (int)(long)pObj->pNext;
|
||||
pObj->pData = pPart0;
|
||||
}
|
||||
continue;
|
||||
|
|
@ -728,7 +728,7 @@ Aig_Obj_t * Aig_ManDupPart_rec( Aig_Man_t * pNew, Aig_Man_t * pOld, Aig_Obj_t *
|
|||
if ( Aig_ObjIsPi(pObj) )
|
||||
{
|
||||
assert( Vec_IntSize(vSuppMap) == Aig_ManPiNum(pNew) );
|
||||
Vec_IntPush( vSuppMap, (int)pObj->pNext );
|
||||
Vec_IntPush( vSuppMap, (int)(long)pObj->pNext );
|
||||
return pObj->pData = Aig_ObjCreatePi(pNew);
|
||||
}
|
||||
assert( Aig_ObjIsNode(pObj) );
|
||||
|
|
@ -896,7 +896,7 @@ Aig_Man_t * Aig_ManChoicePartitioned( Vec_Ptr_t * vAigs, int nPartSize )
|
|||
// set the PI numbers
|
||||
Vec_PtrForEachEntry( vAigs, pAig, i )
|
||||
Aig_ManForEachPi( pAig, pObj, k )
|
||||
pObj->pNext = (Aig_Obj_t *)k;
|
||||
pObj->pNext = (Aig_Obj_t *)(long)k;
|
||||
|
||||
Cmd_CommandExecute( Abc_FrameGetGlobalFrame(), "unset progressbar" );
|
||||
|
||||
|
|
@ -187,7 +187,7 @@ static inline Aig_Obj_t * Aig_ObjFindReprTransitive( Aig_Man_t * p, Aig_Obj_t *
|
|||
static inline Aig_Obj_t * Aig_ObjRepr( Aig_Man_t * p, Aig_Obj_t * pObj )
|
||||
{
|
||||
Aig_Obj_t * pRepr;
|
||||
if ( pRepr = Aig_ObjFindRepr(p, pObj) )
|
||||
if ( (pRepr = Aig_ObjFindRepr(p, pObj)) )
|
||||
return Aig_NotCond( pRepr->pData, pObj->fPhase ^ pRepr->fPhase );
|
||||
return pObj->pData;
|
||||
}
|
||||
|
|
@ -392,7 +392,7 @@ Aig_Man_t * Aig_ManRehash( Aig_Man_t * p )
|
|||
Aig_Man_t * pTemp;
|
||||
int i, nFanouts;
|
||||
assert( p->pReprs != NULL );
|
||||
for ( i = 0; nFanouts = Aig_ManRemapRepr( p ); i++ )
|
||||
for ( i = 0; (nFanouts = Aig_ManRemapRepr( p )); i++ )
|
||||
{
|
||||
// printf( "Iter = %3d. Fanouts = %6d. Nodes = %7d.\n", i+1, nFanouts, Aig_ManNodeNum(p) );
|
||||
p = Aig_ManDupRepr( pTemp = p, 1 );
|
||||
|
|
@ -273,7 +273,7 @@ void Rtm_ObjAddFirst2( Rtm_Man_t * p, Rtm_Edg_t * pEdge, Rtm_Init_t Val )
|
|||
***********************************************************************/
|
||||
void Rtm_PrintEdge( Rtm_Man_t * p, Rtm_Edg_t * pEdge )
|
||||
{
|
||||
unsigned LData = pEdge->LData;
|
||||
// unsigned LData = pEdge->LData;
|
||||
printf( "%d : ", pEdge->nLats );
|
||||
/*
|
||||
if ( pEdge->nLats > 10 )
|
||||
|
|
@ -159,10 +159,10 @@ int Aig_ManSeqCleanup( Aig_Man_t * p )
|
|||
int nTruePos = Aig_ManPoNum(p)-Aig_ManRegNum(p);
|
||||
// remember numbers of flops in the flops
|
||||
Aig_ManForEachLiSeq( p, pObj, i )
|
||||
pObj->pNext = (void *)Vec_IntEntry( p->vFlopNums, i - nTruePos );
|
||||
pObj->pNext = (Aig_Obj_t *)(long)Vec_IntEntry( p->vFlopNums, i - nTruePos );
|
||||
// reset the flop numbers
|
||||
Vec_PtrForEachEntryStart( vNodes, pObj, i, nTruePos )
|
||||
Vec_IntWriteEntry( p->vFlopNums, i - nTruePos, (int)pObj->pNext );
|
||||
Vec_IntWriteEntry( p->vFlopNums, i - nTruePos, (int)(long)pObj->pNext );
|
||||
Vec_IntShrink( p->vFlopNums, Vec_PtrSize(vNodes) - nTruePos );
|
||||
// clean the next pointer
|
||||
Aig_ManForEachLiSeq( p, pObj, i )
|
||||
|
|
@ -368,7 +368,7 @@ Aig_Man_t * Aig_ManReduceLaches( Aig_Man_t * p, int fVerbose )
|
|||
Aig_Man_t * pTemp;
|
||||
Vec_Ptr_t * vMap;
|
||||
int nSaved, nCur;
|
||||
for ( nSaved = 0; nCur = Aig_ManReduceLachesCount(p); nSaved += nCur )
|
||||
for ( nSaved = 0; (nCur = Aig_ManReduceLachesCount(p)); nSaved += nCur )
|
||||
{
|
||||
if ( fVerbose )
|
||||
{
|
||||
|
|
@ -302,7 +302,7 @@ int Aig_ManRemoveUnmarked( Aig_Man_t * p )
|
|||
int Aig_ManSeqRehashOne( Aig_Man_t * p, Vec_Ptr_t * vNodes, Vec_Ptr_t * vUnreach )
|
||||
{
|
||||
Aig_Obj_t * pObj, * pObjNew, * pFanin0, * pFanin1;
|
||||
int i, RetValue = 0, Counter = 0, Counter2 = 0;
|
||||
int i, RetValue = 0, Counter = 0;//, Counter2 = 0;
|
||||
|
||||
// mark the unreachable nodes
|
||||
Aig_ManIncrementTravId( p );
|
||||
|
|
@ -114,7 +114,7 @@ int Aig_ObjRequiredLevel( Aig_Man_t * p, Aig_Obj_t * pObj )
|
|||
int Aig_ObjReverseLevelNew( Aig_Man_t * p, Aig_Obj_t * pObj )
|
||||
{
|
||||
Aig_Obj_t * pFanout;
|
||||
int i, iFanout, LevelCur, Level = 0;
|
||||
int i, iFanout = -1, LevelCur, Level = 0;
|
||||
Aig_ObjForEachFanout( p, pObj, pFanout, iFanout, i )
|
||||
{
|
||||
LevelCur = Aig_ObjReverseLevel( p, pFanout );
|
||||
|
|
@ -192,7 +192,7 @@ void Aig_ManStopReverseLevels( Aig_Man_t * p )
|
|||
void Aig_ManUpdateLevel( Aig_Man_t * p, Aig_Obj_t * pObjNew )
|
||||
{
|
||||
Aig_Obj_t * pFanout, * pTemp;
|
||||
int iFanout, LevelOld, Lev, k, m;
|
||||
int iFanout = -1, LevelOld, Lev, k, m;
|
||||
assert( p->pFanData != NULL );
|
||||
assert( Aig_ObjIsNode(pObjNew) );
|
||||
// allocate level if needed
|
||||
|
|
@ -415,7 +415,7 @@ Aig_Man_t * Aig_ManConstReduce( Aig_Man_t * p, int fVerbose )
|
|||
{
|
||||
Aig_Man_t * pTemp;
|
||||
Vec_Ptr_t * vMap;
|
||||
while ( vMap = Aig_ManTernarySimulate( p, fVerbose ) )
|
||||
while ( (vMap = Aig_ManTernarySimulate( p, fVerbose )) )
|
||||
{
|
||||
if ( fVerbose )
|
||||
printf( "RBeg = %5d. NBeg = %6d. ", Aig_ManRegNum(p), Aig_ManNodeNum(p) );
|
||||
|
|
@ -468,7 +468,7 @@ void Aig_ObjPrintEqn( FILE * pFile, Aig_Obj_t * pObj, Vec_Vec_t * vLevels, int L
|
|||
// PI case
|
||||
if ( Aig_ObjIsPi(pObj) )
|
||||
{
|
||||
fprintf( pFile, "%s%s", fCompl? "!" : "", pObj->pData );
|
||||
fprintf( pFile, "%s%s", fCompl? "!" : "", (char*)pObj->pData );
|
||||
return;
|
||||
}
|
||||
// AND case
|
||||
|
|
@ -515,7 +515,7 @@ void Aig_ObjPrintVerilog( FILE * pFile, Aig_Obj_t * pObj, Vec_Vec_t * vLevels, i
|
|||
// PI case
|
||||
if ( Aig_ObjIsPi(pObj) )
|
||||
{
|
||||
fprintf( pFile, "%s%s", fCompl? "~" : "", pObj->pData );
|
||||
fprintf( pFile, "%s%s", fCompl? "~" : "", (char*)pObj->pData );
|
||||
return;
|
||||
}
|
||||
// EXOR case
|
||||
|
|
@ -682,8 +682,8 @@ void Aig_ManDumpBlif( Aig_Man_t * p, char * pFileName )
|
|||
nDigits = Aig_Base10Log( Counter );
|
||||
// write the file
|
||||
pFile = fopen( pFileName, "w" );
|
||||
fprintf( pFile, "# BLIF file written by procedure Aig_ManDumpBlif() in ABC\n" );
|
||||
fprintf( pFile, "# http://www.eecs.berkeley.edu/~alanmi/abc/\n" );
|
||||
fprintf( pFile, "# BLIF file written by procedure Aig_ManDumpBlif()\n" );
|
||||
// fprintf( pFile, "# http://www.eecs.berkeley.edu/~alanmi/abc/\n" );
|
||||
fprintf( pFile, ".model test\n" );
|
||||
// write PIs
|
||||
fprintf( pFile, ".inputs" );
|
||||
|
|
@ -764,16 +764,21 @@ void Aig_ManDumpVerilog( Aig_Man_t * p, char * pFileName )
|
|||
nDigits = Aig_Base10Log( Counter );
|
||||
// write the file
|
||||
pFile = fopen( pFileName, "w" );
|
||||
fprintf( pFile, "// Verilog file written by procedure Aig_ManDumpVerilog() in ABC\n" );
|
||||
fprintf( pFile, "// http://www.eecs.berkeley.edu/~alanmi/abc/\n" );
|
||||
fprintf( pFile, "module %s ( clock", p->pName? p->pName: "test" );
|
||||
fprintf( pFile, "// Verilog file written by procedure Aig_ManDumpVerilog()\n" );
|
||||
// fprintf( pFile, "// http://www.eecs.berkeley.edu/~alanmi/abc/\n" );
|
||||
if ( Aig_ManRegNum(p) )
|
||||
fprintf( pFile, "module %s ( clock", p->pName? p->pName: "test" );
|
||||
else
|
||||
fprintf( pFile, "module %s (", p->pName? p->pName: "test" );
|
||||
Aig_ManForEachPiSeq( p, pObj, i )
|
||||
fprintf( pFile, ", n%0*d", nDigits, pObj->iData );
|
||||
fprintf( pFile, "%s n%0*d", ((Aig_ManRegNum(p) || i)? ",":""), nDigits, pObj->iData );
|
||||
Aig_ManForEachPoSeq( p, pObj, i )
|
||||
fprintf( pFile, ", n%0*d", nDigits, pObj->iData );
|
||||
fprintf( pFile, " );\n" );
|
||||
|
||||
// write PIs
|
||||
if ( Aig_ManRegNum(p) )
|
||||
fprintf( pFile, "input clock;\n" );
|
||||
Aig_ManForEachPiSeq( p, pObj, i )
|
||||
fprintf( pFile, "input n%0*d;\n", nDigits, pObj->iData );
|
||||
// write POs
|
||||
|
|
@ -75,6 +75,9 @@ struct Dar_RefPar_t_
|
|||
/// FUNCTION DECLARATIONS ///
|
||||
////////////////////////////////////////////////////////////////////////
|
||||
|
||||
/*=== darLib.c ========================================================*/
|
||||
extern void Dar_LibStart();
|
||||
extern void Dar_LibStop();
|
||||
/*=== darBalance.c ========================================================*/
|
||||
extern Aig_Man_t * Dar_ManBalance( Aig_Man_t * p, int fUpdateLevel );
|
||||
/*=== darCore.c ========================================================*/
|
||||
|
|
@ -75,7 +75,7 @@ Aig_Man_t * Dar_ManBalance( Aig_Man_t * p, int fUpdateLevel )
|
|||
}
|
||||
Vec_VecFree( vStore );
|
||||
// remove dangling nodes
|
||||
if ( i = Aig_ManCleanup( pNew ) )
|
||||
if ( (i = Aig_ManCleanup( pNew )) )
|
||||
printf( "Cleanup after balancing removed %d dangling nodes.\n", i );
|
||||
// check the resulting AIG
|
||||
if ( !Aig_ManCheck(pNew) )
|
||||
|
|
@ -65,7 +65,7 @@ void Dar_ManDefaultRwrParams( Dar_RwrPar_t * pPars )
|
|||
int Dar_ManRewrite( Aig_Man_t * pAig, Dar_RwrPar_t * pPars )
|
||||
{
|
||||
Dar_Man_t * p;
|
||||
Bar_Progress_t * pProgress;
|
||||
// Bar_Progress_t * pProgress;
|
||||
Dar_Cut_t * pCut;
|
||||
Aig_Obj_t * pObj, * pObjNew;
|
||||
int i, k, nNodesOld, nNodeBefore, nNodeAfter, Required;
|
||||
|
|
@ -88,7 +88,7 @@ int Dar_ManRewrite( Aig_Man_t * pAig, Dar_RwrPar_t * pPars )
|
|||
p->nNodesInit = Aig_ManNodeNum(pAig);
|
||||
nNodesOld = Vec_PtrSize( pAig->vObjs );
|
||||
|
||||
pProgress = Bar_ProgressStart( stdout, nNodesOld );
|
||||
// pProgress = Bar_ProgressStart( stdout, nNodesOld );
|
||||
Aig_ManForEachObj( pAig, pObj, i )
|
||||
// pProgress = Bar_ProgressStart( stdout, 100 );
|
||||
// Aig_ManOrderStart( pAig );
|
||||
|
|
@ -96,7 +96,7 @@ int Dar_ManRewrite( Aig_Man_t * pAig, Dar_RwrPar_t * pPars )
|
|||
{
|
||||
// Bar_ProgressUpdate( pProgress, 100*pAig->nAndPrev/pAig->nAndTotal, NULL );
|
||||
|
||||
Bar_ProgressUpdate( pProgress, i, NULL );
|
||||
// Bar_ProgressUpdate( pProgress, i, NULL );
|
||||
if ( !Aig_ObjIsNode(pObj) )
|
||||
continue;
|
||||
if ( i > nNodesOld )
|
||||
|
|
@ -167,7 +167,7 @@ p->timeCuts += clock() - clk;
|
|||
p->timeTotal = clock() - clkStart;
|
||||
p->timeOther = p->timeTotal - p->timeCuts - p->timeEval;
|
||||
|
||||
Bar_ProgressStop( pProgress );
|
||||
// Bar_ProgressStop( pProgress );
|
||||
p->nCutMemUsed = Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20);
|
||||
Dar_ManCutsFree( p );
|
||||
// put the nodes into the DFS order and reassign their IDs
|
||||
|
|
@ -210,9 +210,9 @@ Aig_MmFixed_t * Dar_ManComputeCuts( Aig_Man_t * pAig, int nCutsMax )
|
|||
Dar_RwrPar_t Pars, * pPars = &Pars;
|
||||
Aig_Obj_t * pObj;
|
||||
Aig_MmFixed_t * pMemCuts;
|
||||
int i, nNodes, clk = 0, clkStart = clock();
|
||||
int i, nNodes;
|
||||
// remove dangling nodes
|
||||
if ( nNodes = Aig_ManCleanup( pAig ) )
|
||||
if ( (nNodes = Aig_ManCleanup( pAig )) )
|
||||
{
|
||||
// printf( "Removing %d nodes.\n", nNodes );
|
||||
}
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue