luke
/
abc
mirror of https://github.com/YosysHQ/abc.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Compiler warnings.

This commit is contained in:
Alan Mishchenko 2018-06-08 12:30:13 -07:00
parent d06d78363c
commit dca2218275
5 changed files with 13 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/aig/gia/giaMfs.c
View File

@ -354,7 +354,8 @@ Gia_Man_t * Gia_ManInsertMfs( Gia_Man_t * p, Sfm_Ntk_t * pNtk, int fAllBoxes )
if ( Gia_ObjLutIsMux(p, Vec_IntEntry(vMfs2Old, iMfsId)) )
{
int MapSize = Vec_IntSize(vMapping2);
int nVarsNew, Res = Abc_TtSimplify( pTruth, Vec_IntArray(vLeaves), Vec_IntSize(vLeaves), &nVarsNew );
int nVarsNew;
Abc_TtSimplify( pTruth, Vec_IntArray(vLeaves), Vec_IntSize(vLeaves), &nVarsNew );
Vec_IntShrink( vLeaves, nVarsNew );
iLitNew = Gia_ManFromIfLogicCreateLut( pNew, pTruth, vLeaves, vCover, vMapping, vMapping2 );
if ( MapSize < Vec_IntSize(vMapping2) )

4
src/aig/miniaig/ndr.h
View File

@ -972,7 +972,7 @@ static inline void Ndr_ModuleTestFlop()
static inline void Ndr_ModuleTestSelSel()
{
// map name IDs into char strings
char * ppNames[12] = { NULL, "sel", "c", "d0", "d1", "d2", "d3", "out" };
//char * ppNames[12] = { NULL, "sel", "c", "d0", "d1", "d2", "d3", "out" };
// name IDs
int NameIdC = 2;
int NameIdD0 = 3;
@ -1019,7 +1019,7 @@ static inline void Ndr_ModuleTestSelSel()
static inline void Ndr_ModuleTestDec()
{
// map name IDs into char strings
char * ppNames[12] = { NULL, "dec", "in", "out" };
//char * ppNames[12] = { NULL, "dec", "in", "out" };
// name IDs
int NameIdIn = 2;
int NameIdOut = 3;

2
src/base/wlc/wlcMem.c
View File

@ -827,7 +827,7 @@ int Wlc_NtkMemAbstract( Wlc_Ntk_t * p, int nIterMax, int fDumpAbs, int fPdrVerbo
Vec_Wec_t * vRefines = Vec_WecAlloc( 100 );
Vec_Int_t * vNodeFrames = Vec_IntAlloc( 100 );
Vec_Int_t * vMemObjs, * vMemFanins, * vFirstTotal, * vRefine;
int RetValue, iFirstMemPi, iFirstCi, iFirstMemCi, nDcBits, nIters;
int RetValue = -1, iFirstMemPi, iFirstCi, iFirstMemCi, nDcBits, nIters;
vMemObjs = Wlc_NtkCollectMemory( p );
vMemFanins = Wlc_NtkCollectMemFanins( p, vMemObjs );

2
src/base/wlc/wlcReadVer.c
View File

@ -1277,7 +1277,7 @@ startword:
}
else if ( Wlc_PrsStrCmp( pStart, "ABC_DFFRSE" ) )
{
int NameId[8], fFound, nBits = 1, fFlopIn, fFlopOut, fFlopClk, fFlopRst, fFlopSet, fFlopEna, fFlopAsync, fFlopInit;
int NameId[8] = {0}, fFound, fFlopIn, fFlopOut, fFlopClk, fFlopRst, fFlopSet, fFlopEna, fFlopAsync, fFlopInit;
pStart += strlen("ABC_DFF");
while ( 1 )
{

14
src/opt/dau/dauCanon.c
View File

@ -1426,7 +1426,7 @@ static void CheckConfig(Abc_TgMan_t * pMan)
for (i = 0; i < pMan->nVars; i++)
{
assert(pPermE[i] == pMan->pPermT[i]);
assert(pMan->pPermTRev[pMan->pPermT[i]] == i);
assert(pMan->pPermTRev[(int)pMan->pPermT[i]] == i);
}
assert(Abc_TgCannonVerify(pMan));
#endif
@ -1478,11 +1478,11 @@ static void Abc_TgImplementPerm(Abc_TgMan_t* pMan, const char *pPermDest)
unsigned uPhase = pMan->uPhase & (1 << nVars);
for (i = 0; i < nVars; i++)
pRev[pPerm[i]] = i;
pRev[(int)pPerm[i]] = i;
for (i = 0; i < nVars; i++)
pPerm[i] = pRev[pPermDest[i]];
pPerm[i] = pRev[(int)pPermDest[i]];
for (i = 0; i < nVars; i++)
pRev[pPerm[i]] = i;
pRev[(int)pPerm[i]] = i;
Abc_TtImplementNpnConfig(pMan->pTruth, nVars, pRev, 0);
Abc_TtNormalizeSmallTruth(pMan->pTruth, nVars);
@ -1492,7 +1492,7 @@ static void Abc_TgImplementPerm(Abc_TgMan_t* pMan, const char *pPermDest)
if (pMan->uPhase & (1 << pPerm[i]))
uPhase |= (1 << i);
pPerm[i] = pPermDest[i];
pRev[pPerm[i]] = i;
pRev[(int)pPerm[i]] = i;
}
pMan->uPhase = uPhase;
}
@ -1656,7 +1656,7 @@ static int Abc_TgGroupSymmetry(Abc_TgMan_t * pMan, TiedGroup * pGrp, int doHigh)
// char * symPhase = pMan->symPhase;
int nGVars = pGrp->nGVars;
char * pVars = pMan->pPerm + pGrp->iStart;
int modified, order = 0;
int modified;
for (i = 0; i < nGVars; i++)
fDone[i] = 0, scnt[i] = 1;
@ -2046,7 +2046,7 @@ static void Abc_TgPhaseEnumeration(Abc_TgMan_t * pMan, Abc_TgMan_t * pBest)
for (i = 0; i < n; i++)
{
char iv = pMan->pPerm[i];
for (j = i; j > 0 && pMan->symPhase[pFGrps[j-1]] > pMan->symPhase[iv]; j--)
for (j = i; j > 0 && pMan->symPhase[(int)pFGrps[j-1]] > pMan->symPhase[(int)iv]; j--)
pFGrps[j] = pFGrps[j - 1];
pFGrps[j] = iv;
}