mirror of https://github.com/YosysHQ/abc.git
Changed printouts in a few places in supergate computation.
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4ab0c4b204
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@ -80,7 +80,7 @@ int Abc_NtkAttach( Abc_Ntk_t * pNtk )
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Abc_AttachSetupTruthTables( uTruths );
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// collect all the gates
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ppGates = Mio_CollectRoots( pGenlib, 6, (float)1.0e+20, 1, &nGates );
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ppGates = Mio_CollectRoots( pGenlib, 6, (float)1.0e+20, 1, &nGates, 0 );
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// derive the gate truth tables
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puTruthGates = ABC_ALLOC( unsigned *, nGates );
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@ -206,6 +206,8 @@ int IoCommandRead( Abc_Frame_t * pAbc, int argc, char ** argv )
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sprintf( Command, "read_liberty %s", pFileName );
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else if ( !strcmp( Extra_FileNameExtension(pFileName), "scl" ) )
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sprintf( Command, "read_scl %s", pFileName );
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else if ( !strcmp( Extra_FileNameExtension(pFileName), "super" ) )
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sprintf( Command, "read_super %s", pFileName );
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else if ( !strcmp( Extra_FileNameExtension(pFileName), "c" ) )
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sprintf( Command, "so %s", pFileName );
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if ( Command[0] )
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@ -147,6 +147,8 @@ int Map_LibraryReadFileTree( Map_SuperLib_t * pLib, FILE * pFile, char *pFileNam
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#ifdef __linux__
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snprintf( pLibFile, 5000, "%s/%s", dirname(strdup(pFileName)), pLibName );
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#else
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// strcpy( pLibFile, pFileName );
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{
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char * pStr;
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strcpy( pLibFile, pFileName );
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@ -158,6 +160,7 @@ int Map_LibraryReadFileTree( Map_SuperLib_t * pLib, FILE * pFile, char *pFileNam
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else
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sprintf( pStr, "\\%s", pLibName );
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}
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#endif
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pFileGen = Io_FileOpen( pLibFile, "open_path", "r", 1 );
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@ -144,7 +144,7 @@ extern void Mio_GateDelete( Mio_Gate_t * pGate );
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extern void Mio_PinDelete( Mio_Pin_t * pPin );
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extern Mio_Pin_t * Mio_PinDup( Mio_Pin_t * pPin );
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extern void Mio_WriteLibrary( FILE * pFile, Mio_Library_t * pLib, int fPrintSops );
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extern Mio_Gate_t ** Mio_CollectRoots( Mio_Library_t * pLib, int nInputs, float tDelay, int fSkipInv, int * pnGates );
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extern Mio_Gate_t ** Mio_CollectRoots( Mio_Library_t * pLib, int nInputs, float tDelay, int fSkipInv, int * pnGates, int fVerbose );
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extern word Mio_DeriveTruthTable6( Mio_Gate_t * pGate );
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extern void Mio_DeriveTruthTable( Mio_Gate_t * pGate, unsigned uTruthsIn[][2], int nSigns, int nInputs, unsigned uTruthRes[] );
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extern void Mio_DeriveGateDelays( Mio_Gate_t * pGate,
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@ -297,7 +297,7 @@ int Mio_DelayCompare( Mio_Gate_t ** ppG1, Mio_Gate_t ** ppG2 )
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SeeAlso []
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***********************************************************************/
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Mio_Gate_t ** Mio_CollectRoots( Mio_Library_t * pLib, int nInputs, float tDelay, int fSkipInv, int * pnGates )
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Mio_Gate_t ** Mio_CollectRoots( Mio_Library_t * pLib, int nInputs, float tDelay, int fSkipInv, int * pnGates, int fVerbose )
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{
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Mio_Gate_t * pGate;
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Mio_Gate_t ** ppGates;
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@ -334,6 +334,9 @@ Mio_Gate_t ** Mio_CollectRoots( Mio_Library_t * pLib, int nInputs, float tDelay,
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continue;
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assert( iGate < nGates );
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ppGates[ iGate++ ] = pGate;
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if ( fVerbose )
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printf( "Selected gate %3d: %-20s A = %7.2f D = %7.2f %3s = %-s\n",
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iGate+1, pGate->pName, pGate->dArea, pGate->dDelayMax, pGate->pOutName, pGate->pForm );
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}
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// sort by delay
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if ( iGate > 0 )
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@ -243,7 +243,7 @@ void Abc_SclTimeGate( SC_Man * p, Abc_Obj_t * pObj, int fDept )
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// get the library cell
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pCell = Abc_SclObjCell( p, pObj );
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// get the output pin
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assert( pCell->n_outputs == 1 );
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// assert( pCell->n_outputs == 1 );
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pPin = SC_CellPin( pCell, pCell->n_inputs );
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// compute timing using each fanin
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assert( Vec_PtrSize(pPin->vRTimings) == pCell->n_inputs );
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@ -156,7 +156,7 @@ void Super_Precompute( Mio_Library_t * pLibGen, int nVarsMax, int nLevels, int n
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}
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// get the root gates
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ppGates = Mio_CollectRoots( pLibGen, nVarsMax, tDelayMax, 0, &nGates );
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ppGates = Mio_CollectRoots( pLibGen, nVarsMax, tDelayMax, 0, &nGates, fVerbose );
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if ( nGates >= nGatesMax )
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{
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fprintf( stdout, "Warning! Genlib library contains more gates than can be computed.\n");
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@ -386,7 +386,7 @@ Super_Man_t * Super_Compute( Super_Man_t * pMan, Mio_Gate_t ** ppGates, int nGat
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if ( pMan->fVerbose )
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{
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printf ("Trying %d choices for %d inputs\n", t, Mio_GateReadPinNum(ppGates[k]) );
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printf ("Trying %d choices for %d inputs\r", t, Mio_GateReadPinNum(ppGates[k]) );
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}
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// resort part of this range by area
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