Version abc60412

This commit is contained in:
Alan Mishchenko 2006-04-12 08:01:00 -07:00
parent 3f4fc5e450
commit c1710767b2
29 changed files with 1138 additions and 232474 deletions

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@ -1,443 +0,0 @@
.i 9
.o 19
.p 438
010110011 0100000000000000011
100100001 0110000000000000000
100010100 0100010000000000000
100101001 0100001000000000000
001101010 0000001000000001001
00-0-0001 0000000000001011100
110101010 0000000000010100000
010111100 0100000001000000110
011010111 0100000001000000000
010111010 0000110000000000000
110000001 0100000000001010000
0110-0011 0001100000000000000
10011-010 0100000000000000000
101000110 0011000000000000000
100110110 0000101000000000000
101110100 0001100000000000000
111000101 0100000000100000000
100100100 0000000001100000000
111001110 0100000000100000000
111111001 0000000000001100000
001100100 0000000000100110000
001101101 0010000000010100000
-01111101 0100000000000000000
010001110 0100000010100000000
001011111 0000010100000000110
100101110 0100100100000000000
001011011 0000000010010010000
011111000 0010100000000000000
100110100 0000001000001100000
001101110 0000000100010010000
010011100 0000000001000110000
101111101 0000100100000000000
111010000 0100000000000110000
101011010 0000010100000000000
011000001 0000100000000110000
101101101 0000100001000000000
011011011 0001000000010010000
010011111 0000010001000001010
10111111- 0100000000000000000
010101010 0010000001000001001
011101010 0010000000001100000
11011111- 0100000000000000000
111111011 0001100000000000000
001010101 0000010000010101100
001110111 0010000000000111001
1001100-1 0010000000000000000
100100111 0100000000110010000
011101011 0101000001000000000
011011101 0000100000010010000
101110101 0101000001000000000
001110100 0010000000010011001
001110010 0001000110000000000
110011100 0000000000110010000
110101111 0000001000001100000
100111111 0001000110000000000
10-110000 0100000000000010000
101101100 0100001010000000000
010000011 0001000010000110000
-11000011 0001000000000000000
100001101 0000101100000000000
010000010 0000100000110100000
1-0001001 0100100000000000000
001001110 0001010010000001100
001110001 0000100011000000000
00101001- 0000000100000001100
100100010 0010000001100000000
011011110 0001110000000000000
110110000 0000100100001000000
101000101 0000011000001000000
100101111 0101010010000000000
101110110 0100000000110010000
001110000 0000010001100000000
011001110 0100000001000110000
010010100 0000010001100000000
100010010 0001000001001010000
100011000 0000100010000110000
-01001100 0000000000010010000
001001111 0010100010000001100
110111110 0001110000000000000
100110001 0000001110000000000
001100000 0000101000100000101
100110101 0000010011000000000
010010010 0010000000110010000
111100110 0000010000010010000
100-10001 0001100000000000000
100111101 0010010000000110000
011010100 0001000011000000000
101011101 0001100000011000000
010101011 0001001100000001001
110101100 0001100000000110000
110101000 0001010001000000000
001001101 0000101010000001110
110010100 0000110100000000000
011000101 0100000001001101100
111000111 0100001001000000000
001010000 0010000010001101100
100011101 0100011010000000000
1-0110000 0000000000100100000
10000-011 0001000001000000000
001011100 0000000011010010000
101111001 0000000110100000000
0010100-1 0000000010100000000
010001-01 0010000000100000000
110-11011 0000000000010010000
1110-1011 0000010000000000000
1001-1011 0000100000100000000
00110001- 0010000000100000000
100100110 0101000001010010000
101010101 0010000000100110000
-01101011 0001010000000000000
001001000 0000000011100100000
110000100 0000010011000000000
101000-00 0000000010001000000
010011110 0000000111000001100
110111100 0000110001000000000
001101001 0000010100001011010
10011-001 0010000000100000000
0100-0001 0000010010000000000
100111-10 0000100100000000000
110101101 0010001100000000000
001101000 0000001010001101100
-01111011 0001000100000000000
001000-11 0000000011000000000
110000101 0000101000010100000
011100100 0000011001000000000
011100110 0000100001000110000
1011-0000 0010000000010000000
100011011 0010000101001000000
101-00000 0000001000000100000
0011-1111 0000001000100000000
011011100 0010000010010010000
001010111 0001010001100000000
110000010 0010000001011000000
00-000-00 0000000000000010001
0-1100110 0000000010100000000
1001010-0 0000000011000000000
11-001011 0010000000001000000
011111-01 0011000000000000000
01-110100 0010000000100000000
101011001 0000001001001100000
011101110 0000011000011000000
101100001 0000000101000110000
011111011 0010000001011000000
011101100 0100000011100000000
1-1001011 0000000010000010000
-01011010 0000000001100000000
0-1001011 0000001100000000000
0110-0000 0000100010000000000
111001101 0101010010000000000
111000110 0010000011000000000
011-00111 0000100010000000000
01100-011 0000010000100000000
1101-1011 0000001000000010000
-11001010 0001010000000000000
01110011- 0001001000000000000
100011110 0010110001000000000
110001-01 0000100100000000000
011010110 0100000100111000000
100010110 0001000110010100000
100001011 0010110000000110000
110-10010 0000110000000000000
101-01101 0010010000000000000
0-1100111 0000000101000000000
110100-00 0010000000100000000
01001100- 0000000010010010000
110101-10 0010000000100000000
111010100 0000101000001100000
110-11001 0010000000100000000
1100-1100 0010010000000000000
1010101-0 0000010100000000000
100001111 0010010010001100000
11000011- 0001000000000110000
111100011 0000010101000000000
01010111- 0000010000100001001
010111111 0010010110000000000
011110000 0011000010100000000
111110001 0010000000111000000
100100011 0000000111100000000
011100000 0011100001000000000
011111110 0100001101000000000
010110101 0010011010000000000
010100011 0000110010001010000
111111000 0000010101000000000
111111101 0010000000111000000
11101100- 0100000000011000000
011111100 0001110100000000000
001111011 0000101010001100000
-11100001 0010000000100000000
0111-1000 0000001000100000000
100100000 0101110000011000000
010100111 0000100110010100000
101000010 0001011100000000000
11001-010 0000001010000000000
010001000 0010010001001100000
-11110011 0010000000100000000
010100101 0000001011100000000
100--1000 0010000000000000000
010101000 0001001001000110000
010010101 0000100101100000110
111101001 0000001010000110000
111000100 0101000001000110000
011001101 0001100100000110000
001111111 0010010100011000000
1010-1000 0000001001000000000
100101100 0001000101010010000
001110101 0001001110000001001
0100-101- 0000000010000000000
011100101 0000110100100000000
110010001 0001011100000000000
0-110-010 0000100000000000000
111001100 0100100100011000000
101100101 0001000110001100000
10-001-01 0000000000100000000
111111010 0000001001001100000
101111110 0001010010001100000
1-0001-00 0010000000000000000
011001000 0001000110001010000
001--0101 0000000001000000000
010000101 0100101011000000000
011011010 0010011000100000000
110011110 0000111000100000000
001110011 0010001100010010000
111010110 0011110000000000000
11101-111 0010000000100000000
111011-00 0000100100000000000
-01-11111 0000000000100000000
111100111 0001110000100000000
-10011000 0001110000000000000
110001110 0001000110011000000
01011-010 0001000110000000000
-01100001 0001010000100000000
010100100 0000000111011000000
01--00010 0000000100000000000
011011001 0010101001000000000
1101110-1 0000000010010010000
10-10-100 0000010000000000000
--1011000 0000100000000000000
-010-0110 0000000001000000000
10--01011 0000001000000000000
110110100 0001000110011000000
100010011 0100010110011000000
101110010 0000000111100000000
001001100 0000010110001101110
110100001 0010000111000000000
110100011 0010010100001100000
010100-10 0000010100100000000
010100000 0000100101001101001
11101-110 0000001010000000000
1-01010-1 0000000001000000000
001111000 0000001101100001001
00101100- 0010000001100000000
0100010-0 0000001100100000000
010000110 0001110011000000000
001-11110 0000001010100000000
101101111 0101110000010010000
-1-011101 0000000010000000000
00101-101 0000000101100000000
0101-0010 0010011000000000000
10100010- 0000100001010000000
-1011001- 0000000001000000000
10111100- 0100001001000000000
1111-1100 0000001100000000000
10000000- 0000100000110010000
110100101 0000011101000000000
010-01111 0000001110000000000
001010110 0000101000110011111
001111100 0011011100000000000
101100-11 0010100010000000000
11101111- 0000000000110010000
010111011 0011101001000000000
11001-1-1 0000000001000000000
101110111 0010000011010010000
111001001 0000101001100000000
0-1001010 0000000111000000000
100011010 0010101110000000000
01110100- 0011000001000000000
11-111-00 0010000000000000000
11-1-1111 0010000000000000000
110110-10 0010100010000000000
011101101 0000001011001010000
1-110110- 0000010000000000000
0-1001001 0000000100111000000
100100101 0011101000010010000
1-0111011 0100011000010000000
111110010 0010011100000000000
11-010-10 0000001000000000000
111101101 0000101000101100000
010111001 0000111100100000000
011001-01 0010001010000000000
010110001 0001110001011000000
10100000- 0010000000101100000
01110-111 0000110001000000000
111010001 0010000001100110000
1-1101011 0010010000100000000
100-11011 0000010010100100000
100111100 0010100110000110000
111000000 0010000001110010000
100010101 0010011101000000000
01011011- 0000010001010010000
10100101- 0010000000110010000
010010110 0001001101100000101
01111001- 0010000000100110000
-11000010 0000010001100000000
101-10001 0010000000110010000
010000100 0010010101000110000
10-00-100 0010000000100000000
110000111 0010111010000000000
1-00100-0 0010000000100000000
-100-0000 0010000000100000000
011000000 0001011101000000000
011-10011 0000001101000000000
1111011-0 0000100010100000000
-11010011 0000010011000000000
101000111 0010001110100000000
011010001 0001000101101100000
1-1100100 0010000101000000000
010010011 0000000111110010000
001111010 0000110111000001001
111-11010 0000100110000000000
010001011 0000011101011000000
01110001- 0010000001010010000
1010--011 0010000000100000000
010010001 0010001101010010000
110-01011 0000100110000100000
10-011001 0001010110000000000
10-1100-1 0000000001100000000
010001111 0011110001100000000
001111001 0000011011100001001
001110110 0010011101000001001
0101000-1 0001001101000000000
01100-01- 0000101000000000000
110110101 0010101101000000000
010101100 0010011010001101001
11001-01- 0010000000100000000
110001111 0010001010111000000
010110000 0000111010011001001
1-1-00011 0010100000000000000
0101101-0 0000111100000000000
011010101 0010000011111000000
110010110 0010000110110010000
11-01-101 0001000100000000000
101--0100 0010001000000000000
001010100 0000001011111001100
10-000101 0010100101000000000
101111010 0000101001100110000
101-01000 0001010110000000000
111011001 0000111010100000000
1010--110 0000001100000000000
01-000110 0010001100100000000
101010010 0010000111010010000
11-10-010 0010000000100000000
1011--011 0000010001000000000
110110011 0010011100011000000
110001010 0100111010001100000
01011-110 0001001010010010000
110-10111 0001010110000000000
100011111 0001111000111000000
10100111- 0000111000100000000
11111111- 0010001000011000000
00-0000-- 0000000000000110001
100111000 0001111010011000000
011000100 0011101110000000000
-1100101- 0000000101000000000
0110-1111 0010001100100000000
111100000 0001011100010010000
011111111 0011111000100000000
1111-100- 0010000000100000000
100-01010 0100001101100000000
010010111 0010011101100000000
1101-1000 0000101110000000000
111010101 0010001001101100000
110010-11 0000101011000000000
1-1100001 0000111010000000000
111000001 0000000111110010000
1100--0-0 0000000000100000000
011001100 0001111000110100000
001111110 0010110101001010000
1010-100- 0001110000000000000
111110000 0010000111001010000
100010111 0010101101000110000
011110101 0001111101000000000
01111110- 0000001011100000000
-1--00011 0000001000000000000
011111010 0011010110011000000
101010111 0000111011100000000
010111101 0010011100110010000
-11-01-11 0000000000100000000
111110100 0000011101010100000
010101001 0010001111000110000
1-1011-1- 0010000000000000000
011110001 0011011100010100000
100000111 0000011111010010000
101111100 0010010111100000000
110100111 0001111001011000000
101100010 0001011011000110000
111100-10 0000101011000000000
101101001 0010101110011000000
10-000011 0000111010100000000
11001010- 0010001001010010000
101100110 0010101101001100000
101-01110 0001111000100000000
011010010 0010001101101100000
10-001110 0001011011000000000
10000-000 0001011100010010000
110-11101 0001111000100000000
101011100 0000101111001010000
1-0000110 0010001101100000000
100011100 0011011001101100000
111110110 0001111001000110000
0110111-1 0001011101000000000
010000111 0001001111101100000
11011000- 0001011011000000000
101010000 0001101111100000000
100110111 0011001101101010000
1101-1001 0010010101100000000
111100101 0010001110110010000
110011111 0001101110100110000
100101101 0010010111110010000
111001000 0100001111101100000
0010001-- 0000000011011101110
010111000 0000011111110010000
1-0000000 0001101111000000000
110111010 0011011001110010000
101101010 0010010111111000000
011110111 0010101111001100000
110100110 0000111011101010000
111110111 0001111111000000000
01-011000 0001011111000000000
00-00-0-- 0000000000011001110
11110-1-0 0001001101000000000
111110101 0000111011100110000
001101100 0010011111111000000
010101101 0001111111001101001
010001100 0000111111111000011
111001111 0011101111010100000
1000000-0 0000111111010010000
011110110 0001111111101100000
000------ 0000000000011111111
.e

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@ -1,353 +0,0 @@
.model s444
.inputs G0 G1 G2
.outputs G118 G167 G107 G119 G168 G108
.latch G11_in G11 0
.latch G12_in G12 0
.latch G13_in G13 0
.latch G14_in G14 0
.latch G15_in G15 0
.latch G16_in G16 0
.latch G17_in G17 0
.latch G18_in G18 0
.latch G19_in G19 0
.latch G20_in G20 0
.latch G21_in G21 0
.latch G22_in G22 0
.latch G23_in G23 0
.latch G24_in G24 0
.latch G25_in G25 0
.latch G26_in G26 0
.latch G27_in G27 0
.latch G28_in G28 0
.latch G29_in G29 0
.latch G30_in G30 0
.latch G31_in G31 0
.names G12 G13 [25]
00 1
.names G11 [25] [26]
01 1
.names G14 [26] [27]
10 1
.names G0 G11 [28]
00 1
.names [27] [28] G11_in
01 1
.names G11 G12 [30]
11 1
.names G12 [30] [31]
10 1
.names G11 [30] [32]
10 1
.names [31] [32] [33]
00 1
.names G0 [33] [34]
00 1
.names [27] [34] G12_in
01 1
.names G13 [30] [36]
11 1
.names G13 [36] [37]
10 1
.names [30] [36] [38]
10 1
.names [37] [38] [39]
00 1
.names G0 [39] [40]
00 1
.names [27] [40] G13_in
01 1
.names G12 G13 [42]
11 1
.names G11 [42] [43]
11 1
.names G14 [43] [44]
11 1
.names G14 [44] [45]
10 1
.names [43] [44] [46]
10 1
.names [45] [46] [47]
00 1
.names G0 [47] [48]
00 1
.names [27] [48] G14_in
01 1
.names G31 [27] [50]
00 1
.names G16 G17 [51]
00 1
.names G15 [51] [52]
01 1
.names [50] [52] [53]
00 1
.names G18 [53] [54]
11 1
.names G15 [50] [55]
10 1
.names G15 [55] [56]
10 1
.names [50] [55] [57]
00 1
.names [56] [57] [58]
00 1
.names G0 [58] [59]
00 1
.names [54] [59] G15_in
01 1
.names G16 [55] [61]
11 1
.names G16 [61] [62]
10 1
.names [55] [61] [63]
10 1
.names [62] [63] [64]
00 1
.names G0 [64] [65]
00 1
.names [54] [65] G16_in
01 1
.names G16 [50] [67]
10 1
.names G15 [67] [68]
11 1
.names G17 [68] [69]
11 1
.names G17 [69] [70]
10 1
.names [68] [69] [71]
10 1
.names [70] [71] [72]
00 1
.names G0 [72] [73]
00 1
.names [54] [73] G17_in
01 1
.names G15 G16 [75]
11 1
.names G17 [50] [76]
10 1
.names [75] [76] [77]
11 1
.names G18 [77] [78]
11 1
.names G18 [78] [79]
10 1
.names [77] [78] [80]
10 1
.names [79] [80] [81]
00 1
.names G0 [81] [82]
00 1
.names [54] [82] G18_in
01 1
.names G20 G21 [84]
00 1
.names G19 [84] [85]
01 1
.names [54] [85] [86]
10 1
.names G22 [86] [87]
11 1
.names G19 [54] [88]
11 1
.names G19 [88] [89]
10 1
.names [54] [88] [90]
10 1
.names [89] [90] [91]
00 1
.names G0 [91] [92]
00 1
.names [87] [92] G19_in
01 1
.names G20 [88] [94]
11 1
.names G20 [94] [95]
10 1
.names [88] [94] [96]
10 1
.names [95] [96] [97]
00 1
.names G0 [97] [98]
00 1
.names [87] [98] G20_in
01 1
.names G20 [54] [100]
11 1
.names G19 [100] [101]
11 1
.names G21 [101] [102]
11 1
.names G21 [102] [103]
10 1
.names [101] [102] [104]
10 1
.names [103] [104] [105]
00 1
.names G0 [105] [106]
00 1
.names [87] [106] G21_in
01 1
.names G19 G20 [108]
11 1
.names G21 [54] [109]
11 1
.names [108] [109] [110]
11 1
.names G22 [110] [111]
11 1
.names G22 [111] [112]
10 1
.names [110] [111] [113]
10 1
.names [112] [113] [114]
00 1
.names G0 [114] [115]
00 1
.names [87] [115] G22_in
01 1
.names G2 G23 [117]
00 1
.names G2 G23 [118]
11 1
.names [117] [118] [119]
00 1
.names G0 [119] G23_in
01 1
.names G20 G21 [121]
01 1
.names G0 G23 [122]
01 1
.names [121] [122] [123]
11 1
.names G19 [123] [124]
01 1
.names G21 G22 [126]
10 1
.names G19 G20 [125]
10 1
.names G23 [125] [127]
01 1
.names [126] [127] [128]
11 1
.names G0 G24 [129]
01 1
.names [128] [129] [130]
01 1
.names [124] [130] [131]
00 1
.names G22 G23 [132]
00 1
.names [125] [132] [133]
11 1
.names G24 [133] [134]
10 1
.names G19 G20 [135]
00 1
.names G23 [135] [136]
11 1
.names G22 G23 [137]
11 1
.names [136] [137] [138]
00 1
.names G0 G21 [139]
01 1
.names [138] [139] [140]
11 1
.names [134] [140] G25_in
01 1
.names G19 G22 [142]
01 1
.names G0 [142] [143]
01 1
.names G0 [108] [144]
01 1
.names [143] [144] [145]
00 1
.names [129] [139] [146]
00 1
.names [145] [146] G26_in
11 1
.names G21 G24 [148]
00 1
.names [125] [148] [149]
11 1
.names G21 G22 [150]
00 1
.names G24 [150] [151]
01 1
.names G0 [151] [152]
00 1
.names [149] [152] [153]
01 1
.names G0 G22 [154]
01 1
.names [135] [154] [155]
11 1
.names [146] [155] [156]
10 1
.names [131] [156] [157]
00 1
.names G17 [157] [158]
01 1
.names [131] [156] [159]
10 1
.names [158] [159] G28_in
00 1
.names [122] [126] [161]
11 1
.names G21 G22 [162]
01 1
.names G0 [162] [163]
01 1
.names [161] [163] [164]
00 1
.names G20 [164] [165]
00 1
.names G19 [165] [166]
01 1
.names [130] [166] [167]
00 1
.names [131] [167] [168]
00 1
.names G17 [168] [169]
01 1
.names [131] [167] [170]
10 1
.names [169] [170] G29_in
00 1
.names G20 G21 [172]
10 1
.names G0 G24 [173]
00 1
.names [172] [173] [174]
11 1
.names G19 [174] G30_in
11 1
.names G1 G31 [176]
00 1
.names G1 G31 [177]
11 1
.names [176] [177] [178]
00 1
.names G0 [178] G31_in
01 1
.names [131] G24_in
0 1
.names [153] G27_in
0 1
.names G27 G118
1 1
.names G29 G167
0 1
.names G25 G107
1 1
.names G28 G119
0 1
.names G30 G168
1 1
.names G26 G108
1 1
.end

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5
readme
View File

@ -12,4 +12,7 @@ If compiling as a static library, it is necessary to uncomment
Several things to try if it does not compile on your platform:
- Try running all code through dos2unix (Solaris)
- Try removing flags from the libs line (LIBS :=) in Makefile (Mac)
- Try removing flags from the libs line (LIBS :=) in Makefile (Mac)
Finally, run regression test:
abc>>> so regtest.script

View File

@ -52,7 +52,8 @@ typedef enum {
ABC_NTK_LOGIC, // 2: network with PIs/POs, latches, and nodes
ABC_NTK_STRASH, // 3: structurally hashed AIG (two input AND gates with c-attributes on edges)
ABC_NTK_SEQ, // 4: sequential AIG (two input AND gates with c- and latch-attributes on edges)
ABC_NTK_OTHER // 5: unused
ABC_NTK_BLACKBOX, // 5: black box about which nothing is known
ABC_NTK_OTHER // 6: unused
} Abc_NtkType_t;
// network functionality
@ -62,7 +63,8 @@ typedef enum {
ABC_FUNC_BDD, // 2: binary decision diagrams
ABC_FUNC_AIG, // 3: and-inverter graphs
ABC_FUNC_MAP, // 4: standard cell library
ABC_FUNC_OTHER // 5: unused
ABC_FUNC_BLACKBOX, // 5: black box about which nothing is known
ABC_FUNC_OTHER // 6: unused
} Abc_NtkFunc_t;
// Supported type/functionality combinations:
@ -168,6 +170,7 @@ struct Abc_Ntk_t_
int nObjs; // the number of live objs
int nNets; // the number of live nets
int nNodes; // the number of live nodes
int nBoxes; // the number of live nodes
int nLatches; // the number of live latches
int nPis; // the number of primary inputs
int nPos; // the number of primary outputs
@ -198,6 +201,11 @@ struct Abc_Ntk_t_
// the backup network and the step number
Abc_Ntk_t * pNetBackup; // the pointer to the previous backup network
int iStep; // the generation number for the given network
// hierarchical design
stmm_table * tName2Model; // the table hashing names into network pointers (or NULL if no hierarchy)
Vec_Int_t * pBlackBoxes; // stores pairs (PI num, PO num) for each model, including the base model (or NULL if no hierarchy)
short fHieVisited; // flag to mark the visited network
short fHiePath; // flag to mark the network on the path
// memory management
Extra_MmFlex_t * pMmNames; // memory manager for net names
Extra_MmFixed_t* pMmObj; // memory manager for objects
@ -223,11 +231,13 @@ static inline bool Abc_NtkIsNetlist( Abc_Ntk_t * pNtk ) { return pN
static inline bool Abc_NtkIsLogic( Abc_Ntk_t * pNtk ) { return pNtk->ntkType == ABC_NTK_LOGIC; }
static inline bool Abc_NtkIsStrash( Abc_Ntk_t * pNtk ) { return pNtk->ntkType == ABC_NTK_STRASH; }
static inline bool Abc_NtkIsSeq( Abc_Ntk_t * pNtk ) { return pNtk->ntkType == ABC_NTK_SEQ; }
static inline bool Abc_NtkIsBlackbox( Abc_Ntk_t * pNtk ) { return pNtk->ntkType == ABC_NTK_BLACKBOX;}
static inline bool Abc_NtkHasSop( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_SOP; }
static inline bool Abc_NtkHasBdd( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_BDD; }
static inline bool Abc_NtkHasAig( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_AIG; }
static inline bool Abc_NtkHasMapping( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_MAP; }
static inline bool Abc_NtkHasBlackbox( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_BLACKBOX; }
static inline bool Abc_NtkIsSopNetlist( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_SOP && pNtk->ntkType == ABC_NTK_NETLIST; }
static inline bool Abc_NtkIsMappedNetlist( Abc_Ntk_t * pNtk ) { return pNtk->ntkFunc == ABC_FUNC_MAP && pNtk->ntkType == ABC_NTK_NETLIST; }
@ -294,6 +304,7 @@ static inline Abc_Obj_t * Abc_ObjNotCond( Abc_Obj_t * p, int c ) { return (A
// checking the object type
static inline bool Abc_ObjIsNode( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_NODE; }
static inline bool Abc_ObjIsBox( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_BOX; }
static inline bool Abc_ObjIsNet( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_NET; }
static inline bool Abc_ObjIsLatch( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_LATCH; }
static inline bool Abc_ObjIsPi( Abc_Obj_t * pObj ) { return pObj->Type == ABC_OBJ_PI; }
@ -376,6 +387,9 @@ static inline int Abc_LatchInit( Abc_Obj_t * pLatch ) { assert(Ab
#define Abc_NtkForEachNode( pNtk, pNode, i ) \
for ( i = 0; (i < Vec_PtrSize((pNtk)->vObjs)) && (((pNode) = Abc_NtkObj(pNtk, i)), 1); i++ ) \
if ( (pNode) == NULL || !Abc_ObjIsNode(pNode) ) {} else
#define Abc_NtkForEachBox( pNtk, pNode, i ) \
for ( i = 0; (i < Vec_PtrSize((pNtk)->vObjs)) && (((pNode) = Abc_NtkObj(pNtk, i)), 1); i++ ) \
if ( (pNode) == NULL || !Abc_ObjIsBox(pNode) ) {} else
#define Abc_AigForEachAnd( pNtk, pNode, i ) \
for ( i = 0; (i < Vec_PtrSize((pNtk)->vObjs)) && (((pNode) = Abc_NtkObj(pNtk, i)), 1); i++ ) \
if ( (pNode) == NULL || !Abc_NodeIsAigAnd(pNode) ) {} else
@ -510,6 +524,7 @@ extern Abc_Obj_t * Abc_NtkFindCo( Abc_Ntk_t * pNtk, char * pName );
extern Abc_Obj_t * Abc_NtkFindNet( Abc_Ntk_t * pNtk, char * pName );
extern Abc_Obj_t * Abc_NtkFindOrCreateNet( Abc_Ntk_t * pNtk, char * pName );
extern Abc_Obj_t * Abc_NtkCreateNode( Abc_Ntk_t * pNtk );
extern Abc_Obj_t * Abc_NtkCreateBox( Abc_Ntk_t * pNtk );
extern Abc_Obj_t * Abc_NtkCreatePi( Abc_Ntk_t * pNtk );
extern Abc_Obj_t * Abc_NtkCreatePo( Abc_Ntk_t * pNtk );
extern Abc_Obj_t * Abc_NtkCreateLatch( Abc_Ntk_t * pNtk );
@ -651,6 +666,7 @@ extern char * Abc_SopFromTruthHex( char * pTruth );
extern Abc_Ntk_t * Abc_NtkStrash( Abc_Ntk_t * pNtk, bool fAllNodes, bool fCleanup );
extern Abc_Obj_t * Abc_NodeStrash( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode );
extern int Abc_NtkAppend( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2 );
extern Abc_Ntk_t * Abc_NtkTopmost( Abc_Ntk_t * pNtk, int nLevels );
/*=== abcSweep.c ==========================================================*/
extern int Abc_NtkSweep( Abc_Ntk_t * pNtk, int fVerbose );
extern int Abc_NtkCleanup( Abc_Ntk_t * pNtk, int fVerbose );
@ -698,6 +714,7 @@ extern int Abc_NtkGetBddNodeNum( Abc_Ntk_t * pNtk );
extern int Abc_NtkGetClauseNum( Abc_Ntk_t * pNtk );
extern double Abc_NtkGetMappedArea( Abc_Ntk_t * pNtk );
extern int Abc_NtkGetExorNum( Abc_Ntk_t * pNtk );
extern int Abc_NtkGetMuxNum( Abc_Ntk_t * pNtk );
extern int Abc_NtkGetChoiceNum( Abc_Ntk_t * pNtk );
extern int Abc_NtkGetFaninMax( Abc_Ntk_t * pNtk );
extern void Abc_NtkCleanCopy( Abc_Ntk_t * pNtk );

View File

@ -38,6 +38,8 @@ static bool Abc_NtkComparePis( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int fComb )
static bool Abc_NtkComparePos( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int fComb );
static bool Abc_NtkCompareLatches( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int fComb );
static int Abc_NtkIsAcyclicHierarchy( Abc_Ntk_t * pNtk );
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
@ -90,12 +92,12 @@ bool Abc_NtkDoCheck( Abc_Ntk_t * pNtk )
Abc_Obj_t * pObj, * pNet, * pNode;
int i;
if ( !Abc_NtkIsNetlist(pNtk) && !Abc_NtkIsLogic(pNtk) && !Abc_NtkIsStrash(pNtk) && !Abc_NtkIsSeq(pNtk) )
if ( !Abc_NtkIsNetlist(pNtk) && !Abc_NtkIsLogic(pNtk) && !Abc_NtkIsStrash(pNtk) && !Abc_NtkIsSeq(pNtk) && !Abc_NtkIsBlackbox(pNtk) )
{
fprintf( stdout, "NetworkCheck: Unknown network type.\n" );
return 0;
}
if ( !Abc_NtkHasSop(pNtk) && !Abc_NtkHasBdd(pNtk) && !Abc_NtkHasAig(pNtk) && !Abc_NtkHasMapping(pNtk) )
if ( !Abc_NtkHasSop(pNtk) && !Abc_NtkHasBdd(pNtk) && !Abc_NtkHasAig(pNtk) && !Abc_NtkHasMapping(pNtk) && !Abc_NtkHasBlackbox(pNtk) )
{
fprintf( stdout, "NetworkCheck: Unknown functionality type.\n" );
return 0;
@ -187,6 +189,27 @@ bool Abc_NtkDoCheck( Abc_Ntk_t * pNtk )
// }
return Abc_NtkCheck( pNtk->pExdc );
}
// check the hierarchy
if ( Abc_NtkIsNetlist(pNtk) && pNtk->tName2Model )
{
stmm_generator * gen;
Abc_Ntk_t * pNtkTemp;
char * pName;
// check other networks
stmm_foreach_item( pNtk->tName2Model, gen, &pName, (char **)&pNtkTemp )
{
pNtkTemp->fHiePath = pNtkTemp->fHieVisited = 0;
if ( !Abc_NtkCheck( pNtkTemp ) )
return 0;
}
// check acyclic dependency of the models
if ( !Abc_NtkIsAcyclicHierarchy( pNtk ) )
{
fprintf( stdout, "NetworkCheck: Network hierarchical dependences contains a cycle.\n" );
return 0;
}
}
return 1;
}
@ -711,6 +734,64 @@ bool Abc_NtkCompareSignals( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, int fComb )
return 1;
}
/**Function*************************************************************
Synopsis [Returns 0 if the network hierachy contains a cycle.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkIsAcyclicHierarchy_rec( Abc_Ntk_t * pNtk )
{
Abc_Ntk_t * pNtkNext;
Abc_Obj_t * pObj;
int i;
// return if visited
if ( pNtk->fHieVisited )
return 1;
pNtk->fHieVisited = 1;
// return if black box
if ( Abc_NtkIsBlackbox(pNtk) )
return 1;
assert( Abc_NtkIsNetlist(pNtk) );
// go through all the children networks
Abc_NtkForEachBox( pNtk, pObj, i )
{
pNtkNext = pObj->pData;
assert( pNtkNext != NULL );
if ( pNtkNext->fHiePath )
return 0;
pNtk->fHiePath = 1;
if ( !Abc_NtkIsAcyclicHierarchy_rec( pNtkNext ) )
return 0;
pNtk->fHiePath = 0;
}
return 1;
}
/**Function*************************************************************
Synopsis [Returns 0 if the network hierachy contains a cycle.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkIsAcyclicHierarchy( Abc_Ntk_t * pNtk )
{
assert( Abc_NtkIsNetlist(pNtk) && pNtk->tName2Model );
pNtk->fHiePath = 1;
return Abc_NtkIsAcyclicHierarchy_rec( pNtk );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

View File

@ -129,7 +129,7 @@ void Abc_NtkDfs_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes )
// skip the CI
if ( Abc_ObjIsCi(pNode) )
return;
assert( Abc_ObjIsNode( pNode ) );
assert( Abc_ObjIsNode( pNode ) || Abc_ObjIsBox( pNode ) );
// visit the transitive fanin of the node
Abc_ObjForEachFanin( pNode, pFanin, i )
Abc_NtkDfs_rec( Abc_ObjFanin0Ntk(pFanin), vNodes );
@ -581,15 +581,15 @@ bool Abc_NtkIsAcyclic_rec( Abc_Obj_t * pNode )
assert( !Abc_ObjIsNet(pNode) );
if ( Abc_ObjIsCi(pNode) )
return 1;
assert( Abc_ObjIsNode( pNode ) );
assert( Abc_ObjIsNode( pNode ) || Abc_ObjIsBox( pNode ) );
// make sure the node is not visited
assert( !Abc_NodeIsTravIdPrevious(pNode) );
// check if the node is part of the combinational loop
if ( Abc_NodeIsTravIdCurrent(pNode) )
{
fprintf( stdout, "Network \"%s\" contains combinational loop!\n", pNtk->pName );
fprintf( stdout, "Network \"%s\" contains combinational loop!\n", Abc_NtkName(pNtk) );
fprintf( stdout, "Node \"%s\" is encountered twice on the following path:\n", Abc_ObjName(pNode) );
fprintf( stdout, " %s", Abc_ObjName(pNode) );
fprintf( stdout, " %s", Abc_ObjIsNode(pNode)? Abc_ObjName(pNode) : Abc_NtkName(pNode->pData) );
return 0;
}
// mark this node as a node on the current path

View File

@ -24,7 +24,9 @@
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
static Abc_Ntk_t * Abc_NtkNetlistToLogicHie( Abc_Ntk_t * pNtk );
static void Abc_NtkNetlistToLogicHie_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtkOld, int * pCounter );
static void Abc_NtkAddPoBuffers( Abc_Ntk_t * pNtk );
////////////////////////////////////////////////////////////////////////
@ -48,6 +50,9 @@ Abc_Ntk_t * Abc_NtkNetlistToLogic( Abc_Ntk_t * pNtk )
Abc_Obj_t * pObj, * pFanin;
int i, k;
assert( Abc_NtkIsNetlist(pNtk) );
// consider simple case when there is hierarchy
if ( pNtk->tName2Model )
return Abc_NtkNetlistToLogicHie( pNtk );
// start the network
if ( !Abc_NtkHasMapping(pNtk) )
pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_SOP );
@ -72,6 +77,157 @@ Abc_Ntk_t * Abc_NtkNetlistToLogic( Abc_Ntk_t * pNtk )
return pNtkNew;
}
/**Function*************************************************************
Synopsis [Transform the netlist into a logic network.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkNetlistToLogicHie( Abc_Ntk_t * pNtk )
{
Abc_Ntk_t * pNtkNew;
Abc_Obj_t * pObj;
int i, Counter = 0;
assert( Abc_NtkIsNetlist(pNtk) );
// start the network
// pNtkNew = Abc_NtkAlloc( Type, Func );
if ( !Abc_NtkHasMapping(pNtk) )
pNtkNew = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_SOP );
else
pNtkNew = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_MAP );
// duplicate the name and the spec
pNtkNew->pName = Extra_UtilStrsav(pNtk->pName);
pNtkNew->pSpec = Extra_UtilStrsav(pNtk->pSpec);
// clean the node copy fields
Abc_NtkForEachNode( pNtk, pObj, i )
pObj->pCopy = NULL;
// map the constant nodes
if ( Abc_NtkConst1(pNtk) )
Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkNew);
// clone PIs/POs and make old nets point to new terminals; create PI/PO names
Abc_NtkForEachPi( pNtk, pObj, i )
{
Abc_ObjFanout0(pObj)->pCopy = Abc_NtkDupObj(pNtkNew, pObj);
Abc_NtkLogicStoreName( pObj->pCopy, Abc_ObjName(pObj) );
}
Abc_NtkForEachPo( pNtk, pObj, i )
{
Abc_NtkDupObj(pNtkNew, pObj);
Abc_NtkLogicStoreName( pObj->pCopy, Abc_ObjName(pObj) );
}
// recursively flatten hierarchy, create internal logic, add new PI/PO names if there are black boxes
Abc_NtkNetlistToLogicHie_rec( pNtkNew, pNtk, &Counter );
if ( Counter )
printf( "Warning: The total of %d block boxes are transformed into PI/PO pairs.\n", Counter );
// add latches
Abc_NtkForEachLatch( pNtk, pObj, i )
{
Abc_ObjFanout0(pObj)->pCopy = Abc_NtkDupObj(pNtkNew, pObj);
Vec_PtrPush( pNtkNew->vCis, pObj->pCopy );
Vec_PtrPush( pNtkNew->vCos, pObj->pCopy );
Abc_NtkLogicStoreName( Abc_NtkLatch(pNtkNew,i), Abc_ObjName(pObj) );
}
// collect the CO nodes
Abc_NtkForEachCo( pNtk, pObj, i )
Abc_ObjAddFanin( pObj->pCopy, Abc_ObjFanin0(pObj)->pCopy );
// copy the timing information
Abc_ManTimeDup( pNtk, pNtkNew );
// fix the problem with CO pointing directly to CIs
Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 );
// duplicate EXDC
if ( pNtk->pExdc )
pNtkNew->pExdc = Abc_NtkNetlistToLogic( pNtk->pExdc );
if ( !Abc_NtkCheck( pNtkNew ) )
fprintf( stdout, "Abc_NtkNetlistToLogic(): Network check has failed.\n" );
return pNtkNew;
}
/**Function*************************************************************
Synopsis [Transform the netlist into a logic network.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkNetlistToLogicHie_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtkOld, int * pCounter )
{
char Prefix[1000];
Vec_Ptr_t * vNodes;
Abc_Ntk_t * pNtkModel;
Abc_Obj_t * pNode, * pObj, * pFanin;
int i, k;
// collect nodes and boxes in topological order
vNodes = Abc_NtkDfs( pNtkOld, 0 );
// create logic for nodes and boxes
Vec_PtrForEachEntry( vNodes, pNode, i )
{
if ( Abc_ObjFaninNum(pNode) == 0 )
continue;
if ( Abc_ObjIsNode(pNode) )
{
// duplicate the node and save it in the fanout net
Abc_NtkDupObj( pNtkNew, pNode );
Abc_ObjForEachFanin( pNode, pFanin, k )
Abc_ObjAddFanin( pNode->pCopy, pFanin->pCopy );
Abc_ObjFanout0(pNode)->pCopy = pNode->pCopy;
continue;
}
assert( Abc_ObjIsBox(pNode) );
pNtkModel = pNode->pData;
// consider the case of the black box
if ( Abc_NtkIsBlackbox(pNtkModel) )
{
if ( pNtkNew->pBlackBoxes == NULL )
{
pNtkNew->pBlackBoxes = Vec_IntAlloc( 10 );
Vec_IntPush( pNtkNew->pBlackBoxes, (Abc_NtkPiNum(pNtkNew) << 16) | Abc_NtkPoNum(pNtkNew) );
}
sprintf( Prefix, "%s_%d_", Abc_NtkName(pNtkModel), *pCounter );
// create new PIs from the POs of the box
Abc_NtkForEachPo( pNtkModel, pObj, k )
{
pObj->pCopy = Abc_NtkCreatePi( pNtkNew );
Abc_ObjFanout(pNode, k)->pCopy = pObj->pCopy;
Abc_NtkLogicStoreNamePlus( pObj->pCopy, Prefix, Abc_ObjName(pObj) );
}
// create new POs from the PIs of the box
Abc_NtkForEachPi( pNtkModel, pObj, k )
{
pObj->pCopy = Abc_NtkCreatePo( pNtkNew );
Abc_ObjAddFanin( pObj->pCopy, Abc_ObjFanin(pNode, k)->pCopy );
Abc_NtkLogicStoreNamePlus( pObj->pCopy, Prefix, Abc_ObjName(pObj) );
}
(*pCounter)++;
Vec_IntPush( pNtkNew->pBlackBoxes, (Abc_NtkPiNum(pNtkNew) << 16) | Abc_NtkPoNum(pNtkNew) );
}
else
{
// map the constant nodes
if ( Abc_NtkConst1(pNtkModel) )
Abc_NtkConst1(pNtkModel)->pCopy = Abc_NtkConst1(pNtkNew);
// transfer the nodes to the box inputs
Abc_NtkForEachPi( pNtkModel, pObj, k )
Abc_ObjFanout0(pObj)->pCopy = Abc_ObjFanin(pNode, k)->pCopy;
// construct recursively
Abc_NtkNetlistToLogicHie_rec( pNtkNew, pNtkModel, pCounter );
// transfer the results back
Abc_NtkForEachPo( pNtkModel, pObj, k )
Abc_ObjFanout(pNode, k)->pCopy = Abc_ObjFanin0(pObj)->pCopy;
}
}
Vec_PtrFree( vNodes );
}
/**Function*************************************************************
Synopsis [Transform the logic network into a netlist.]

View File

@ -320,8 +320,17 @@ Abc_Ntk_t * Abc_NtkStartRead( char * pName )
***********************************************************************/
void Abc_NtkFinalizeRead( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pLatch;
Abc_Obj_t * pLatch, * pBox, * pObj;
int i;
if ( pNtk->ntkType == ABC_NTK_BLACKBOX )
{
pBox = Abc_NtkCreateBox(pNtk);
Abc_NtkForEachPi( pNtk, pObj, i )
Abc_ObjAddFanin( pBox, Abc_ObjFanout0(pObj) );
Abc_NtkForEachPo( pNtk, pObj, i )
Abc_ObjAddFanin( Abc_ObjFanin0(pObj), pBox );
return;
}
assert( Abc_NtkIsNetlist(pNtk) );
// fix the net drivers
Abc_NtkFixNonDrivenNets( pNtk );
@ -788,6 +797,18 @@ void Abc_NtkDelete( Abc_Ntk_t * pNtk )
}
else if ( !Abc_NtkHasMapping(pNtk) )
assert( 0 );
// free the hierarchy
if ( Abc_NtkIsNetlist(pNtk) && pNtk->tName2Model )
{
stmm_generator * gen;
Abc_Ntk_t * pNtkTemp;
char * pName;
stmm_foreach_item( pNtk->tName2Model, gen, &pName, (char **)&pNtkTemp )
Abc_NtkDelete( pNtkTemp );
stmm_free_table( pNtk->tName2Model );
if ( pNtk->pBlackBoxes )
Vec_IntFree( pNtk->pBlackBoxes );
}
free( pNtk );
}

View File

@ -128,6 +128,10 @@ void Abc_ObjAdd( Abc_Obj_t * pObj )
Vec_PtrPush( pNtk->vCos, pObj );
pNtk->nPos++;
}
else if ( Abc_ObjIsBox(pObj) )
{
pNtk->nBoxes++;
}
else
{
assert( 0 );
@ -404,6 +408,25 @@ Abc_Obj_t * Abc_NtkCreateNode( Abc_Ntk_t * pNtk )
return pObj;
}
/**Function*************************************************************
Synopsis [Create the new node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Obj_t * Abc_NtkCreateBox( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj;
pObj = Abc_ObjAlloc( pNtk, ABC_OBJ_BOX );
Abc_ObjAdd( pObj );
return pObj;
}
/**Function*************************************************************
Synopsis [Create the new node.]

View File

@ -247,6 +247,26 @@ int Abc_NtkGetExorNum( Abc_Ntk_t * pNtk )
return Counter;
}
/**Function*************************************************************
Synopsis [Counts the number of exors.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NtkGetMuxNum( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pNode;
int i, Counter = 0;
Abc_NtkForEachNode( pNtk, pNode, i )
Counter += Abc_NodeIsMuxType(pNode);
return Counter;
}
/**Function*************************************************************
Synopsis [Returns 1 if it is an AIG with choice nodes.]

View File

@ -68,6 +68,7 @@ static int Abc_CommandRr ( Abc_Frame_t * pAbc, int argc, char ** argv
static int Abc_CommandLogic ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandMiter ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandDemiter ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandFrames ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandSop ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandBdd ( Abc_Frame_t * pAbc, int argc, char ** argv );
@ -176,6 +177,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
// Cmd_CommandAdd( pAbc, "Various", "logic", Abc_CommandLogic, 1 );
Cmd_CommandAdd( pAbc, "Various", "miter", Abc_CommandMiter, 1 );
Cmd_CommandAdd( pAbc, "Various", "demiter", Abc_CommandDemiter, 1 );
Cmd_CommandAdd( pAbc, "Various", "frames", Abc_CommandFrames, 1 );
Cmd_CommandAdd( pAbc, "Various", "sop", Abc_CommandSop, 0 );
Cmd_CommandAdd( pAbc, "Various", "bdd", Abc_CommandBdd, 0 );
@ -3011,6 +3013,80 @@ usage:
return 1;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_CommandDemiter( Abc_Frame_t * pAbc, int argc, char ** argv )
{
FILE * pOut, * pErr;
Abc_Ntk_t * pNtk, * pNtkRes;
int fComb;
int c;
extern Abc_Ntk_t * Abc_NtkDemiter( Abc_Ntk_t * pNtk );
pNtk = Abc_FrameReadNtk(pAbc);
pOut = Abc_FrameReadOut(pAbc);
pErr = Abc_FrameReadErr(pAbc);
// set defaults
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "ch" ) ) != EOF )
{
switch ( c )
{
case 'c':
fComb ^= 1;
break;
default:
goto usage;
}
}
if ( !Abc_NtkIsStrash(pNtk) )
{
fprintf( pErr, "The network is not strashed.\n" );
return 1;
}
if ( Abc_NtkPoNum(pNtk) != 1 )
{
fprintf( pErr, "The network is not a miter.\n" );
return 1;
}
if ( !Abc_ObjFanin0(Abc_NtkPo(pNtk,0))->fExor )
{
fprintf( pErr, "The miter's PO is not an EXOR.\n" );
return 1;
}
// get the new network
pNtkRes = Abc_NtkDemiter( pNtk );
if ( pNtkRes == NULL )
{
fprintf( pErr, "Miter computation has failed.\n" );
return 1;
}
// replace the current network
// Abc_FrameReplaceCurrentNetwork( pAbc, pNtkRes );
return 0;
usage:
fprintf( pErr, "usage: demiter [-h]\n" );
fprintf( pErr, "\t removes topmost EXOR from the miter to create two POs\n" );
// fprintf( pErr, "\t-c : computes combinational miter (latches as POs) [default = %s]\n", fComb? "yes": "no" );
fprintf( pErr, "\t-h : print the command usage\n");
return 1;
}
/**Function*************************************************************
Synopsis []
@ -4398,6 +4474,7 @@ int Abc_CommandTest( Abc_Frame_t * pAbc, int argc, char ** argv )
FILE * pOut, * pErr;
Abc_Ntk_t * pNtk;//, * pNtkRes;
int c;
int nLevels;
// extern Abc_Ntk_t * Abc_NtkNewAig( Abc_Ntk_t * pNtk );
pNtk = Abc_FrameReadNtk(pAbc);
@ -4405,11 +4482,23 @@ int Abc_CommandTest( Abc_Frame_t * pAbc, int argc, char ** argv )
pErr = Abc_FrameReadErr(pAbc);
// set defaults
nLevels = 15;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF )
while ( ( c = Extra_UtilGetopt( argc, argv, "Nh" ) ) != EOF )
{
switch ( c )
{
case 'N':
if ( globalUtilOptind >= argc )
{
fprintf( pErr, "Command line switch \"-N\" should be followed by an integer.\n" );
goto usage;
}
nLevels = atoi(argv[globalUtilOptind]);
globalUtilOptind++;
if ( nLevels < 0 )
goto usage;
break;
case 'h':
goto usage;
default:
@ -4451,7 +4540,14 @@ int Abc_CommandTest( Abc_Frame_t * pAbc, int argc, char ** argv )
// Cut_CellDumpToFile();
// else
// Cut_CellPrecompute();
Cut_CellLoad();
// Cut_CellLoad();
{
Abc_Ntk_t * pNtkRes;
extern Abc_Ntk_t * Abc_NtkTopmost( Abc_Ntk_t * pNtk, int nLevels );
pNtkRes = Abc_NtkTopmost( pNtk, nLevels );
Abc_FrameReplaceCurrentNetwork( pAbc, pNtkRes );
}
return 0;

View File

@ -953,6 +953,61 @@ void Abc_NtkAddFrame2( Abc_Ntk_t * pNtkFrames, Abc_Ntk_t * pNtk, int iFrame, Vec
}
}
/**Function*************************************************************
Synopsis [Derives the timeframes of the network.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkDemiter( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pNodeC, * pNodeA, * pNodeB, * pNode;
Abc_Obj_t * pPoNew;
Vec_Ptr_t * vNodes1, * vNodes2;
int nCommon, i;
assert( Abc_NtkIsStrash(pNtk) );
assert( Abc_NtkPoNum(pNtk) == 1 );
assert( Abc_ObjFanin0(Abc_NtkPo(pNtk,0))->fExor );
pNodeC = Abc_NodeRecognizeMux( Abc_ObjFanin0(Abc_NtkPo(pNtk,0)), &pNodeA, &pNodeB );
assert( Abc_ObjRegular(pNodeA) == Abc_ObjRegular(pNodeB) );
pPoNew = Abc_NtkCreatePo( pNtk );
Abc_ObjAddFanin( pPoNew, pNodeC );
Abc_NtkLogicStoreName( pPoNew, "addOut1" );
pPoNew = Abc_NtkCreatePo( pNtk );
Abc_ObjAddFanin( pPoNew, Abc_ObjRegular(pNodeA) );
Abc_NtkLogicStoreName( pPoNew, "addOut2" );
// mark the nodes in the first cone
pNodeA = Abc_ObjRegular(pNodeA);
vNodes1 = Abc_NtkDfsNodes( pNtk, &pNodeC, 1 );
vNodes2 = Abc_NtkDfsNodes( pNtk, &pNodeA, 1 );
Vec_PtrForEachEntry( vNodes1, pNode, i )
pNode->fMarkA = 1;
nCommon = 0;
Vec_PtrForEachEntry( vNodes2, pNode, i )
nCommon += pNode->fMarkA;
Vec_PtrForEachEntry( vNodes1, pNode, i )
pNode->fMarkA = 0;
printf( "First cone = %6d. Second cone = %6d. Common = %6d.\n", vNodes1->nSize, vNodes2->nSize, nCommon );
Vec_PtrFree( vNodes1 );
Vec_PtrFree( vNodes2 );
return pNtk;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

View File

@ -48,7 +48,7 @@
***********************************************************************/
void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
{
int Num;
int Num, Num2;
fprintf( pFile, "%-13s:", pNtk->pName );
fprintf( pFile, " i/o = %4d/%4d", Abc_NtkPiNum(pNtk), Abc_NtkPoNum(pNtk) );
@ -64,18 +64,23 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored )
fprintf( pFile, " nd = %5d", Abc_NtkNodeNum(pNtk) );
}
else if ( Abc_NtkHasAig(pNtk) )
{
{
fprintf( pFile, " and = %5d", Abc_NtkNodeNum(pNtk) );
if ( Num = Abc_NtkGetChoiceNum(pNtk) )
fprintf( pFile, " (choice = %d)", Num );
if ( Num = Abc_NtkGetExorNum(pNtk) )
fprintf( pFile, " (exor = %d)", Num );
if ( Num2 = Abc_NtkGetMuxNum(pNtk) )
fprintf( pFile, " (mux = %d)", Num2-Num );
if ( Num2 )
fprintf( pFile, " (other = %d)", Abc_NtkNodeNum(pNtk)-3*Num2 );
}
else
fprintf( pFile, " nd = %5d", Abc_NtkNodeNum(pNtk) );
if ( Abc_NtkHasSop(pNtk) )
{
fprintf( pFile, " cube = %5d", Abc_NtkGetCubeNum(pNtk) );
// fprintf( pFile, " lit(sop) = %5d", Abc_NtkGetLitNum(pNtk) );
if ( fFactored )

View File

@ -332,6 +332,74 @@ Abc_Obj_t * Abc_NodeStrashFactor( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pRoot, char *
return pAnd;
}
/**Function*************************************************************
Synopsis [Copies the topmost levels of the network.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Obj_t * Abc_NtkTopmost_rec( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode, int LevelCut )
{
assert( Abc_ObjIsComplement(pNode) );
if ( pNode->pCopy )
return pNode->pCopy;
if ( pNode->Level <= (unsigned)LevelCut )
return pNode->pCopy = Abc_NtkCreatePi( pNtkNew );
Abc_NtkTopmost_rec( pNtkNew, Abc_ObjFanin0(pNode), LevelCut );
Abc_NtkTopmost_rec( pNtkNew, Abc_ObjFanin1(pNode), LevelCut );
return pNode->pCopy = Abc_AigAnd( pNtkNew->pManFunc, Abc_ObjChild0Copy(pNode), Abc_ObjChild1Copy(pNode) );
}
/**Function*************************************************************
Synopsis [Copies the topmost levels of the network.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkTopmost( Abc_Ntk_t * pNtk, int nLevels )
{
Abc_Ntk_t * pNtkNew;
Abc_Obj_t * pObjNew, * pPoNew;
int LevelCut;
assert( Abc_NtkIsStrash(pNtk) );
assert( Abc_NtkCoNum(pNtk) == 1 );
// get the cutoff level
LevelCut = ABC_MAX( 0, Abc_AigGetLevelNum(pNtk) - nLevels );
// start the network
pNtkNew = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG );
pNtkNew->pName = Extra_UtilStrsav(pNtk->pName);
Abc_NtkConst1(pNtk)->pCopy = Abc_NtkConst1(pNtkNew);
// create PIs below the cut and nodes above the cut
Abc_NtkCleanCopy( pNtk );
pObjNew = Abc_NtkTopmost_rec( pNtkNew, Abc_ObjFanin0(Abc_NtkPo(pNtk, 0)), LevelCut );
// add the PO node and name
pPoNew = Abc_NtkCreatePo(pNtkNew);
Abc_ObjAddFanin( pPoNew, pObjNew );
Abc_NtkAddDummyPiNames( pNtkNew );
Abc_NtkLogicStoreName( pPoNew, Abc_ObjName(Abc_NtkPo(pNtk, 0)) );
// make sure everything is okay
if ( !Abc_NtkCheck( pNtkNew ) )
{
printf( "Abc_NtkTopmost: The network check has failed.\n" );
Abc_NtkDelete( pNtkNew );
return NULL;
}
return pNtkNew;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

View File

@ -1264,7 +1264,7 @@ int CmdCommandSis( Abc_Frame_t * pAbc, int argc, char **argv )
fprintf( pErr, "Cannot produce the intermediate network.\n" );
goto usage;
}
Io_WriteBlif( pNetlist, "_sis_in.blif", 1 );
Io_WriteBlifNetlist( pNetlist, "_sis_in.blif", 1 );
Abc_NtkDelete( pNetlist );
// create the file for sis
@ -1405,7 +1405,7 @@ int CmdCommandMvsis( Abc_Frame_t * pAbc, int argc, char **argv )
fprintf( pErr, "Cannot produce the intermediate network.\n" );
goto usage;
}
Io_WriteBlif( pNetlist, "_mvsis_in.blif", 1 );
Io_WriteBlifNetlist( pNetlist, "_mvsis_in.blif", 1 );
Abc_NtkDelete( pNetlist );
// create the file for MVSIS
@ -1551,7 +1551,7 @@ int CmdCommandCapo( Abc_Frame_t * pAbc, int argc, char **argv )
fprintf( pErr, "Cannot produce the intermediate network.\n" );
goto usage;
}
Io_WriteBlif( pNetlist, "_capo_in.blif", 1 );
Io_WriteBlifNetlist( pNetlist, "_capo_in.blif", 1 );
Abc_NtkDelete( pNetlist );
// create the file for Capo

View File

@ -912,7 +912,7 @@ int IoCommandWriteBlif( Abc_Frame_t * pAbc, int argc, char **argv )
return 0;
}
Io_WriteBlifLogic( pNtk, FileName, fWriteLatches );
// Io_WriteBlif( pNtk, FileName, fWriteLatches );
// Io_WriteBlifNetlist( pNtk, FileName, fWriteLatches );
return 0;
usage:

View File

@ -77,8 +77,8 @@ extern FILE * Io_FileOpen( const char * FileName, const char * PathV
/*=== abcWriteBaf.c ==========================================================*/
extern void Io_WriteBaf( Abc_Ntk_t * pNtk, char * pFileName );
/*=== abcWriteBlif.c ==========================================================*/
extern void Io_WriteBlif( Abc_Ntk_t * pNtk, char * pFileName, int fWriteLatches );
extern void Io_WriteBlifLogic( Abc_Ntk_t * pNtk, char * pFileName, int fWriteLatches );
extern void Io_WriteBlifNetlist( Abc_Ntk_t * pNtk, char * pFileName, int fWriteLatches );
extern void Io_WriteTimingInfo( FILE * pFile, Abc_Ntk_t * pNtk );
/*=== abcWriteBench.c ==========================================================*/
extern int Io_WriteBench( Abc_Ntk_t * pNtk, char * FileName );

View File

@ -33,11 +33,10 @@ struct Io_ReadBlif_t_
char * pFileName; // the name of the file
Extra_FileReader_t * pReader; // the input file reader
// current processing info
Abc_Ntk_t * pNtk; // the primary network
Abc_Ntk_t * pNtkExdc; // the exdc network
int fParsingExdc; // this flag is on, when we are parsing EXDC network
Abc_Ntk_t * pNtkCur; // the primary network
int LineCur; // the line currently parsed
// temporary storage for tokens
Vec_Ptr_t * vTokens; // the current tokens
Vec_Ptr_t * vNewTokens; // the temporary storage for the tokens
Vec_Str_t * vCubes; // the temporary storage for the tokens
// the error message
@ -49,16 +48,19 @@ static Io_ReadBlif_t * Io_ReadBlifFile( char * pFileName );
static void Io_ReadBlifFree( Io_ReadBlif_t * p );
static void Io_ReadBlifPrintErrorMessage( Io_ReadBlif_t * p );
static Vec_Ptr_t * Io_ReadBlifGetTokens( Io_ReadBlif_t * p );
static Abc_Ntk_t * Io_ReadBlifNetwork( Io_ReadBlif_t * p );
static char * Io_ReadBlifCleanName( char * pName );
static Abc_Ntk_t * Io_ReadBlifNetwork( Io_ReadBlif_t * p );
static Abc_Ntk_t * Io_ReadBlifNetworkOne( Io_ReadBlif_t * p );
static int Io_ReadBlifNetworkInputs( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens );
static int Io_ReadBlifNetworkOutputs( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens );
static int Io_ReadBlifNetworkLatch( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens );
static int Io_ReadBlifNetworkNames( Io_ReadBlif_t * p, Vec_Ptr_t ** pvTokens );
static int Io_ReadBlifNetworkGate( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens );
static int Io_ReadBlifNetworkSubcircuit( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens );
static int Io_ReadBlifNetworkInputArrival( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens );
static int Io_ReadBlifNetworkDefaultInputArrival( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens );
static int Io_ReadBlifNetworkConnectBoxes( Io_ReadBlif_t * p, Abc_Ntk_t * pNtkMaster );
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
@ -66,9 +68,9 @@ static int Io_ReadBlifNetworkDefaultInputArrival( Io_ReadBlif_t * p, Vec_Ptr_t *
/**Function*************************************************************
Synopsis [Reads the network from a BLIF file.]
Synopsis [Reads the (hierarchical) network from the BLIF file.]
Description [Works only for flat (non-hierarchical) BLIF.]
Description []
SideEffects []
@ -78,34 +80,22 @@ static int Io_ReadBlifNetworkDefaultInputArrival( Io_ReadBlif_t * p, Vec_Ptr_t *
Abc_Ntk_t * Io_ReadBlif( char * pFileName, int fCheck )
{
Io_ReadBlif_t * p;
Abc_Ntk_t * pNtk, * pNtkExdc;
Abc_Ntk_t * pNtk;
// start the file
p = Io_ReadBlifFile( pFileName );
if ( p == NULL )
return NULL;
// read the network
// read the hierarchical network
pNtk = Io_ReadBlifNetwork( p );
if ( pNtk == NULL )
{
Io_ReadBlifFree( p );
return NULL;
}
pNtk->pSpec = Extra_UtilStrsav( pFileName );
Abc_NtkTimeInitialize( pNtk );
// read the EXDC network
if ( p->fParsingExdc )
{
pNtkExdc = Io_ReadBlifNetwork( p );
if ( pNtkExdc == NULL )
{
Abc_NtkDelete( pNtk );
Io_ReadBlifFree( p );
return NULL;
}
pNtk->pExdc = pNtkExdc;
}
Io_ReadBlifFree( p );
// make sure that everything is okay with the network structure
@ -120,150 +110,7 @@ Abc_Ntk_t * Io_ReadBlif( char * pFileName, int fCheck )
/**Function*************************************************************
Synopsis [Starts the reading data structure.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Io_ReadBlif_t * Io_ReadBlifFile( char * pFileName )
{
Extra_FileReader_t * pReader;
Io_ReadBlif_t * p;
// start the reader
pReader = Extra_FileReaderAlloc( pFileName, "#", "\n\r", " \t" );
if ( pReader == NULL )
return NULL;
// start the reading data structure
p = ALLOC( Io_ReadBlif_t, 1 );
memset( p, 0, sizeof(Io_ReadBlif_t) );
p->pFileName = pFileName;
p->pReader = pReader;
p->Output = stdout;
p->vNewTokens = Vec_PtrAlloc( 100 );
p->vCubes = Vec_StrAlloc( 100 );
return p;
}
/**Function*************************************************************
Synopsis [Frees the data structure.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Io_ReadBlifFree( Io_ReadBlif_t * p )
{
Extra_FileReaderFree( p->pReader );
Vec_PtrFree( p->vNewTokens );
Vec_StrFree( p->vCubes );
free( p );
}
/**Function*************************************************************
Synopsis [Prints the error message including the file name and line number.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Io_ReadBlifPrintErrorMessage( Io_ReadBlif_t * p )
{
if ( p->LineCur == 0 ) // the line number is not given
fprintf( p->Output, "%s: %s\n", p->pFileName, p->sError );
else // print the error message with the line number
fprintf( p->Output, "%s (line %d): %s\n", p->pFileName, p->LineCur, p->sError );
}
/**Function*************************************************************
Synopsis [Gets the tokens taking into account the line breaks.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Ptr_t * Io_ReadBlifGetTokens( Io_ReadBlif_t * p )
{
Vec_Ptr_t * vTokens;
char * pLastToken;
int i;
// get rid of the old tokens
if ( p->vNewTokens->nSize > 0 )
{
for ( i = 0; i < p->vNewTokens->nSize; i++ )
free( p->vNewTokens->pArray[i] );
p->vNewTokens->nSize = 0;
}
// get the new tokens
vTokens = Extra_FileReaderGetTokens(p->pReader);
if ( vTokens == NULL )
return vTokens;
// check if there is a transfer to another line
pLastToken = vTokens->pArray[vTokens->nSize - 1];
if ( pLastToken[ strlen(pLastToken)-1 ] != '\\' )
return vTokens;
// remove the slash
pLastToken[ strlen(pLastToken)-1 ] = 0;
if ( pLastToken[0] == 0 )
vTokens->nSize--;
// load them into the new array
for ( i = 0; i < vTokens->nSize; i++ )
Vec_PtrPush( p->vNewTokens, Extra_UtilStrsav(vTokens->pArray[i]) );
// load as long as there is the line break
while ( 1 )
{
// get the new tokens
vTokens = Extra_FileReaderGetTokens(p->pReader);
if ( vTokens->nSize == 0 )
return p->vNewTokens;
// check if there is a transfer to another line
pLastToken = vTokens->pArray[vTokens->nSize - 1];
if ( pLastToken[ strlen(pLastToken)-1 ] == '\\' )
{
// remove the slash
pLastToken[ strlen(pLastToken)-1 ] = 0;
if ( pLastToken[0] == 0 )
vTokens->nSize--;
// load them into the new array
for ( i = 0; i < vTokens->nSize; i++ )
Vec_PtrPush( p->vNewTokens, Extra_UtilStrsav(vTokens->pArray[i]) );
continue;
}
// otherwise, load them and break
for ( i = 0; i < vTokens->nSize; i++ )
Vec_PtrPush( p->vNewTokens, Extra_UtilStrsav(vTokens->pArray[i]) );
break;
}
return p->vNewTokens;
}
/**Function*************************************************************
Synopsis [Reads the BLIF file.]
Synopsis [Iteratively reads several networks in the hierarchical design.]
Description []
@ -274,72 +121,147 @@ Vec_Ptr_t * Io_ReadBlifGetTokens( Io_ReadBlif_t * p )
***********************************************************************/
Abc_Ntk_t * Io_ReadBlifNetwork( Io_ReadBlif_t * p )
{
ProgressBar * pProgress;
Vec_Ptr_t * vTokens;
char * pModelName, * pDirective;
int iLine, fTokensReady, fStatus;
Abc_Ntk_t * pNtk, * pNtkMaster;
// read the model name
if ( !p->fParsingExdc )
// read the name of the master network
p->vTokens = Io_ReadBlifGetTokens(p);
if ( p->vTokens == NULL || strcmp( p->vTokens->pArray[0], ".model" ) )
{
// read the model name
vTokens = Io_ReadBlifGetTokens(p);
if ( vTokens == NULL || strcmp( vTokens->pArray[0], ".model" ) )
p->LineCur = 0;
sprintf( p->sError, "Wrong input file format." );
Io_ReadBlifPrintErrorMessage( p );
return NULL;
}
// read networks (with EXDC)
pNtkMaster = NULL;
while ( p->vTokens )
{
// read the network and its EXDC if present
pNtk = Io_ReadBlifNetworkOne( p );
if ( pNtk == NULL )
break;
if ( p->vTokens && strcmp(p->vTokens->pArray[0], ".exdc") == 0 )
{
pNtk->pExdc = Io_ReadBlifNetworkOne( p );
Abc_NtkFinalizeRead( pNtk->pExdc );
if ( pNtk->pExdc == NULL )
break;
}
// add this network as part of the hierarchy
if ( pNtkMaster == NULL ) // no master network so far
{
pNtkMaster = pNtk;
continue;
}
// make sure hierarchy does not have the network with this name
if ( pNtkMaster->tName2Model && stmm_is_member( pNtkMaster->tName2Model, pNtk->pName ) )
{
p->LineCur = 0;
sprintf( p->sError, "Wrong input file format." );
sprintf( p->sError, "Model %s is multiply defined in the file.", pNtk->pName );
Io_ReadBlifPrintErrorMessage( p );
Abc_NtkDelete( pNtk );
Abc_NtkDelete( pNtkMaster );
pNtkMaster = NULL;
return NULL;
}
// add the network to the hierarchy
if ( pNtkMaster->tName2Model == NULL )
pNtkMaster->tName2Model = stmm_init_table(strcmp, stmm_strhash);
stmm_insert( pNtkMaster->tName2Model, pNtk->pName, (char *)pNtk );
}
// if there is a hierarchy, connect the boxes
if ( pNtkMaster && pNtkMaster->tName2Model )
{
if ( Io_ReadBlifNetworkConnectBoxes( p, pNtkMaster ) )
{
Abc_NtkDelete( pNtkMaster );
return NULL;
}
pModelName = vTokens->pArray[1];
// allocate the empty network
p->pNtk = Abc_NtkAlloc( ABC_NTK_NETLIST, ABC_FUNC_SOP );
p->pNtk->pName = Extra_UtilStrsav( pModelName );
p->pNtk->pSpec = Extra_UtilStrsav( p->pFileName );
}
else
p->pNtk = Abc_NtkAlloc( ABC_NTK_NETLIST, ABC_FUNC_SOP );
Abc_NtkFinalizeRead( pNtkMaster );
// return the master network
return pNtkMaster;
}
/**Function*************************************************************
Synopsis [Reads one (main or exdc) network from the BLIF file.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Io_ReadBlifNetworkOne( Io_ReadBlif_t * p )
{
ProgressBar * pProgress;
Abc_Ntk_t * pNtk;
char * pDirective;
int iLine, fTokensReady, fStatus;
// make sure the tokens are present
assert( p->vTokens != NULL );
// create the new network
p->pNtkCur = pNtk = Abc_NtkAlloc( ABC_NTK_NETLIST, ABC_FUNC_SOP );
// read the model name
if ( strcmp( p->vTokens->pArray[0], ".model" ) == 0 )
pNtk->pName = Extra_UtilStrsav( p->vTokens->pArray[1] );
// read the inputs/outputs
pProgress = Extra_ProgressBarStart( stdout, Extra_FileReaderGetFileSize(p->pReader) );
fTokensReady = fStatus = 0;
for ( iLine = 0; fTokensReady || (vTokens = Io_ReadBlifGetTokens(p)); iLine++ )
for ( iLine = 0; fTokensReady || (p->vTokens = Io_ReadBlifGetTokens(p)); iLine++ )
{
if ( iLine % 1000 == 0 )
Extra_ProgressBarUpdate( pProgress, Extra_FileReaderGetCurPosition(p->pReader), NULL );
// consider different line types
fTokensReady = 0;
pDirective = vTokens->pArray[0];
pDirective = p->vTokens->pArray[0];
if ( !strcmp( pDirective, ".names" ) )
{ fStatus = Io_ReadBlifNetworkNames( p, &vTokens ); fTokensReady = 1; }
{ fStatus = Io_ReadBlifNetworkNames( p, &p->vTokens ); fTokensReady = 1; }
else if ( !strcmp( pDirective, ".gate" ) )
fStatus = Io_ReadBlifNetworkGate( p, vTokens );
fStatus = Io_ReadBlifNetworkGate( p, p->vTokens );
else if ( !strcmp( pDirective, ".latch" ) )
fStatus = Io_ReadBlifNetworkLatch( p, vTokens );
fStatus = Io_ReadBlifNetworkLatch( p, p->vTokens );
else if ( !strcmp( pDirective, ".inputs" ) )
fStatus = Io_ReadBlifNetworkInputs( p, vTokens );
fStatus = Io_ReadBlifNetworkInputs( p, p->vTokens );
else if ( !strcmp( pDirective, ".outputs" ) )
fStatus = Io_ReadBlifNetworkOutputs( p, vTokens );
fStatus = Io_ReadBlifNetworkOutputs( p, p->vTokens );
else if ( !strcmp( pDirective, ".input_arrival" ) )
fStatus = Io_ReadBlifNetworkInputArrival( p, vTokens );
fStatus = Io_ReadBlifNetworkInputArrival( p, p->vTokens );
else if ( !strcmp( pDirective, ".default_input_arrival" ) )
fStatus = Io_ReadBlifNetworkDefaultInputArrival( p, vTokens );
fStatus = Io_ReadBlifNetworkDefaultInputArrival( p, p->vTokens );
else if ( !strcmp( pDirective, ".subckt" ) )
fStatus = Io_ReadBlifNetworkSubcircuit( p, p->vTokens );
else if ( !strcmp( pDirective, ".exdc" ) )
{ p->fParsingExdc = 1; break; }
else if ( !strcmp( pDirective, ".end" ) )
break;
else if ( !strcmp( pDirective, ".end" ) )
{
p->vTokens = Io_ReadBlifGetTokens(p);
break;
}
else if ( !strcmp( pDirective, ".blackbox" ) )
{
pNtk->ntkType = ABC_NTK_BLACKBOX;
pNtk->ntkFunc = ABC_FUNC_BLACKBOX;
}
else
printf( "%s (line %d): Skipping directive \"%s\".\n", p->pFileName,
Extra_FileReaderGetLineNumber(p->pReader, 0), pDirective );
if ( vTokens == NULL ) // some files do not have ".end" in the end
if ( p->vTokens == NULL ) // some files do not have ".end" in the end
break;
if ( fStatus == 1 )
return NULL;
}
Extra_ProgressBarStop( pProgress );
Abc_NtkFinalizeRead( p->pNtk );
return p->pNtk;
return pNtk;
}
/**Function*************************************************************
@ -357,7 +279,7 @@ int Io_ReadBlifNetworkInputs( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
{
int i;
for ( i = 1; i < vTokens->nSize; i++ )
Io_ReadCreatePi( p->pNtk, vTokens->pArray[i] );
Io_ReadCreatePi( p->pNtkCur, vTokens->pArray[i] );
return 0;
}
@ -376,7 +298,7 @@ int Io_ReadBlifNetworkOutputs( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
{
int i;
for ( i = 1; i < vTokens->nSize; i++ )
Io_ReadCreatePo( p->pNtk, vTokens->pArray[i] );
Io_ReadCreatePo( p->pNtkCur, vTokens->pArray[i] );
return 0;
}
@ -393,7 +315,7 @@ int Io_ReadBlifNetworkOutputs( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
***********************************************************************/
int Io_ReadBlifNetworkLatch( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
{
Abc_Ntk_t * pNtk = p->pNtk;
Abc_Ntk_t * pNtk = p->pNtkCur;
Abc_Obj_t * pLatch;
int ResetValue;
if ( vTokens->nSize < 3 )
@ -442,7 +364,7 @@ int Io_ReadBlifNetworkLatch( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
int Io_ReadBlifNetworkNames( Io_ReadBlif_t * p, Vec_Ptr_t ** pvTokens )
{
Vec_Ptr_t * vTokens = *pvTokens;
Abc_Ntk_t * pNtk = p->pNtk;
Abc_Ntk_t * pNtk = p->pNtkCur;
Abc_Obj_t * pNode;
char * pToken, Char, ** ppNames;
int nFanins, nNames;
@ -584,12 +506,12 @@ int Io_ReadBlifNetworkGate( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
}
// if this is the first line with gate, update the network type
if ( Abc_NtkNodeNum(p->pNtk) == 0 )
if ( Abc_NtkNodeNum(p->pNtkCur) == 0 )
{
assert( p->pNtk->ntkFunc == ABC_FUNC_SOP );
p->pNtk->ntkFunc = ABC_FUNC_MAP;
Extra_MmFlexStop( p->pNtk->pManFunc, 0 );
p->pNtk->pManFunc = pGenlib;
assert( p->pNtkCur->ntkFunc == ABC_FUNC_SOP );
p->pNtkCur->ntkFunc = ABC_FUNC_MAP;
Extra_MmFlexStop( p->pNtkCur->pManFunc, 0 );
p->pNtkCur->pManFunc = pGenlib;
}
// remove the formal parameter names
@ -608,13 +530,53 @@ int Io_ReadBlifNetworkGate( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
// create the node
ppNames = (char **)vTokens->pArray + 2;
nNames = vTokens->nSize - 3;
pNode = Io_ReadCreateNode( p->pNtk, ppNames[nNames], ppNames, nNames );
pNode = Io_ReadCreateNode( p->pNtkCur, ppNames[nNames], ppNames, nNames );
// set the pointer to the functionality of the node
Abc_ObjSetData( pNode, pGate );
return 0;
}
/**Function*************************************************************
Synopsis [Creates a multi-input multi-output box in the hierarchical design.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Io_ReadBlifNetworkSubcircuit( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
{
Abc_Obj_t * pBox;
Vec_Ptr_t * vNames;
char * pName;
int i;
// create a new node and add it to the network
if ( vTokens->nSize < 3 )
{
p->LineCur = Extra_FileReaderGetLineNumber(p->pReader, 0);
sprintf( p->sError, "The .subcircuit line has less than three tokens." );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
// store the names of formal/actual inputs/outputs of the box
vNames = Vec_PtrAlloc( 10 );
Vec_PtrForEachEntryStart( vTokens, pName, i, 1 )
Vec_PtrPush( vNames, Abc_NtkRegisterName(p->pNtkCur, pName) );
// create a new box and add it to the network
pBox = Abc_NtkCreateBox( p->pNtkCur );
// set the pointer to the node names
Abc_ObjSetData( pBox, vNames );
// remember the line of the file
pBox->pCopy = (void *)Extra_FileReaderGetLineNumber(p->pReader, 0);
return 0;
}
/**Function*************************************************************
@ -663,7 +625,7 @@ int Io_ReadBlifNetworkInputArrival( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
pNet = Abc_NtkFindNet( p->pNtk, vTokens->pArray[1] );
pNet = Abc_NtkFindNet( p->pNtkCur, vTokens->pArray[1] );
if ( pNet == NULL )
{
p->LineCur = Extra_FileReaderGetLineNumber(p->pReader, 0);
@ -681,7 +643,7 @@ int Io_ReadBlifNetworkInputArrival( Io_ReadBlif_t * p, Vec_Ptr_t * vTokens )
return 1;
}
// set the arrival time
Abc_NtkTimeSetArrival( p->pNtk, Abc_ObjFanin0(pNet)->Id, (float)TimeRise, (float)TimeFall );
Abc_NtkTimeSetArrival( p->pNtkCur, Abc_ObjFanin0(pNet)->Id, (float)TimeRise, (float)TimeFall );
return 0;
}
@ -720,10 +682,354 @@ int Io_ReadBlifNetworkDefaultInputArrival( Io_ReadBlif_t * p, Vec_Ptr_t * vToken
return 1;
}
// set the arrival time
Abc_NtkTimeSetDefaultArrival( p->pNtk, (float)TimeRise, (float)TimeFall );
Abc_NtkTimeSetDefaultArrival( p->pNtkCur, (float)TimeRise, (float)TimeFall );
return 0;
}
/**Function*************************************************************
Synopsis [Prints the error message including the file name and line number.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Io_ReadBlifPrintErrorMessage( Io_ReadBlif_t * p )
{
if ( p->LineCur == 0 ) // the line number is not given
fprintf( p->Output, "%s: %s\n", p->pFileName, p->sError );
else // print the error message with the line number
fprintf( p->Output, "%s (line %d): %s\n", p->pFileName, p->LineCur, p->sError );
}
/**Function*************************************************************
Synopsis [Gets the tokens taking into account the line breaks.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Ptr_t * Io_ReadBlifGetTokens( Io_ReadBlif_t * p )
{
Vec_Ptr_t * vTokens;
char * pLastToken;
int i;
// get rid of the old tokens
if ( p->vNewTokens->nSize > 0 )
{
for ( i = 0; i < p->vNewTokens->nSize; i++ )
free( p->vNewTokens->pArray[i] );
p->vNewTokens->nSize = 0;
}
// get the new tokens
vTokens = Extra_FileReaderGetTokens(p->pReader);
if ( vTokens == NULL )
return vTokens;
// check if there is a transfer to another line
pLastToken = vTokens->pArray[vTokens->nSize - 1];
if ( pLastToken[ strlen(pLastToken)-1 ] != '\\' )
return vTokens;
// remove the slash
pLastToken[ strlen(pLastToken)-1 ] = 0;
if ( pLastToken[0] == 0 )
vTokens->nSize--;
// load them into the new array
for ( i = 0; i < vTokens->nSize; i++ )
Vec_PtrPush( p->vNewTokens, Extra_UtilStrsav(vTokens->pArray[i]) );
// load as long as there is the line break
while ( 1 )
{
// get the new tokens
vTokens = Extra_FileReaderGetTokens(p->pReader);
if ( vTokens->nSize == 0 )
return p->vNewTokens;
// check if there is a transfer to another line
pLastToken = vTokens->pArray[vTokens->nSize - 1];
if ( pLastToken[ strlen(pLastToken)-1 ] == '\\' )
{
// remove the slash
pLastToken[ strlen(pLastToken)-1 ] = 0;
if ( pLastToken[0] == 0 )
vTokens->nSize--;
// load them into the new array
for ( i = 0; i < vTokens->nSize; i++ )
Vec_PtrPush( p->vNewTokens, Extra_UtilStrsav(vTokens->pArray[i]) );
continue;
}
// otherwise, load them and break
for ( i = 0; i < vTokens->nSize; i++ )
Vec_PtrPush( p->vNewTokens, Extra_UtilStrsav(vTokens->pArray[i]) );
break;
}
return p->vNewTokens;
}
/**Function*************************************************************
Synopsis [Starts the reading data structure.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Io_ReadBlif_t * Io_ReadBlifFile( char * pFileName )
{
Extra_FileReader_t * pReader;
Io_ReadBlif_t * p;
// start the reader
pReader = Extra_FileReaderAlloc( pFileName, "#", "\n\r", " \t" );
if ( pReader == NULL )
return NULL;
// start the reading data structure
p = ALLOC( Io_ReadBlif_t, 1 );
memset( p, 0, sizeof(Io_ReadBlif_t) );
p->pFileName = pFileName;
p->pReader = pReader;
p->Output = stdout;
p->vNewTokens = Vec_PtrAlloc( 100 );
p->vCubes = Vec_StrAlloc( 100 );
return p;
}
/**Function*************************************************************
Synopsis [Frees the data structure.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Io_ReadBlifFree( Io_ReadBlif_t * p )
{
Extra_FileReaderFree( p->pReader );
Vec_PtrFree( p->vNewTokens );
Vec_StrFree( p->vCubes );
free( p );
}
/**Function*************************************************************
Synopsis [Connect one box.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Io_ReadBlifNetworkConnectBoxesOneBox( Io_ReadBlif_t * p, Abc_Obj_t * pBox, stmm_table * tName2Model )
{
Vec_Ptr_t * pNames;
Abc_Ntk_t * pNtkModel;
Abc_Obj_t * pObj, * pNet;
char * pName, * pActual;
int i, Length, Start;
// get the model for this box
pNames = pBox->pData;
if ( !stmm_lookup( tName2Model, Vec_PtrEntry(pNames, 0), (char **)&pNtkModel ) )
{
p->LineCur = (int)pBox->pCopy;
sprintf( p->sError, "Cannot find the model for subcircuit %s.", Vec_PtrEntry(pNames, 0) );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
// create the fanins of the box
Abc_NtkForEachPi( pNtkModel, pObj, i )
pObj->pCopy = NULL;
Vec_PtrForEachEntryStart( pNames, pName, i, 1 )
{
pActual = Io_ReadBlifCleanName(pName);
if ( pActual == NULL )
{
p->LineCur = (int)pBox->pCopy;
sprintf( p->sError, "Cannot parse formal/actual name pair \"%s\".", pName );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
Length = pActual - pName - 1;
pName[Length] = 0;
// find the PI net with this name
pObj = Abc_NtkFindNet( pNtkModel, pName );
if ( pObj == NULL )
{
p->LineCur = (int)pBox->pCopy;
sprintf( p->sError, "Cannot find formal input \"%s\" as an PI of model \"%s\".", pName, Vec_PtrEntry(pNames, 0) );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
// get the PI
pObj = Abc_ObjFanin0(pObj);
// quit if this is not a PI net
if ( !Abc_ObjIsPi(pObj) )
{
pName[Length] = '=';
Start = i;
break;
}
// remember the actual name in the net
if ( pObj->pCopy != NULL )
{
p->LineCur = (int)pBox->pCopy;
sprintf( p->sError, "Formal input \"%s\" is used more than once.", pName );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
pObj->pCopy = (void *)pActual;
// quit if we processed all PIs
if ( i == Abc_NtkPiNum(pNtkModel) )
{
Start = i+1;
break;
}
}
// create the fanins of the box
Abc_NtkForEachPi( pNtkModel, pObj, i )
{
pActual = (void *)pObj->pCopy;
if ( pActual == NULL )
{
p->LineCur = (int)pBox->pCopy;
sprintf( p->sError, "Formal input \"%s\" of model %s is not driven.", pName, Vec_PtrEntry(pNames, 0) );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
pNet = Abc_NtkFindOrCreateNet( pBox->pNtk, pActual );
Abc_ObjAddFanin( pBox, pNet );
}
Abc_NtkForEachPi( pNtkModel, pObj, i )
pObj->pCopy = NULL;
// create the fanouts of the box
Abc_NtkForEachPo( pNtkModel, pObj, i )
pObj->pCopy = NULL;
Vec_PtrForEachEntryStart( pNames, pName, i, Start )
{
pActual = Io_ReadBlifCleanName(pName);
if ( pActual == NULL )
{
p->LineCur = (int)pBox->pCopy;
sprintf( p->sError, "Cannot parse formal/actual name pair \"%s\".", pName );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
Length = pActual - pName - 1;
pName[Length] = 0;
// find the PO net with this name
pObj = Abc_NtkFindNet( pNtkModel, pName );
if ( pObj == NULL )
{
p->LineCur = (int)pBox->pCopy;
sprintf( p->sError, "Cannot find formal output \"%s\" as an PO of model \"%s\".", pName, Vec_PtrEntry(pNames, 0) );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
// get the PO
pObj = Abc_ObjFanout0(pObj);
if ( pObj->pCopy != NULL )
{
p->LineCur = (int)pBox->pCopy;
sprintf( p->sError, "Formal output \"%s\" is used more than once.", pName );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
pObj->pCopy = (void *)pActual;
}
// create the fanouts of the box
Abc_NtkForEachPo( pNtkModel, pObj, i )
{
pActual = (void *)pObj->pCopy;
if ( pActual == NULL )
{
p->LineCur = (int)pBox->pCopy;
sprintf( p->sError, "Formal output \"%s\" of model %s is not driven.", pName, Vec_PtrEntry(pNames, 0) );
Io_ReadBlifPrintErrorMessage( p );
return 1;
}
pNet = Abc_NtkFindOrCreateNet( pBox->pNtk, pActual );
Abc_ObjAddFanin( pNet, pBox );
}
Abc_NtkForEachPo( pNtkModel, pObj, i )
pObj->pCopy = NULL;
// remove the array of names, assign the pointer to the model
Vec_PtrFree( pBox->pData );
pBox->pData = pNtkModel;
return 0;
}
/**Function*************************************************************
Synopsis [Connect the boxes in the hierarchy of networks.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Io_ReadBlifNetworkConnectBoxesOne( Io_ReadBlif_t * p, Abc_Ntk_t * pNtk, stmm_table * tName2Model )
{
Abc_Obj_t * pBox;
int i;
// go through the boxes
Abc_NtkForEachBox( pNtk, pBox, i )
if ( Io_ReadBlifNetworkConnectBoxesOneBox( p, pBox, tName2Model ) )
return 1;
Abc_NtkFinalizeRead( pNtk );
return 0;
}
/**Function*************************************************************
Synopsis [Connect the boxes in the hierarchy of networks.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Io_ReadBlifNetworkConnectBoxes( Io_ReadBlif_t * p, Abc_Ntk_t * pNtkMaster )
{
stmm_generator * gen;
Abc_Ntk_t * pNtk;
char * pName;
// connect the master network
if ( Io_ReadBlifNetworkConnectBoxesOne( p, pNtkMaster, pNtkMaster->tName2Model ) )
return 1;
// connect other networks
stmm_foreach_item( pNtkMaster->tName2Model, gen, &pName, (char **)&pNtk )
if ( Io_ReadBlifNetworkConnectBoxesOne( p, pNtk, pNtkMaster->tName2Model ) )
return 1;
return 0;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///

View File

@ -26,6 +26,7 @@
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
static void Io_NtkWrite( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches );
static void Io_NtkWriteOne( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches );
static void Io_NtkWritePis( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches );
static void Io_NtkWritePos( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches );
@ -59,7 +60,7 @@ void Io_WriteBlifLogic( Abc_Ntk_t * pNtk, char * FileName, int fWriteLatches )
fprintf( stdout, "Writing BLIF has failed.\n" );
return;
}
Io_WriteBlif( pNtkTemp, FileName, fWriteLatches );
Io_WriteBlifNetlist( pNtkTemp, FileName, fWriteLatches );
Abc_NtkDelete( pNtkTemp );
}
@ -74,19 +75,48 @@ void Io_WriteBlifLogic( Abc_Ntk_t * pNtk, char * FileName, int fWriteLatches )
SeeAlso []
***********************************************************************/
void Io_WriteBlif( Abc_Ntk_t * pNtk, char * FileName, int fWriteLatches )
void Io_WriteBlifNetlist( Abc_Ntk_t * pNtk, char * FileName, int fWriteLatches )
{
Abc_Ntk_t * pExdc;
stmm_generator * gen;
Abc_Ntk_t * pNtkTemp;
FILE * pFile;
assert( Abc_NtkIsNetlist(pNtk) );
// start writing the file
pFile = fopen( FileName, "w" );
if ( pFile == NULL )
{
fprintf( stdout, "Io_WriteBlif(): Cannot open the output file.\n" );
fprintf( stdout, "Io_WriteBlifNetlist(): Cannot open the output file.\n" );
return;
}
// write the model name
fprintf( pFile, "# Benchmark \"%s\" written by ABC on %s\n", pNtk->pName, Extra_TimeStamp() );
// write the master network
Io_NtkWrite( pFile, pNtk, fWriteLatches );
// write the hierarchy if present
if ( pNtk->tName2Model )
{
fprintf( pFile, "\n\n" );
stmm_foreach_item( pNtk->tName2Model, gen, NULL, (char **)&pNtkTemp )
Io_NtkWrite( pFile, pNtkTemp, fWriteLatches );
}
fclose( pFile );
}
/**Function*************************************************************
Synopsis [Write the network into a BLIF file with the given name.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Io_NtkWrite( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches )
{
Abc_Ntk_t * pExdc;
assert( Abc_NtkIsNetlist(pNtk) || Abc_NtkIsBlackbox(pNtk) );
// write the model name
fprintf( pFile, ".model %s\n", Abc_NtkName(pNtk) );
// write the network
Io_NtkWriteOne( pFile, pNtk, fWriteLatches );
@ -100,7 +130,6 @@ void Io_WriteBlif( Abc_Ntk_t * pNtk, char * FileName, int fWriteLatches )
}
// finalize the file
fprintf( pFile, ".end\n" );
fclose( pFile );
}
/**Function*************************************************************
@ -130,6 +159,13 @@ void Io_NtkWriteOne( FILE * pFile, Abc_Ntk_t * pNtk, int fWriteLatches )
Io_NtkWritePos( pFile, pNtk, fWriteLatches );
fprintf( pFile, "\n" );
// write the blackbox
if ( Abc_NtkIsBlackbox( pNtk ) )
{
fprintf( pFile, ".blackbox\n" );
return;
}
// write the timing info
Io_WriteTimingInfo( pFile, pNtk );

View File

@ -33,3 +33,20 @@ synthesis
- add hierarchical BLIF interface (for designs with black boxes)
Other great projects:
- Verilog to hierarchical BLIF (Icarus?)
- hierarchical BLIF input in ABC
- high-effort logic synthesis for hard miters (cofactoring, Boolean division)
- incremental retiming and sequential integration
- 5-6 input AIG rewriting using new ideas
- placement-aware mapping
- mapping into MV cells
- better ways of constructing BDDs
- SAT solver with linear constraints
- specialized synthesis for EXORs and large MUXes
- sequential AIG rewriting