mirror of https://github.com/YosysHQ/abc.git
Experiments with resubstitution.
This commit is contained in:
parent
07002bc9f9
commit
afebb18041
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@ -1361,6 +1361,7 @@ Vec_Wrd_t * Gia_ManSimBitPacking( Gia_Man_t * p, Vec_Int_t * vCexStore, int nCex
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iPat += Gia_ManSimBitPackOne( nWordsMax, vSimsIn, vSimsCare, iPat, Vec_IntEntryP(vCexStore, iCur), Size );
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iCur += Size;
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assert( iPat <= nCexes );
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Out = 0;
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}
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printf( "Compressed %d CEXes into %d test patterns.\n", nCexes, iPat );
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assert( iCur == Vec_IntSize(vCexStore) );
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@ -1550,7 +1551,7 @@ void Gia_ManSimPat( Gia_Man_t * p, int nWords0, int fVerbose )
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assert( Status >= -1 && Status <= 1 );
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Counts[Status+1]++;
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}
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printf( "Total = %d : SAT = %d. UNSAT = %d. UNDEC = %d.\n", Gia_ManCoNum(p), Counts[1], Counts[2], Counts[0] );
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printf( "Total = %d : SAT = %d. UNSAT = %d. UNDEC = %d.\n", Counts[1]+Counts[2]+Counts[0], Counts[1], Counts[2], Counts[0] );
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if ( Counts[1] == 0 )
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printf( "There are no counter-examples. No need for more simulation.\n" );
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else
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@ -1562,6 +1563,300 @@ void Gia_ManSimPat( Gia_Man_t * p, int nWords0, int fVerbose )
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}
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Vec_StrFree( vStatus );
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Vec_IntFree( vCexStore );
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Vec_WrdFree( vSims );
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}
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typedef struct Gia_SimRsbMan_t_ Gia_SimRsbMan_t;
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struct Gia_SimRsbMan_t_
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{
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Gia_Man_t * pGia;
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Vec_Int_t * vTfo;
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Vec_Int_t * vCands;
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Vec_Int_t * vFanins;
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Vec_Int_t * vFanins2;
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Vec_Wrd_t * vSimsObj;
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Vec_Wrd_t * vSimsObj2;
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int nWords;
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word * pFunc[3];
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};
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Gia_SimRsbMan_t * Gia_SimRsbAlloc( Gia_Man_t * pGia )
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{
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Gia_SimRsbMan_t * p = ABC_CALLOC( Gia_SimRsbMan_t, 1 );
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p->pGia = pGia;
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p->nWords = Vec_WrdSize(pGia->vSimsPi) / Gia_ManCiNum(pGia); assert( Vec_WrdSize(pGia->vSimsPi) % Gia_ManCiNum(pGia) == 0 );
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p->pFunc[0] = ABC_CALLOC( word, p->nWords );
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p->pFunc[1] = ABC_CALLOC( word, p->nWords );
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p->pFunc[2] = ABC_CALLOC( word, p->nWords );
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p->vTfo = Vec_IntAlloc( 1000 );
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p->vCands = Vec_IntAlloc( 1000 );
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p->vFanins = Vec_IntAlloc( 10 );
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p->vFanins2 = Vec_IntAlloc( 10 );
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p->vSimsObj = Gia_ManSimPatSim( pGia );
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p->vSimsObj2 = Vec_WrdStart( Vec_WrdSize(p->vSimsObj) );
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assert( p->nWords == Vec_WrdSize(p->vSimsObj) / Gia_ManObjNum(pGia) );
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Gia_ManStaticFanoutStart( pGia );
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return p;
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}
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void Gia_SimRsbFree( Gia_SimRsbMan_t * p )
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{
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Gia_ManStaticFanoutStop( p->pGia );
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Vec_IntFree( p->vTfo );
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Vec_IntFree( p->vCands );
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Vec_IntFree( p->vFanins );
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Vec_IntFree( p->vFanins2 );
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Vec_WrdFree( p->vSimsObj );
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Vec_WrdFree( p->vSimsObj2 );
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ABC_FREE( p->pFunc[0] );
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ABC_FREE( p->pFunc[1] );
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ABC_FREE( p->pFunc[2] );
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ABC_FREE( p );
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Gia_SimRsbTfo_rec( Gia_Man_t * p, int iObj, int iFanout, Vec_Int_t * vTfo )
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{
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int i, iFan;
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if ( Gia_ObjIsTravIdCurrentId(p, iObj) )
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return;
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Gia_ObjSetTravIdCurrentId(p, iObj);
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Gia_ObjForEachFanoutStaticId( p, iObj, iFan, i )
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if ( iFanout == -1 || iFan == iFanout )
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Gia_SimRsbTfo_rec( p, iFan, -1, vTfo );
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Vec_IntPush( vTfo, iObj );
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}
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Vec_Int_t * Gia_SimRsbTfo( Gia_SimRsbMan_t * p, int iObj, int iFanout )
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{
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assert( iObj > 0 );
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Vec_IntClear( p->vTfo );
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Gia_ManIncrementTravId( p->pGia );
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Gia_SimRsbTfo_rec( p->pGia, iObj, iFanout, p->vTfo );
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assert( Vec_IntEntryLast(p->vTfo) == iObj );
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Vec_IntPop( p->vTfo );
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Vec_IntReverseOrder( p->vTfo );
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Vec_IntSort( p->vTfo, 0 );
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return p->vTfo;
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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word * Gia_SimRsbFunc( Gia_SimRsbMan_t * p, int iObj, Vec_Int_t * vFanins, int fOnSet )
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{
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int nTruthWords = Abc_Truth6WordNum( Vec_IntSize(vFanins) );
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word * pTruth = ABC_CALLOC( word, nTruthWords );
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word * pFunc = Vec_WrdEntryP( p->vSimsObj, p->nWords*iObj );
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word * pFanins[16] = {NULL}; int s, b, iMint, i, iFanin;
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assert( Vec_IntSize(vFanins) <= 16 );
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Vec_IntForEachEntry( vFanins, iFanin, i )
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pFanins[i] = Vec_WrdEntryP( p->vSimsObj, p->nWords*iFanin );
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for ( s = 0; s < 64*p->nWords; s++ )
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{
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if ( !Abc_TtGetBit(p->pFunc[2], s) || !Abc_TtGetBit(pFunc, s) == fOnSet )
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continue;
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iMint = 0;
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for ( b = 0; b < Vec_IntSize(vFanins); b++ )
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if ( Abc_TtGetBit(pFanins[b], s) )
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iMint |= 1 << b;
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Abc_TtSetBit( pTruth, iMint );
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}
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return pTruth;
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}
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int Gia_SimRsbResubVerify( Gia_SimRsbMan_t * p, int iObj, Vec_Int_t * vFanins )
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{
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word * pTruth0 = Gia_SimRsbFunc( p, iObj, p->vFanins, 0 );
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word * pTruth1 = Gia_SimRsbFunc( p, iObj, p->vFanins, 1 );
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int Res = !Abc_TtIntersect( pTruth0, pTruth1, p->nWords, 0 );
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ABC_FREE( pTruth0 );
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ABC_FREE( pTruth1 );
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return Res;
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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static inline void Gia_SimRsbSimAndCareSet( Gia_Man_t * p, int i, Gia_Obj_t * pObj, int nWords, Vec_Wrd_t * vSims, Vec_Wrd_t * vSims2 )
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{
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word pComps[2] = { 0, ~(word)0 };
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word Diff0 = pComps[Gia_ObjFaninC0(pObj)];
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word Diff1 = pComps[Gia_ObjFaninC1(pObj)];
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Vec_Wrd_t * vSims0 = Gia_ObjIsTravIdCurrentId(p, Gia_ObjFaninId0(pObj, i)) ? vSims2 : vSims;
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Vec_Wrd_t * vSims1 = Gia_ObjIsTravIdCurrentId(p, Gia_ObjFaninId1(pObj, i)) ? vSims2 : vSims;
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word * pSims0 = Vec_WrdEntryP( vSims0, nWords*Gia_ObjFaninId0(pObj, i) );
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word * pSims1 = Vec_WrdEntryP( vSims1, nWords*Gia_ObjFaninId1(pObj, i) );
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word * pSims2 = Vec_WrdEntryP( vSims2, nWords*i ); int w;
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for ( w = 0; w < nWords; w++ )
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pSims2[w] = (pSims0[w] ^ Diff0) & (pSims1[w] ^ Diff1);
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}
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word * Gia_SimRsbCareSet( Gia_SimRsbMan_t * p, int iObj, Vec_Int_t * vTfo )
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{
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word * pSims = Vec_WrdEntryP( p->vSimsObj, p->nWords*iObj );
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word * pSims2 = Vec_WrdEntryP( p->vSimsObj2, p->nWords*iObj ); int iNode, i;
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Abc_TtCopy( pSims2, pSims, p->nWords, 1 );
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Abc_TtClear( p->pFunc[2], p->nWords );
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Vec_IntForEachEntry( vTfo, iNode, i )
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{
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Gia_Obj_t * pNode = Gia_ManObj(p->pGia, iNode);
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if ( Gia_ObjIsAnd(pNode) )
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Gia_SimRsbSimAndCareSet( p->pGia, iNode, pNode, p->nWords, p->vSimsObj, p->vSimsObj2 );
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else if ( Gia_ObjIsCo(pNode) )
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{
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word * pSimsA = Vec_WrdEntryP( p->vSimsObj, p->nWords*Gia_ObjFaninId0p(p->pGia, pNode) );
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word * pSimsB = Vec_WrdEntryP( p->vSimsObj2, p->nWords*Gia_ObjFaninId0p(p->pGia, pNode) );
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Abc_TtOrXor( p->pFunc[2], pSimsA, pSimsB, p->nWords );
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}
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else assert( 0 );
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}
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return p->pFunc[2];
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Gia_ObjSimCollect( Gia_SimRsbMan_t * p )
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{
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int i, k, iTemp, iFanout;
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Vec_IntClear( p->vFanins2 );
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assert( Vec_IntSize(p->vFanins) > 0 );
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Vec_IntForEachEntry( p->vFanins, iTemp, i )
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{
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Gia_Obj_t * pObj = Gia_ManObj( p->pGia, iTemp );
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if ( Gia_ObjIsAnd(pObj) && !Gia_ObjIsTravIdCurrentId( p->pGia, Gia_ObjFaninId0(pObj, iTemp) ) )
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Vec_IntPush( p->vFanins2, Gia_ObjFaninId0(pObj, iTemp) );
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if ( Gia_ObjIsAnd(pObj) && !Gia_ObjIsTravIdCurrentId( p->pGia, Gia_ObjFaninId1(pObj, iTemp) ) )
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Vec_IntPush( p->vFanins2, Gia_ObjFaninId1(pObj, iTemp) );
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Gia_ObjForEachFanoutStaticId( p->pGia, iTemp, iFanout, k )
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if ( Gia_ObjIsAnd(Gia_ManObj(p->pGia, iFanout)) && !Gia_ObjIsTravIdCurrentId( p->pGia, iFanout ) )
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Vec_IntPush( p->vFanins2, iFanout );
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}
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}
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Vec_Int_t * Gia_ObjSimCands( Gia_SimRsbMan_t * p, int iObj, int nCands )
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{
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assert( iObj > 0 );
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assert( Gia_ObjIsAnd(Gia_ManObj(p->pGia, iObj)) );
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Vec_IntClear( p->vCands );
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Vec_IntFill( p->vFanins, 1, iObj );
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while ( Vec_IntSize(p->vFanins) > 0 && Vec_IntSize(p->vCands) < nCands )
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{
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int i, iTemp;
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Vec_IntForEachEntry( p->vFanins, iTemp, i )
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Gia_ObjSetTravIdCurrentId( p->pGia, iTemp );
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Gia_ObjSimCollect( p ); // p->vFanins -> p->vFanins2
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Vec_IntAppend( p->vCands, p->vFanins2 );
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ABC_SWAP( Vec_Int_t *, p->vFanins, p->vFanins2 );
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}
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assert( Vec_IntSize(p->vFanins) == 0 || Vec_IntSize(p->vCands) >= nCands );
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if ( Vec_IntSize(p->vCands) > nCands )
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Vec_IntShrink( p->vCands, nCands );
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return p->vCands;
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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int Gia_ObjSimRsb( Gia_SimRsbMan_t * p, int iObj, int nCands, int fVerbose, int * pnBufs, int * pnInvs )
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{
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int i, iCand, RetValue = 0;
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Vec_Int_t * vTfo = Gia_SimRsbTfo( p, iObj, -1 );
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word * pCareSet = Gia_SimRsbCareSet( p, iObj, vTfo );
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word * pFunc = Vec_WrdEntryP( p->vSimsObj, p->nWords*iObj );
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Vec_Int_t * vCands = Gia_ObjSimCands( p, iObj, nCands );
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Abc_TtAndSharp( p->pFunc[0], pCareSet, pFunc, p->nWords, 1 );
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Abc_TtAndSharp( p->pFunc[1], pCareSet, pFunc, p->nWords, 0 );
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/*
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printf( "Considering node %d with %d candidates:\n", iObj, Vec_IntSize(vCands) );
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Vec_IntPrint( vTfo );
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Vec_IntPrint( vCands );
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Extra_PrintBinary( stdout, (unsigned *)pCareSet, 64 ); printf( "\n" );
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Extra_PrintBinary( stdout, (unsigned *)pFunc, 64 ); printf( "\n" );
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Extra_PrintBinary( stdout, (unsigned *)p->pFunc[0], 64 ); printf( "\n" );
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Extra_PrintBinary( stdout, (unsigned *)p->pFunc[1], 64 ); printf( "\n" );
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*/
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Vec_IntForEachEntry( vCands, iCand, i )
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{
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word * pDiv = Vec_WrdEntryP( p->vSimsObj, p->nWords*iCand );
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if ( !Abc_TtIntersect(pDiv, p->pFunc[0], p->nWords, 0) &&
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!Abc_TtIntersect(pDiv, p->pFunc[1], p->nWords, 1) )
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{ (*pnBufs)++; if ( fVerbose ) printf( "Level %3d : %d = buf(%d)\n", Gia_ObjLevelId(p->pGia, iObj), iObj, iCand ); RetValue = 1; }
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if ( !Abc_TtIntersect(pDiv, p->pFunc[0], p->nWords, 1) &&
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!Abc_TtIntersect(pDiv, p->pFunc[1], p->nWords, 0) )
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{ (*pnInvs)++; if ( fVerbose ) printf( "Level %3d : %d = inv(%d)\n", Gia_ObjLevelId(p->pGia, iObj), iObj, iCand ); RetValue = 1; }
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}
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return RetValue;
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}
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int Gia_ManSimRsb( Gia_Man_t * pGia, int nCands, int fVerbose )
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{
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Gia_Obj_t * pObj; int iObj, nCount = 0, nBufs = 0, nInvs = 0;
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Gia_SimRsbMan_t * p = Gia_SimRsbAlloc( pGia );
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assert( pGia->vSimsPi != NULL );
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Gia_ManLevelNum( pGia );
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Gia_ManForEachAnd( pGia, pObj, iObj )
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//if ( iObj == 6 )
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nCount += Gia_ObjSimRsb( p, iObj, nCands, fVerbose, &nBufs, &nInvs );
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printf( "Resubstitution is possible for %d nodes (%.2f %% out of %d) (Bufs = %d Invs = %d)\n",
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nCount, 100.0*nCount/Gia_ManAndNum(pGia), Gia_ManAndNum(pGia), nBufs, nInvs );
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Gia_SimRsbFree( p );
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return nCount;
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}
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////////////////////////////////////////////////////////////////////////
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@ -414,6 +414,7 @@ static int Abc_CommandAbc9Sim3 ( Abc_Frame_t * pAbc, int argc, cha
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static int Abc_CommandAbc9ReadSim ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9WriteSim ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9SimPat ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9SimRsb ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9Resim ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9SpecI ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9Equiv ( Abc_Frame_t * pAbc, int argc, char ** argv );
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@ -1126,6 +1127,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
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Cmd_CommandAdd( pAbc, "ABC9", "&read_sim", Abc_CommandAbc9ReadSim, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&write_sim", Abc_CommandAbc9WriteSim, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&simpat", Abc_CommandAbc9SimPat, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&simrsb", Abc_CommandAbc9SimRsb, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&resim", Abc_CommandAbc9Resim, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&speci", Abc_CommandAbc9SpecI, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&equiv", Abc_CommandAbc9Equiv, 0 );
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@ -32687,7 +32689,7 @@ int Abc_CommandAbc9SimPat( Abc_Frame_t * pAbc, int argc, char ** argv )
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}
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if ( pAbc->pGia->vSimsPi == NULL )
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{
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Abc_Print( -1, "Abc_CommandAbc9WriteSim(): Does not have simulation information available.\n" );
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Abc_Print( -1, "Abc_CommandAbc9SimPat(): Does not have simulation information available.\n" );
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return 0;
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}
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Gia_ManSimPat( pAbc->pGia, nWords, fVerbose );
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@ -32702,6 +32704,73 @@ usage:
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return 1;
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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||||
|
||||
***********************************************************************/
|
||||
int Abc_CommandAbc9SimRsb( Abc_Frame_t * pAbc, int argc, char ** argv )
|
||||
{
|
||||
extern void Gia_ManSimRsb( Gia_Man_t * p, int nCands, int fVerbose );
|
||||
int c, nCands = 32, fVerbose = 0;
|
||||
Extra_UtilGetoptReset();
|
||||
while ( ( c = Extra_UtilGetopt( argc, argv, "Nvh" ) ) != EOF )
|
||||
{
|
||||
switch ( c )
|
||||
{
|
||||
case 'N':
|
||||
if ( globalUtilOptind >= argc )
|
||||
{
|
||||
Abc_Print( -1, "Command line switch \"-N\" should be followed by an integer.\n" );
|
||||
goto usage;
|
||||
}
|
||||
nCands = atoi(argv[globalUtilOptind]);
|
||||
globalUtilOptind++;
|
||||
if ( nCands < 0 )
|
||||
goto usage;
|
||||
break;
|
||||
case 'v':
|
||||
fVerbose ^= 1;
|
||||
break;
|
||||
case 'h':
|
||||
goto usage;
|
||||
default:
|
||||
goto usage;
|
||||
}
|
||||
}
|
||||
if ( pAbc->pGia == NULL )
|
||||
{
|
||||
Abc_Print( -1, "Abc_CommandAbc9SimRsb(): There is no AIG.\n" );
|
||||
return 1;
|
||||
}
|
||||
if ( Gia_ManRegNum(pAbc->pGia) > 0 )
|
||||
{
|
||||
Abc_Print( -1, "Abc_CommandAbc9SimRsb(): This command works only for combinational AIGs.\n" );
|
||||
return 0;
|
||||
}
|
||||
if ( pAbc->pGia->vSimsPi == NULL )
|
||||
{
|
||||
Abc_Print( -1, "Abc_CommandAbc9SimRsb(): Does not have simulation information available.\n" );
|
||||
return 0;
|
||||
}
|
||||
Gia_ManSimRsb( pAbc->pGia, nCands, fVerbose );
|
||||
return 0;
|
||||
|
||||
usage:
|
||||
Abc_Print( -2, "usage: &simrsb [-N num] [-vh]\n" );
|
||||
Abc_Print( -2, "\t performs resubstitution\n" );
|
||||
Abc_Print( -2, "\t-C num : the number of candidates to try [default = %d]\n", nCands );
|
||||
Abc_Print( -2, "\t-v : toggle printing verbose information [default = %s]\n", fVerbose? "yes": "no" );
|
||||
Abc_Print( -2, "\t-h : print the command usage\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**Function*************************************************************
|
||||
|
||||
Synopsis []
|
||||
|
|
|
|||
Loading…
Reference in New Issue