mirror of
https://github.com/YosysHQ/abc.git
synced 2026-09-04 00:31:14 +02:00
Version abc60909
This commit is contained in:
+13
-5
@@ -248,18 +248,26 @@ usage:
|
||||
***********************************************************************/
|
||||
void Fpga_SetSimpleLutLib( int nLutSize )
|
||||
{
|
||||
Fpga_LutLib_t s_LutLib10= { "lutlib",10, {0,1,1,1,1,1,1,1,1,1,1}, {0,1,1,1,1,1,1,1,1,1,1} };
|
||||
Fpga_LutLib_t s_LutLib9 = { "lutlib", 9, {0,1,1,1,1,1,1,1,1,1}, {0,1,1,1,1,1,1,1,1,1} };
|
||||
Fpga_LutLib_t s_LutLib8 = { "lutlib", 8, {0,1,1,1,1,1,1,1,1}, {0,1,1,1,1,1,1,1,1} };
|
||||
Fpga_LutLib_t s_LutLib7 = { "lutlib", 7, {0,1,1,1,1,1,1,1}, {0,1,1,1,1,1,1,1} };
|
||||
Fpga_LutLib_t s_LutLib6 = { "lutlib", 6, {0,1,1,1,1,1,1}, {0,1,1,1,1,1,1} };
|
||||
Fpga_LutLib_t s_LutLib5 = { "lutlib", 5, {0,1,1,1,1,1}, {0,1,1,1,1,1} };
|
||||
Fpga_LutLib_t s_LutLib4 = { "lutlib", 4, {0,1,1,1,1}, {0,1,1,1,1} };
|
||||
Fpga_LutLib_t s_LutLib3 = { "lutlib", 3, {0,1,1,1}, {0,1,1,1} };
|
||||
Fpga_LutLib_t * pLutLib;
|
||||
assert( nLutSize >= 3 && nLutSize <= 6 );
|
||||
assert( nLutSize >= 3 && nLutSize <= 10 );
|
||||
switch ( nLutSize )
|
||||
{
|
||||
case 3: pLutLib = &s_LutLib3; break;
|
||||
case 4: pLutLib = &s_LutLib4; break;
|
||||
case 5: pLutLib = &s_LutLib5; break;
|
||||
case 6: pLutLib = &s_LutLib6; break;
|
||||
case 3: pLutLib = &s_LutLib3; break;
|
||||
case 4: pLutLib = &s_LutLib4; break;
|
||||
case 5: pLutLib = &s_LutLib5; break;
|
||||
case 6: pLutLib = &s_LutLib6; break;
|
||||
case 7: pLutLib = &s_LutLib7; break;
|
||||
case 8: pLutLib = &s_LutLib8; break;
|
||||
case 9: pLutLib = &s_LutLib9; break;
|
||||
case 10: pLutLib = &s_LutLib10; break;
|
||||
default: pLutLib = NULL; break;
|
||||
}
|
||||
if ( pLutLib == NULL )
|
||||
|
||||
@@ -24,6 +24,10 @@
|
||||
|
||||
static int Fpga_MappingPostProcess( Fpga_Man_t * p );
|
||||
|
||||
extern int s_MappingTime;
|
||||
extern int s_MappingMem;
|
||||
|
||||
|
||||
////////////////////////////////////////////////////////////////////////
|
||||
/// FUNCTION DEFINITIONS ///
|
||||
////////////////////////////////////////////////////////////////////////
|
||||
@@ -70,6 +74,9 @@ int Fpga_Mapping( Fpga_Man_t * p )
|
||||
p->timeRecover = clock() - clk;
|
||||
//PRT( "Total mapping time", clock() - clkTotal );
|
||||
|
||||
s_MappingTime = clock() - clkTotal;
|
||||
s_MappingMem = Fpga_CutCountAll(p) * (sizeof(Fpga_Cut_t) - sizeof(int) * (FPGA_MAX_LEAVES - p->nVarsMax));
|
||||
|
||||
// print the AI-graph used for mapping
|
||||
//Fpga_ManShow( p, "test" );
|
||||
if ( p->fVerbose )
|
||||
|
||||
@@ -35,9 +35,11 @@ struct Fpga_CutTableStrutct_t
|
||||
};
|
||||
|
||||
// the largest number of cuts considered
|
||||
#define FPGA_CUTS_MAX_COMPUTE 500
|
||||
//#define FPGA_CUTS_MAX_COMPUTE 500
|
||||
#define FPGA_CUTS_MAX_COMPUTE 2000
|
||||
// the largest number of cuts used
|
||||
#define FPGA_CUTS_MAX_USE 200
|
||||
//#define FPGA_CUTS_MAX_USE 200
|
||||
#define FPGA_CUTS_MAX_USE 1000
|
||||
|
||||
// primes used to compute the hash key
|
||||
static int s_HashPrimes[10] = { 109, 499, 557, 619, 631, 709, 797, 881, 907, 991 };
|
||||
@@ -130,7 +132,7 @@ void Fpga_MappingCuts( Fpga_Man_t * p )
|
||||
int nCuts, nNodes, i;
|
||||
|
||||
// set the elementary cuts for the PI variables
|
||||
assert( p->nVarsMax > 1 && p->nVarsMax < 7 );
|
||||
assert( p->nVarsMax > 1 && p->nVarsMax < 11 );
|
||||
Fpga_MappingCreatePiCuts( p );
|
||||
|
||||
// compute the cuts for the internal nodes
|
||||
@@ -347,8 +349,8 @@ void Fpga_CutFilter( Fpga_Man_t * p, Fpga_Node_t * pNode )
|
||||
Fpga_Cut_t * Fpga_CutMergeLists( Fpga_Man_t * p, Fpga_CutTable_t * pTable,
|
||||
Fpga_Cut_t * pList1, Fpga_Cut_t * pList2, int fComp1, int fComp2, int fPivot1, int fPivot2 )
|
||||
{
|
||||
Fpga_Node_t * ppNodes[6];
|
||||
Fpga_Cut_t * pListNew, ** ppListNew, * pLists[7] = { NULL };
|
||||
Fpga_Node_t * ppNodes[FPGA_MAX_LEAVES];
|
||||
Fpga_Cut_t * pListNew, ** ppListNew, * pLists[FPGA_MAX_LEAVES+1] = { NULL };
|
||||
Fpga_Cut_t * pCut, * pPrev, * pTemp1, * pTemp2;
|
||||
int nNodes, Counter, i;
|
||||
Fpga_Cut_t ** ppArray1, ** ppArray2, ** ppArray3;
|
||||
@@ -532,8 +534,8 @@ QUITS :
|
||||
Fpga_Cut_t * Fpga_CutMergeLists2( Fpga_Man_t * p, Fpga_CutTable_t * pTable,
|
||||
Fpga_Cut_t * pList1, Fpga_Cut_t * pList2, int fComp1, int fComp2, int fPivot1, int fPivot2 )
|
||||
{
|
||||
Fpga_Node_t * ppNodes[6];
|
||||
Fpga_Cut_t * pListNew, ** ppListNew, * pLists[7] = { NULL };
|
||||
Fpga_Node_t * ppNodes[FPGA_MAX_LEAVES];
|
||||
Fpga_Cut_t * pListNew, ** ppListNew, * pLists[FPGA_MAX_LEAVES+1] = { NULL };
|
||||
Fpga_Cut_t * pCut, * pPrev, * pTemp1, * pTemp2;
|
||||
int nNodes, Counter, i;
|
||||
|
||||
|
||||
@@ -46,7 +46,7 @@
|
||||
#endif
|
||||
|
||||
// the maximum number of cut leaves (currently does not work for 7)
|
||||
#define FPGA_MAX_LEAVES 6
|
||||
#define FPGA_MAX_LEAVES 10
|
||||
|
||||
// the bit masks
|
||||
#define FPGA_MASK(n) ((~((unsigned)0)) >> (32-(n)))
|
||||
|
||||
Reference in New Issue
Block a user