luke
/
abc
mirror of https://github.com/YosysHQ/abc.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Experiments with word-level data structures.

This commit is contained in:
Alan Mishchenko 2022-01-21 11:09:10 -08:00
parent 48498af818
commit 79f04c6653
11 changed files with 2387 additions and 155 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
abclib.dsp
View File

@ -1127,6 +1127,10 @@ SOURCE=.\src\base\wln\wln.h
# End Source File
# Begin Source File
SOURCE=.\src\base\wln\wlnBlast.c
# End Source File
# Begin Source File
SOURCE=.\src\base\wln\wlnMem.c
# End Source File
# Begin Source File
@ -1143,6 +1147,10 @@ SOURCE=.\src\base\wln\wlnObj.c
# End Source File
# Begin Source File
SOURCE=.\src\base\wln\wlnRead.c
# End Source File
# Begin Source File
SOURCE=.\src\base\wln\wlnRetime.c
# End Source File
# Begin Source File

14
src/aig/gia/giaDup.c
View File

@ -1086,6 +1086,20 @@ Gia_Man_t * Gia_ManDupAppendNew( Gia_Man_t * pOne, Gia_Man_t * pTwo )
Gia_ManSetRegNum( pNew, Gia_ManRegNum(pOne) + Gia_ManRegNum(pTwo) );
return pNew;
}
void Gia_ManDupRebuild( Gia_Man_t * pNew, Gia_Man_t * p, Vec_Int_t * vLits )
{
Gia_Obj_t * pObj; int i;
assert( Vec_IntSize(vLits) == Gia_ManCiNum(p) );
Gia_ManConst0(p)->Value = 0;
Gia_ManForEachCi( p, pObj, i )
pObj->Value = Vec_IntEntry(vLits, i);
Gia_ManForEachAnd( p, pObj, i )
pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
Vec_IntClear( vLits );
Gia_ManForEachCo( p, pObj, i )
Vec_IntPush( vLits, Gia_ObjFanin0Copy(pObj) );
assert( Vec_IntSize(vLits) == Gia_ManCoNum(p) );
}
/**Function*************************************************************

4
src/aig/gia/giaPat2.c
View File

@ -1025,9 +1025,9 @@ Vec_Wec_t * Min_ManComputeCexes( Gia_Man_t * p, Vec_Int_t * vOuts0, int nMaxTrie
if ( fVerbose )
printf( "Used simulation for %d and SAT for %d outputs (out of %d).\n", nSimOuts, nSatOuts, nOuts );
if ( fVerbose )
Abc_PrintTime( 1, "Simulation time ", clkSim );
Abc_PrintTime( 1, "Simulation time ", clkSim );
if ( fVerbose )
Abc_PrintTime( 1, "SAT solving time", clkSat );
Abc_PrintTime( 1, "SAT solving time ", clkSat );
//Vec_WecPrint( vCexes, 0 );
if ( vOuts != vOuts0 )
Vec_IntFreeP( &vOuts );

4
src/aig/miniaig/abcOper.h
View File

@ -226,6 +226,10 @@ static inline const char * Abc_OperName( int Type )
if ( Type == ABC_OPER_ZEROPAD ) return "zPad";
if ( Type == ABC_OPER_SIGNEXT ) return "sExt";
if ( Type == ABC_OPER_BIT_MUX ) return "mux";
if ( Type == ABC_OPER_SEL_NMUX ) return "nmux";
if ( Type == ABC_OPER_SEL_SEL ) return "pmux";
if ( Type == ABC_OPER_CONST ) return "const";
if ( Type == ABC_OPER_TABLE ) return "table";
if ( Type == ABC_OPER_LUT ) return "lut";

1
src/base/main/mainInt.h
View File

@ -145,6 +145,7 @@ struct Abc_Frame_t_
void * pAbc85Delay;
void * pAbcWlc;
Vec_Int_t * pAbcWlcInv;
void * pAbcRtl;
void * pAbcBac;
void * pAbcCba;
void * pAbcPla;

336
src/base/wlc/wlcCom.c
View File

@ -32,7 +32,6 @@ ABC_NAMESPACE_IMPL_START
static int Abc_CommandReadWlc ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandWriteWlc ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandYosys ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandPs ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandCone ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandAbs ( Abc_Frame_t * pAbc, int argc, char ** argv );
@ -55,12 +54,20 @@ static int Abc_CommandInvPut ( Abc_Frame_t * pAbc, int argc, char ** argv )
static int Abc_CommandInvMin ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandTest ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandYosys ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Abc_CommandSolve ( Abc_Frame_t * pAbc, int argc, char ** argv );
static inline Wlc_Ntk_t * Wlc_AbcGetNtk( Abc_Frame_t * pAbc ) { return (Wlc_Ntk_t *)pAbc->pAbcWlc; }
static inline void Wlc_AbcFreeNtk( Abc_Frame_t * pAbc ) { if ( pAbc->pAbcWlc ) Wlc_NtkFree(Wlc_AbcGetNtk(pAbc)); }
static inline void Wlc_AbcUpdateNtk( Abc_Frame_t * pAbc, Wlc_Ntk_t * pNtk ) { Wlc_AbcFreeNtk(pAbc); pAbc->pAbcWlc = pNtk; }
static inline Vec_Int_t * Wlc_AbcGetInv( Abc_Frame_t * pAbc ) { return pAbc->pAbcWlcInv; }
static inline Rtl_Lib_t * Wlc_AbcGetRtl( Abc_Frame_t * pAbc ) { return (Rtl_Lib_t *)pAbc->pAbcRtl; }
static inline void Wlc_AbcFreeRtl( Abc_Frame_t * pAbc ) { if ( pAbc->pAbcRtl ) Rtl_LibFree(Wlc_AbcGetRtl(pAbc)); }
static inline void Wlc_AbcUpdateRtl( Abc_Frame_t * pAbc, Rtl_Lib_t * pLib ) { Wlc_AbcFreeRtl(pAbc); pAbc->pAbcRtl = pLib; }
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
@ -80,7 +87,6 @@ void Wlc_Init( Abc_Frame_t * pAbc )
{
Cmd_CommandAdd( pAbc, "Word level", "%read", Abc_CommandReadWlc, 0 );
Cmd_CommandAdd( pAbc, "Word level", "%write", Abc_CommandWriteWlc, 0 );
Cmd_CommandAdd( pAbc, "Word level", "%yosys", Abc_CommandYosys, 0 );
Cmd_CommandAdd( pAbc, "Word level", "%ps", Abc_CommandPs, 0 );
Cmd_CommandAdd( pAbc, "Word level", "%cone", Abc_CommandCone, 0 );
Cmd_CommandAdd( pAbc, "Word level", "%abs", Abc_CommandAbs, 0 );
@ -97,6 +103,9 @@ void Wlc_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "Word level", "%show", Abc_CommandShow, 0 );
Cmd_CommandAdd( pAbc, "Word level", "%test", Abc_CommandTest, 0 );
Cmd_CommandAdd( pAbc, "Word level", "%yosys", Abc_CommandYosys, 0 );
Cmd_CommandAdd( pAbc, "Word level", "%solve", Abc_CommandSolve, 0 );
Cmd_CommandAdd( pAbc, "Word level", "inv_ps", Abc_CommandInvPs, 0 );
Cmd_CommandAdd( pAbc, "Word level", "inv_print", Abc_CommandInvPrint, 0 );
Cmd_CommandAdd( pAbc, "Word level", "inv_check", Abc_CommandInvCheck, 0 );
@ -297,130 +306,6 @@ usage:
return 1;
}
/**Function********************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
******************************************************************************/
int Abc_CommandYosys( Abc_Frame_t * pAbc, int argc, char ** argv )
{
extern Gia_Man_t * Wln_BlastSystemVerilog( char * pFileName, char * pTopModule, int fSkipStrash, int fInvert, int fTechMap, int fVerbose );
extern Wln_Ntk_t * Wln_ReadSystemVerilog( char * pFileName, char * pTopModule, int fVerbose );
FILE * pFile;
char * pFileName = NULL;
char * pTopModule= NULL;
int fCollapse = 0;
int fBlast = 0;
int fInvert = 0;
int fTechMap = 0;
int fSkipStrash = 0;
int c, fVerbose = 0;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "Tcaismvh" ) ) != EOF )
{
switch ( c )
{
case 'T':
if ( globalUtilOptind >= argc )
{
Abc_Print( -1, "Command line switch \"-T\" should be followed by a file name.\n" );
goto usage;
}
pTopModule = argv[globalUtilOptind];
globalUtilOptind++;
break;
case 'c':
fCollapse ^= 1;
break;
case 'a':
fBlast ^= 1;
break;
case 'i':
fInvert ^= 1;
break;
case 's':
fSkipStrash ^= 1;
break;
case 'm':
fTechMap ^= 1;
break;
case 'v':
fVerbose ^= 1;
break;
case 'h':
goto usage;
default:
goto usage;
}
}
if ( argc != globalUtilOptind + 1 )
{
printf( "Abc_CommandReadWlc(): Input file name should be given on the command line.\n" );
return 0;
}
// get the file name
pFileName = argv[globalUtilOptind];
if ( (pFile = fopen( pFileName, "r" )) == NULL )
{
Abc_Print( 1, "Cannot open input file \"%s\". ", pFileName );
if ( (pFileName = Extra_FileGetSimilarName( pFileName, ".v", ".sv", NULL, NULL, NULL )) )
Abc_Print( 1, "Did you mean \"%s\"?", pFileName );
Abc_Print( 1, "\n" );
return 0;
}
fclose( pFile );
// perform reading
if ( fBlast )
{
Gia_Man_t * pNew = NULL;
if ( !strcmp( Extra_FileNameExtension(pFileName), "v" ) )
pNew = Wln_BlastSystemVerilog( pFileName, pTopModule, fSkipStrash, fInvert, fTechMap, fVerbose );
else if ( !strcmp( Extra_FileNameExtension(pFileName), "sv" ) )
pNew = Wln_BlastSystemVerilog( pFileName, pTopModule, fSkipStrash, fInvert, fTechMap, fVerbose );
else
{
printf( "Abc_CommandYosys(): Unknown file extension.\n" );
return 0;
}
Abc_FrameUpdateGia( pAbc, pNew );
}
else
{
Wln_Ntk_t * pNtk = NULL;
if ( !strcmp( Extra_FileNameExtension(pFileName), "v" ) )
pNtk = Wln_ReadSystemVerilog( pFileName, pTopModule, fVerbose );
else if ( !strcmp( Extra_FileNameExtension(pFileName), "sv" ) )
pNtk = Wln_ReadSystemVerilog( pFileName, pTopModule, fVerbose );
else
{
printf( "Abc_CommandYosys(): Unknown file extension.\n" );
return 0;
}
//Wlc_AbcUpdateNtk( pAbc, pNtk );
}
return 0;
usage:
Abc_Print( -2, "usage: %%yosys [-T <module>] [-caismvh] <file_name>\n" );
Abc_Print( -2, "\t reads Verilog or SystemVerilog using Yosys\n" );
Abc_Print( -2, "\t-T : specify the top module name (default uses \"-auto-top\"\n" );
Abc_Print( -2, "\t-c : toggle collapsing the design using Yosys [default = %s]\n", fCollapse? "yes": "no" );
Abc_Print( -2, "\t-a : toggle bit-blasting the design using Yosys [default = %s]\n", fBlast? "yes": "no" );
Abc_Print( -2, "\t-i : toggle interting the outputs (useful for miters) [default = %s]\n", fInvert? "yes": "no" );
Abc_Print( -2, "\t-s : toggle no structural hashing during bit-blasting [default = %s]\n", fSkipStrash? "no strash": "strash" );
Abc_Print( -2, "\t-m : toggle using \"techmap\" to blast operators [default = %s]\n", fTechMap? "yes": "no" );
Abc_Print( -2, "\t-v : toggle printing verbose information [default = %s]\n", fVerbose? "yes": "no" );
Abc_Print( -2, "\t-h : print the command usage\n");
return 1;
}
/**Function********************************************************************
Synopsis []
@ -2097,6 +1982,205 @@ usage:
return 1;
}
/**Function********************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
******************************************************************************/
int Abc_CommandYosys( Abc_Frame_t * pAbc, int argc, char ** argv )
{
extern Gia_Man_t * Wln_BlastSystemVerilog( char * pFileName, char * pTopModule, int fSkipStrash, int fInvert, int fTechMap, int fVerbose );
extern Rtl_Lib_t * Wln_ReadSystemVerilog( char * pFileName, char * pTopModule, int fCollapse, int fVerbose );
FILE * pFile;
char * pFileName = NULL;
char * pTopModule= NULL;
int fBlast = 0;
int fInvert = 0;
int fTechMap = 1;
int fSkipStrash = 0;
int fCollapse = 0;
int c, fVerbose = 0;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "Tbismcvh" ) ) != EOF )
{
switch ( c )
{
case 'T':
if ( globalUtilOptind >= argc )
{
Abc_Print( -1, "Command line switch \"-T\" should be followed by a file name.\n" );
goto usage;
}
pTopModule = argv[globalUtilOptind];
globalUtilOptind++;
break;
case 'b':
fBlast ^= 1;
break;
case 'i':
fInvert ^= 1;
break;
case 's':
fSkipStrash ^= 1;
break;
case 'm':
fTechMap ^= 1;
break;
case 'c':
fCollapse ^= 1;
break;
case 'v':
fVerbose ^= 1;
break;
case 'h':
goto usage;
default:
goto usage;
}
}
if ( argc != globalUtilOptind + 1 )
{
printf( "Abc_CommandReadWlc(): Input file name should be given on the command line.\n" );
return 0;
}
// get the file name
pFileName = argv[globalUtilOptind];
if ( (pFile = fopen( pFileName, "r" )) == NULL )
{
Abc_Print( 1, "Cannot open input file \"%s\". ", pFileName );
if ( (pFileName = Extra_FileGetSimilarName( pFileName, ".v", ".sv", NULL, NULL, NULL )) )
Abc_Print( 1, "Did you mean \"%s\"?", pFileName );
Abc_Print( 1, "\n" );
return 0;
}
fclose( pFile );
// perform reading
if ( fBlast )
{
Gia_Man_t * pNew = NULL;
if ( !strcmp( Extra_FileNameExtension(pFileName), "v" ) )
pNew = Wln_BlastSystemVerilog( pFileName, pTopModule, fSkipStrash, fInvert, fTechMap, fVerbose );
else if ( !strcmp( Extra_FileNameExtension(pFileName), "sv" ) )
pNew = Wln_BlastSystemVerilog( pFileName, pTopModule, fSkipStrash, fInvert, fTechMap, fVerbose );
else if ( !strcmp( Extra_FileNameExtension(pFileName), "rtlil" ) )
pNew = Wln_BlastSystemVerilog( pFileName, pTopModule, fSkipStrash, fInvert, fTechMap, fVerbose );
else
{
printf( "Abc_CommandYosys(): Unknown file extension.\n" );
return 0;
}
Abc_FrameUpdateGia( pAbc, pNew );
}
else
{
Rtl_Lib_t * pLib = NULL;
if ( !strcmp( Extra_FileNameExtension(pFileName), "v" ) )
pLib = Wln_ReadSystemVerilog( pFileName, pTopModule, fCollapse, fVerbose );
else if ( !strcmp( Extra_FileNameExtension(pFileName), "sv" ) )
pLib = Wln_ReadSystemVerilog( pFileName, pTopModule, fCollapse, fVerbose );
else if ( !strcmp( Extra_FileNameExtension(pFileName), "rtlil" ) )
pLib = Wln_ReadSystemVerilog( pFileName, pTopModule, fCollapse, fVerbose );
else
{
printf( "Abc_CommandYosys(): Unknown file extension.\n" );
return 0;
}
Wlc_AbcUpdateRtl( pAbc, pLib );
}
return 0;
usage:
Abc_Print( -2, "usage: %%yosys [-T <module>] [-bismcvh] <file_name>\n" );
Abc_Print( -2, "\t reads Verilog or SystemVerilog using Yosys\n" );
Abc_Print( -2, "\t-T : specify the top module name (default uses \"-auto-top\"\n" );
Abc_Print( -2, "\t-b : toggle bit-blasting the design into an AIG using Yosys [default = %s]\n", fBlast? "yes": "no" );
Abc_Print( -2, "\t-i : toggle interting the outputs (useful for miters) [default = %s]\n", fInvert? "yes": "no" );
Abc_Print( -2, "\t-s : toggle no structural hashing during bit-blasting [default = %s]\n", fSkipStrash? "no strash": "strash" );
Abc_Print( -2, "\t-m : toggle using \"techmap\" to blast operators [default = %s]\n", fTechMap? "yes": "no" );
Abc_Print( -2, "\t-c : toggle collapsing design hierarchy using Yosys [default = %s]\n", fCollapse? "yes": "no" );
Abc_Print( -2, "\t-v : toggle printing verbose information [default = %s]\n", fVerbose? "yes": "no" );
Abc_Print( -2, "\t-h : print the command usage\n");
return 1;
}
/**Function********************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
******************************************************************************/
int Abc_CommandSolve( Abc_Frame_t * pAbc, int argc, char ** argv )
{
extern void Rtl_LibPrintStats( Rtl_Lib_t * p );
extern void Rtl_LibPrint( char * pFileName, Rtl_Lib_t * p );
extern void Rtl_LibNormRanges( Rtl_Lib_t * pLib );
extern void Rtl_LibOrderWires( Rtl_Lib_t * pLib );
extern void Rtl_LibOrderCells( Rtl_Lib_t * pLib );
extern void Rtl_LibBlast( Rtl_Lib_t * pLib );
extern void Rtl_LibReorderModules( Rtl_Lib_t * pLib );
extern void Rtl_LibSolve( Rtl_Lib_t * pLib );
extern void Rtl_LibPreprocess( Rtl_Lib_t * pLib );
Gia_Man_t * pGia = NULL;
Rtl_Lib_t * pLib = Wlc_AbcGetRtl(pAbc);
int c, fPrepro = 0, fVerbose = 0;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "pvh" ) ) != EOF )
{
switch ( c )
{
case 'p':
fPrepro ^= 1;
break;
case 'v':
fVerbose ^= 1;
break;
case 'h':
goto usage;
default:
goto usage;
}
}
Rtl_LibPrintStats( pLib );
//Rtl_LibPrint( NULL, pLib );
Rtl_LibOrderWires( pLib );
Rtl_LibOrderCells( pLib );
Rtl_LibBlast( pLib );
//Rtl_LibReorderModules( pLib );
//Rtl_LibPrintStats( pLib );
if ( fPrepro )
Rtl_LibPreprocess( pLib );
Rtl_LibSolve( pLib );
//Rtl_LibPrint( NULL, pLib );
Wlc_AbcUpdateRtl( pAbc, NULL );
Gia_ManStopP( &pGia );
return 0;
usage:
Abc_Print( -2, "usage: %%solve [-pvh]\n" );
Abc_Print( -2, "\t experiments with word-level networks\n" );
Abc_Print( -2, "\t-p : toggle preprocessing for verification [default = %s]\n", fPrepro? "yes": "no" );
Abc_Print( -2, "\t-v : toggle printing verbose information [default = %s]\n", fVerbose? "yes": "no" );
Abc_Print( -2, "\t-h : print the command usage\n");
return 1;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

2
src/base/wln/module.make
View File

@ -1,8 +1,10 @@
SRC += src/base/wln/wln.c \
src/base/wln/wlnBlast.c \
src/base/wln/wlnMem.c \
src/base/wln/wlnNdr.c \
src/base/wln/wlnNtk.c \
src/base/wln/wlnObj.c \
src/base/wln/wlnRead.c \
src/base/wln/wlnRetime.c \
src/base/wln/wlnRtl.c \
src/base/wln/wlnWlc.c \

4
src/base/wln/wln.h
View File

@ -251,6 +251,10 @@ extern void Wln_NtkRetimeCreateDelayInfo( Wln_Ntk_t * pNtk );
/*=== wlcWriteVer.c ========================================================*/
extern void Wln_WriteVer( Wln_Ntk_t * p, char * pFileName );
/*=== wlcRead.c ========================================================*/
typedef struct Rtl_Lib_t_ Rtl_Lib_t;
extern Rtl_Lib_t * Rtl_LibReadFile( char * pFileName, char * pFileSpec );
extern void Rtl_LibFree( Rtl_Lib_t * p );
ABC_NAMESPACE_HEADER_END

388
src/base/wln/wlnBlast.c Normal file
View File

@ -0,0 +1,388 @@
/**CFile****************************************************************
FileName [wlnBlast.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Word-level network.]
Synopsis []
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - September 23, 2018.]
Revision [$Id: wlnBlast.c,v 1.00 2018/09/23 00:00:00 alanmi Exp $]
***********************************************************************/
#include "wln.h"
#include "base/wlc/wlc.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Rtl_VecExtend( Vec_Int_t * p, int nRange, int fSigned )
{
Vec_IntFillExtra( p, nRange, fSigned ? Vec_IntEntryLast(p) : 0 );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Rtl_NtkBlastNode( Gia_Man_t * pNew, int Type, int nIns, Vec_Int_t * vDatas, int nRange, int fSign0, int fSign1 )
{
extern void Wlc_BlastMinus( Gia_Man_t * pNew, int * pNum, int nNum, Vec_Int_t * vRes );
extern int Wlc_BlastReduction( Gia_Man_t * pNew, int * pFans, int nFans, int Type );
extern int Wlc_BlastLess( Gia_Man_t * pNew, int * pArg0, int * pArg1, int nBits );
extern int Wlc_BlastLessSigned( Gia_Man_t * pNew, int * pArg0, int * pArg1, int nBits );
extern void Wlc_BlastShiftRight( Gia_Man_t * pNew, int * pNum, int nNum, int * pShift, int nShift, int fSticky, Vec_Int_t * vRes );
extern void Wlc_BlastShiftLeft( Gia_Man_t * pNew, int * pNum, int nNum, int * pShift, int nShift, int fSticky, Vec_Int_t * vRes );
extern int Wlc_BlastAdder( Gia_Man_t * pNew, int * pAdd0, int * pAdd1, int nBits, int Carry ); // result is in pAdd0
extern void Wlc_BlastSubtract( Gia_Man_t * pNew, int * pAdd0, int * pAdd1, int nBits, int Carry ); // result is in pAdd0
extern int Wlc_NtkCountConstBits( int * pArray, int nSize );
extern void Wlc_BlastBooth( Gia_Man_t * pNew, int * pArgA, int * pArgB, int nArgA, int nArgB, Vec_Int_t * vRes, int fSigned, int fCla, Vec_Wec_t ** pvProds );
extern void Wlc_BlastMultiplier3( Gia_Man_t * pNew, int * pArgA, int * pArgB, int nArgA, int nArgB, Vec_Int_t * vRes, int fSigned, int fCla, Vec_Wec_t ** pvProds );
extern void Wlc_BlastZeroCondition( Gia_Man_t * pNew, int * pDiv, int nDiv, Vec_Int_t * vRes );
extern void Wlc_BlastDivider( Gia_Man_t * pNew, int * pNum, int nNum, int * pDiv, int nDiv, int fQuo, Vec_Int_t * vRes );
extern void Wlc_BlastDividerSigned( Gia_Man_t * pNew, int * pNum, int nNum, int * pDiv, int nDiv, int fQuo, Vec_Int_t * vRes );
extern void Wlc_BlastPower( Gia_Man_t * pNew, int * pNum, int nNum, int * pExp, int nExp, Vec_Int_t * vTemp, Vec_Int_t * vRes );
int k, iLit, iLit0, iLit1;
if ( nIns == 1 )
{
Vec_Int_t * vArg = vDatas;
Vec_Int_t * vRes = vDatas+3;
assert( Vec_IntSize(vRes) == 0 );
if ( Type == ABC_OPER_BIT_INV ) // Y = ~A $not
{
assert( Vec_IntSize(vArg) == nRange );
Vec_IntForEachEntry( vArg, iLit, k )
Vec_IntPush( vRes, Abc_LitNot(iLit) );
return;
}
if ( Type == ABC_OPER_BIT_BUF ) // Y = +A $pos
{
assert( Vec_IntSize(vArg) == nRange );
Vec_IntForEachEntry( vArg, iLit, k )
Vec_IntPush( vRes, iLit );
return;
}
if ( Type == ABC_OPER_ARI_MIN ) // Y = -A $neg
{
assert( Vec_IntSize(vArg) == nRange );
Wlc_BlastMinus( pNew, Vec_IntArray(vArg), Vec_IntSize(vArg), vRes );
return;
}
if ( Type == ABC_OPER_RED_AND ) // Y = &A $reduce_and
{
assert( nRange == 1 );
Vec_IntPush( vRes, Wlc_BlastReduction( pNew, Vec_IntArray(vArg), Vec_IntSize(vArg), WLC_OBJ_REDUCT_AND ) );
for ( k = 1; k < nRange; k++ )
Vec_IntPush( vRes, 0 );
return;
}
if ( Type == ABC_OPER_RED_OR ) // Y = |A $reduce_or $reduce_bool
{
assert( nRange == 1 );
Vec_IntPush( vRes, Wlc_BlastReduction( pNew, Vec_IntArray(vArg), Vec_IntSize(vArg), WLC_OBJ_REDUCT_OR ) );
for ( k = 1; k < nRange; k++ )
Vec_IntPush( vRes, 0 );
return;
}
if ( Type == ABC_OPER_RED_XOR ) // Y = ^A $reduce_xor
{
assert( nRange == 1 );
Vec_IntPush( vRes, Wlc_BlastReduction( pNew, Vec_IntArray(vArg), Vec_IntSize(vArg), WLC_OBJ_REDUCT_XOR ) );
for ( k = 1; k < nRange; k++ )
Vec_IntPush( vRes, 0 );
return;
}
if ( Type == ABC_OPER_RED_NXOR ) // Y = ~^A $reduce_xnor
{
assert( nRange == 1 );
Vec_IntPush( vRes, Wlc_BlastReduction( pNew, Vec_IntArray(vArg), Vec_IntSize(vArg), WLC_OBJ_REDUCT_NXOR ) );
for ( k = 1; k < nRange; k++ )
Vec_IntPush( vRes, 0 );
return;
}
if ( Type == ABC_OPER_LOGIC_NOT ) // Y = !A $logic_not
{
int iLit = Wlc_BlastReduction( pNew, Vec_IntArray(vArg), Vec_IntSize(vArg), WLC_OBJ_REDUCT_OR );
assert( nRange == 1 );
Vec_IntFill( vRes, 1, Abc_LitNot(iLit) );
for ( k = 1; k < nRange; k++ )
Vec_IntPush( vRes, 0 );
return;
}
assert( 0 );
return;
}
if ( nIns == 2 )
{
Vec_Int_t * vArg0 = vDatas;
Vec_Int_t * vArg1 = vDatas+1;
Vec_Int_t * vRes = vDatas+3;
int nRangeMax = Abc_MaxInt( nRange, Abc_MaxInt(Vec_IntSize(vArg0), Vec_IntSize(vArg1)) );
int nSizeArg0 = Vec_IntSize(vArg0);
int nSizeArg1 = Vec_IntSize(vArg1);
Rtl_VecExtend( vArg0, nRangeMax, fSign0 );
Rtl_VecExtend( vArg1, nRangeMax, fSign1 );
assert( Vec_IntSize(vArg0) == Vec_IntSize(vArg1) );
assert( Vec_IntSize(vRes) == 0 );
if ( Type == ABC_OPER_LOGIC_AND ) // Y = A && B $logic_and
{
int iLit0 = Wlc_BlastReduction( pNew, Vec_IntArray(vArg0), Vec_IntSize(vArg0), WLC_OBJ_REDUCT_OR );
int iLit1 = Wlc_BlastReduction( pNew, Vec_IntArray(vArg1), Vec_IntSize(vArg1), WLC_OBJ_REDUCT_OR );
assert( 1 == nRange );
Vec_IntFill( vRes, 1, Gia_ManHashAnd(pNew, iLit0, iLit1) );
for ( k = 1; k < nRange; k++ )
Vec_IntPush( vRes, 0 );
return;
}
if ( Type == ABC_OPER_LOGIC_OR ) // Y = A || B $logic_or
{
int iLit0 = Wlc_BlastReduction( pNew, Vec_IntArray(vArg0), Vec_IntSize(vArg0), WLC_OBJ_REDUCT_OR );
int iLit1 = Wlc_BlastReduction( pNew, Vec_IntArray(vArg1), Vec_IntSize(vArg1), WLC_OBJ_REDUCT_OR );
assert( 1 == nRange );
Vec_IntFill( vRes, 1, Gia_ManHashOr(pNew, iLit0, iLit1) );
for ( k = 1; k < nRange; k++ )
Vec_IntPush( vRes, 0 );
return;
}
if ( Type == ABC_OPER_BIT_AND ) // Y = A & B $and
{
Vec_IntForEachEntryTwo( vArg0, vArg1, iLit0, iLit1, k )
Vec_IntPush( vRes, Gia_ManHashAnd(pNew, iLit0, iLit1) );
Vec_IntShrink( vRes, nRange );
return;
}
if ( Type == ABC_OPER_BIT_OR ) // Y = A | B $or
{
Vec_IntForEachEntryTwo( vArg0, vArg1, iLit0, iLit1, k )
Vec_IntPush( vRes, Gia_ManHashOr(pNew, iLit0, iLit1) );
Vec_IntShrink( vRes, nRange );
return;
}
if ( Type == ABC_OPER_BIT_XOR ) // Y = A ^ B $xor
{
Vec_IntForEachEntryTwo( vArg0, vArg1, iLit0, iLit1, k )
Vec_IntPush( vRes, Gia_ManHashXor(pNew, iLit0, iLit1) );
Vec_IntShrink( vRes, nRange );
return;
}
if ( Type == ABC_OPER_BIT_NXOR ) // Y = A ~^ B $xnor
{
assert( Vec_IntSize(vArg0) == nRange );
Vec_IntForEachEntryTwo( vArg0, vArg1, iLit0, iLit1, k )
Vec_IntPush( vRes, Abc_LitNot(Gia_ManHashXor(pNew, iLit0, iLit1)) );
Vec_IntShrink( vRes, nRange );
return;
}
/*
if ( !strcmp(pType, "$lt") ) return ABC_OPER_COMP_LESS; // Y = A < B $lt
if ( !strcmp(pType, "$le") ) return ABC_OPER_COMP_LESSEQU; // Y = A <= B $le
if ( !strcmp(pType, "$ge") ) return ABC_OPER_COMP_MOREEQU; // Y = A >= B $ge
if ( !strcmp(pType, "$gt") ) return ABC_OPER_COMP_MORE; // Y = A > B $gt
if ( !strcmp(pType, "$eq") ) return ABC_OPER_COMP_EQU; // Y = A == B $eq
if ( !strcmp(pType, "$ne") ) return ABC_OPER_COMP_NOTEQU; // Y = A != B $ne
*/
if ( Type == ABC_OPER_COMP_EQU || Type == ABC_OPER_COMP_NOTEQU )
{
iLit = 0;
assert( nRange == 1 );
Vec_IntForEachEntryTwo( vArg0, vArg1, iLit0, iLit1, k )
iLit = Gia_ManHashOr( pNew, iLit, Gia_ManHashXor(pNew, iLit0, iLit1) );
Vec_IntFill( vRes, 1, Abc_LitNotCond(iLit, Type == ABC_OPER_COMP_EQU) );
for ( k = 1; k < nRange; k++ )
Vec_IntPush( vRes, 0 );
return;
}
if ( Type == ABC_OPER_COMP_LESS || Type == ABC_OPER_COMP_LESSEQU ||
Type == ABC_OPER_COMP_MORE || Type == ABC_OPER_COMP_MOREEQU )
{
int fSigned = fSign0 && fSign1;
int fSwap = (Type == ABC_OPER_COMP_MORE || Type == ABC_OPER_COMP_LESSEQU);
int fCompl = (Type == ABC_OPER_COMP_MOREEQU || Type == ABC_OPER_COMP_LESSEQU);
assert( Vec_IntSize(vArg0) == Vec_IntSize(vArg1) );
assert( nRange == 1 );
if ( fSwap )
ABC_SWAP( Vec_Int_t, *vArg0, *vArg1 )
if ( fSigned )
iLit = Wlc_BlastLessSigned( pNew, Vec_IntArray(vArg0), Vec_IntArray(vArg1), Vec_IntSize(vArg0) );
else
iLit = Wlc_BlastLess( pNew, Vec_IntArray(vArg0), Vec_IntArray(vArg1), Vec_IntSize(vArg0) );
iLit = Abc_LitNotCond( iLit, fCompl );
Vec_IntFill( vRes, 1, iLit );
for ( k = 1; k < nRange; k++ )
Vec_IntPush( vRes, 0 );
return;
}
/*
if ( !strcmp(pType, "$shl") ) return ABC_OPER_SHIFT_L; // Y = A << B $shl
if ( !strcmp(pType, "$shr") ) return ABC_OPER_SHIFT_R; // Y = A >> B $shr
if ( !strcmp(pType, "$sshl") ) return ABC_OPER_SHIFT_LA; // Y = A <<< B $sshl
if ( !strcmp(pType, "$sshr") ) return ABC_OPER_SHIFT_RA; // Y = A >>> B $sshr
*/
if ( Type == ABC_OPER_SHIFT_R || Type == ABC_OPER_SHIFT_RA ||
Type == ABC_OPER_SHIFT_L || Type == ABC_OPER_SHIFT_LA )
{
Vec_IntShrink( vArg1, nSizeArg1 );
if ( Type == ABC_OPER_SHIFT_R || Type == ABC_OPER_SHIFT_RA )
Wlc_BlastShiftRight( pNew, Vec_IntArray(vArg0), nRangeMax, Vec_IntArray(vArg1), nSizeArg1, fSign0 && Type == ABC_OPER_SHIFT_RA, vRes );
else
Wlc_BlastShiftLeft( pNew, Vec_IntArray(vArg0), nRangeMax, Vec_IntArray(vArg1), nSizeArg1, 0, vRes );
Vec_IntShrink( vRes, nRange );
return;
}
/*
if ( !strcmp(pType, "$add") ) return ABC_OPER_ARI_ADD; // Y = A + B $add
if ( !strcmp(pType, "$sub") ) return ABC_OPER_ARI_SUB; // Y = A - B $sub
if ( !strcmp(pType, "$mul") ) return ABC_OPER_ARI_MUL; // Y = A * B $mul
if ( !strcmp(pType, "$div") ) return ABC_OPER_ARI_DIV; // Y = A / B $div
if ( !strcmp(pType, "$mod") ) return ABC_OPER_ARI_MOD; // Y = A % B $mod
if ( !strcmp(pType, "$pow") ) return ABC_OPER_ARI_POW; // Y = A ** B $pow
*/
if ( Type == ABC_OPER_ARI_ADD || Type == ABC_OPER_ARI_SUB )
{
//Vec_IntPrint( vArg0 );
//Vec_IntPrint( vArg1 );
Vec_IntAppend( vRes, vArg0 );
if ( Type == ABC_OPER_ARI_ADD )
Wlc_BlastAdder( pNew, Vec_IntArray(vRes), Vec_IntArray(vArg1), nRangeMax, 0 ); // result is in pFan0 (vRes)
else
Wlc_BlastSubtract( pNew, Vec_IntArray(vRes), Vec_IntArray(vArg1), nRangeMax, 1 ); // result is in pFan0 (vRes)
Vec_IntShrink( vRes, nRange );
return;
}
if ( Type == ABC_OPER_ARI_MUL )
{
int fBooth = 1;
int fCla = 0;
int fSigned = fSign0 && fSign1;
Vec_IntShrink( vArg0, nSizeArg0 );
Vec_IntShrink( vArg1, nSizeArg1 );
if ( Wlc_NtkCountConstBits(Vec_IntArray(vArg0), Vec_IntSize(vArg0)) < Wlc_NtkCountConstBits(Vec_IntArray(vArg1), Vec_IntSize(vArg1)) )
ABC_SWAP( Vec_Int_t, *vArg0, *vArg1 )
if ( fBooth )
Wlc_BlastBooth( pNew, Vec_IntArray(vArg0), Vec_IntArray(vArg1), Vec_IntSize(vArg0), Vec_IntSize(vArg1), vRes, fSigned, fCla, NULL );
else
Wlc_BlastMultiplier3( pNew, Vec_IntArray(vArg0), Vec_IntArray(vArg1), Vec_IntSize(vArg0), Vec_IntSize(vArg1), vRes, fSigned, fCla, NULL );
if ( nRange > Vec_IntSize(vRes) )
Vec_IntFillExtra( vRes, nRange, fSigned ? Vec_IntEntryLast(vRes) : 0 );
else
Vec_IntShrink( vRes, nRange );
assert( Vec_IntSize(vRes) == nRange );
return;
}
if ( Type == ABC_OPER_ARI_DIV || Type == ABC_OPER_ARI_MOD )
{
int fDivBy0 = 1; // correct with 1
int fSigned = fSign0 && fSign1;
if ( fSigned )
Wlc_BlastDividerSigned( pNew, Vec_IntArray(vArg0), nRangeMax, Vec_IntArray(vArg1), nRangeMax, Type == ABC_OPER_ARI_DIV, vRes );
else
Wlc_BlastDivider( pNew, Vec_IntArray(vArg0), nRangeMax, Vec_IntArray(vArg1), nRangeMax, Type == ABC_OPER_ARI_DIV, vRes );
Vec_IntShrink( vRes, nRange );
if ( !fDivBy0 )
Wlc_BlastZeroCondition( pNew, Vec_IntArray(vArg1), nRange, vRes );
return;
}
if ( Type == ABC_OPER_ARI_POW )
{
Vec_Int_t * vTemp = vDatas+4;
Vec_IntGrow( vTemp, nRangeMax );
Vec_IntGrow( vRes, nRangeMax );
Vec_IntShrink( vArg1, nSizeArg1 );
Wlc_BlastPower( pNew, Vec_IntArray(vArg0), nRangeMax, Vec_IntArray(vArg1), Vec_IntSize(vArg1), vTemp, vRes );
Vec_IntShrink( vRes, nRange );
return;
}
}
if ( nIns == 3 )
{
if ( Type == ABC_OPER_SEL_NMUX ) // $mux
{
Vec_Int_t * vArg0 = vDatas;
Vec_Int_t * vArg1 = vDatas+1;
Vec_Int_t * vArgS = vDatas+2;
Vec_Int_t * vRes = vDatas+3;
int iCtrl = Vec_IntEntry(vArgS, 0);
//Vec_IntPrint( vArg0 );
//Vec_IntPrint( vArg1 );
//Vec_IntPrint( vArgS );
assert( Vec_IntSize(vArg0) == Vec_IntSize(vArg1) );
assert( Vec_IntSize(vArg0) == nRange );
assert( Vec_IntSize(vArgS) == 1 );
assert( Vec_IntSize(vRes) == 0 );
Vec_IntForEachEntryTwo( vArg0, vArg1, iLit0, iLit1, k )
Vec_IntPush( vRes, Gia_ManHashMux(pNew, iCtrl, iLit1, iLit0) );
return;
}
if ( Type == ABC_OPER_SEL_SEL ) // $pmux
{
int i, k, iLit;
Vec_Int_t * vArgA = vDatas;
Vec_Int_t * vArgB = vDatas+1;
Vec_Int_t * vArgS = vDatas+2;
Vec_Int_t * vRes = vDatas+3;
Vec_Int_t * vTemp = vDatas+4;
assert( Vec_IntSize(vArgA) == nRange ); // widthA = widthY
assert( Vec_IntSize(vArgB) == Vec_IntSize(vArgA)*Vec_IntSize(vArgS) ); // widthB == widthA*widthS
assert( Vec_IntSize(vRes) == 0 );
for ( i = 0; i < nRange; i++ )
{
int iCond = 1;
Vec_IntClear( vTemp );
Vec_IntForEachEntry( vArgS, iLit, k ) // iLit = S[i]
{
//Vec_IntPush( vTemp, Abc_LitNot( Gia_ManHashAnd(pNew, iLit, Vec_IntEntry(vArgB, nRange*(Vec_IntSize(vArgS)-1-k)+i)) ) ); // B[widthA*k+i]
Vec_IntPush( vTemp, Abc_LitNot( Gia_ManHashAnd(pNew, iLit, Vec_IntEntry(vArgB, nRange*k+i)) ) ); // B[widthA*k+i]
iCond = Gia_ManHashAnd( pNew, iCond, Abc_LitNot(iLit) );
}
Vec_IntPush( vTemp, Abc_LitNot( Gia_ManHashAnd(pNew, iCond, Vec_IntEntry(vArgA, i)) ) );
Vec_IntPush( vRes, Abc_LitNot( Gia_ManHashAndMulti(pNew, vTemp) ) );
}
return;
}
}
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END

1733
src/base/wln/wlnRead.c Normal file
View File

File diff suppressed because it is too large Load Diff

48
src/base/wln/wlnRtl.c
View File

@ -37,21 +37,6 @@ ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Wln_Ntk_t * Wln_ReadRtl( char * pFileName )
{
return NULL;
}
/**Function*************************************************************
@ -96,28 +81,31 @@ int Wln_ConvertToRtl( char * pCommand, char * pFileTemp )
fclose( pFile );
return 1;
}
Wln_Ntk_t * Wln_ReadSystemVerilog( char * pFileName, char * pTopModule, int fVerbose )
Rtl_Lib_t * Wln_ReadSystemVerilog( char * pFileName, char * pTopModule, int fCollapse, int fVerbose )
{
Wln_Ntk_t * pNtk = NULL;
Rtl_Lib_t * pNtk = NULL;
char Command[1000];
char * pFileTemp = "_temp_.rtlil";
int fSVlog = strstr(pFileName, ".sv") != NULL;
sprintf( Command, "%s -qp \"read_verilog %s%s; hierarchy %s%s; flatten; proc; write_rtlil %s\"",
if ( strstr(pFileName, ".rtl") )
return Rtl_LibReadFile( pFileName, pFileName );
sprintf( Command, "%s -qp \"read_verilog %s%s; hierarchy %s%s; %sproc; write_rtlil %s\"",
Wln_GetYosysName(), fSVlog ? "-sv ":"", pFileName,
pTopModule ? "-top " : "-auto-top", pTopModule ? pTopModule : "", pFileTemp );
pTopModule ? "-top " : "-auto-top",
pTopModule ? pTopModule : "",
fCollapse ? "flatten; " : "",
pFileTemp );
if ( fVerbose )
printf( "%s\n", Command );
if ( !Wln_ConvertToRtl(Command, pFileTemp) )
{
return NULL;
}
pNtk = Wln_ReadRtl( pFileTemp );
pNtk = Rtl_LibReadFile( pFileTemp, pFileName );
if ( pNtk == NULL )
{
printf( "Dumped the design into file \"%s\".\n", pFileTemp );
return NULL;
}
unlink( pFileTemp );
//unlink( pFileTemp );
return pNtk;
}
Gia_Man_t * Wln_BlastSystemVerilog( char * pFileName, char * pTopModule, int fSkipStrash, int fInvert, int fTechMap, int fVerbose )
@ -125,10 +113,16 @@ Gia_Man_t * Wln_BlastSystemVerilog( char * pFileName, char * pTopModule, int fSk
Gia_Man_t * pGia = NULL;
char Command[1000];
char * pFileTemp = "_temp_.aig";
int fSVlog = strstr(pFileName, ".sv") != NULL;
sprintf( Command, "%s -qp \"read_verilog %s%s; hierarchy %s%s; flatten; proc; %saigmap; write_aiger %s\"",
Wln_GetYosysName(), fSVlog ? "-sv ":"", pFileName,
pTopModule ? "-top " : "-auto-top", pTopModule ? pTopModule : "", fTechMap ? "techmap; setundef -zero; " : "", pFileTemp );
int fRtlil = strstr(pFileName, ".rtl") != NULL;
int fSVlog = strstr(pFileName, ".sv") != NULL;
sprintf( Command, "%s -qp \"%s%s%s; hierarchy %s%s; flatten; proc; %saigmap; write_aiger %s\"",
Wln_GetYosysName(),
fRtlil ? "read_rtlil" : "read_verilog",
fSVlog ? " -sv ":" ",
pFileName,
pTopModule ? "-top " : "-auto-top",
pTopModule ? pTopModule : "",
fTechMap ? "techmap; setundef -zero; " : "", pFileTemp );
if ( fVerbose )
printf( "%s\n", Command );
if ( !Wln_ConvertToRtl(Command, pFileTemp) )