mirror of https://github.com/YosysHQ/abc.git
Enabling new X-valued simulation in 'pdr'.
This commit is contained in:
Alan Mishchenko
parent
e91abd6307
commit
6d088bc440
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@ -5263,6 +5263,10 @@ SOURCE=.\src\proof\pdr\pdrTsim.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\proof\pdr\pdrTsim2.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\proof\pdr\pdrUtil.c
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# End Source File
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# End Group
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@ -26008,7 +26008,7 @@ int Abc_CommandPdr( Abc_Frame_t * pAbc, int argc, char ** argv )
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int c;
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Pdr_ManSetDefaultParams( pPars );
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Extra_UtilGetoptReset();
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while ( ( c = Extra_UtilGetopt( argc, argv, "MFCDRTHGSaxrmsipdegoncvwzh" ) ) != EOF )
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while ( ( c = Extra_UtilGetopt( argc, argv, "MFCDRTHGSaxrmusipdegoncvwzh" ) ) != EOF )
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{
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switch ( c )
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{
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@ -26123,6 +26123,9 @@ int Abc_CommandPdr( Abc_Frame_t * pAbc, int argc, char ** argv )
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case 'm':
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pPars->fMonoCnf ^= 1;
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break;
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case 'u':
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pPars->fNewXSim ^= 1;
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break;
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case 's':
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pPars->fShortest ^= 1;
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break;
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@ -26191,7 +26194,7 @@ int Abc_CommandPdr( Abc_Frame_t * pAbc, int argc, char ** argv )
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return 0;
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usage:
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Abc_Print( -2, "usage: pdr [-MFCDRTHGS <num>] [-axrmsipdegoncvwzh]\n" );
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Abc_Print( -2, "usage: pdr [-MFCDRTHGS <num>] [-axrmusipdegoncvwzh]\n" );
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Abc_Print( -2, "\t model checking using property directed reachability (aka IC3)\n" );
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Abc_Print( -2, "\t pioneered by Aaron R. Bradley (http://theory.stanford.edu/~arbrad/)\n" );
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Abc_Print( -2, "\t with improvements by Niklas Een (http://een.se/niklas/)\n" );
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@ -26208,6 +26211,7 @@ usage:
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Abc_Print( -2, "\t-x : toggle storing CEXes when solving all outputs [default = %s]\n", pPars->fStoreCex? "yes": "no" );
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Abc_Print( -2, "\t-r : toggle using more effort in generalization [default = %s]\n", pPars->fTwoRounds? "yes": "no" );
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Abc_Print( -2, "\t-m : toggle using monolythic CNF computation [default = %s]\n", pPars->fMonoCnf? "yes": "no" );
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Abc_Print( -2, "\t-u : toggle updated X-valued simulation [default = %s]\n", pPars->fNewXSim? "yes": "no" );
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Abc_Print( -2, "\t-s : toggle creating only shortest counter-examples [default = %s]\n", pPars->fShortest? "yes": "no" );
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Abc_Print( -2, "\t-i : toggle clause pushing from an intermediate timeframe [default = %s]\n", pPars->fShiftStart? "yes": "no" );
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Abc_Print( -2, "\t-p : toggle reusing proof-obligations in the last timeframe [default = %s]\n", pPars->fReuseProofOblig? "yes": "no" );
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@ -4,4 +4,5 @@ SRC += src/proof/pdr/pdrCnf.c \
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src/proof/pdr/pdrMan.c \
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src/proof/pdr/pdrSat.c \
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src/proof/pdr/pdrTsim.c \
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src/proof/pdr/pdrTsim2.c \
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src/proof/pdr/pdrUtil.c
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@ -52,6 +52,7 @@ struct Pdr_Par_t_
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int nRandomSeed; // value to seed the SAT solver with
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int fTwoRounds; // use two rounds for generalization
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int fMonoCnf; // monolythic CNF
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int fNewXSim; // updated X-valued simulation
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int fDumpInv; // dump inductive invariant
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int fUseSupp; // use support in the invariant
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int fShortest; // forces bug traces to be shortest
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@ -63,6 +63,7 @@ void Pdr_ManSetDefaultParams( Pdr_Par_t * pPars )
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pPars->fSkipDown = 1; // apply down in generalization
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pPars->fCtgs = 0; // handle CTGs in down
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pPars->fMonoCnf = 0; // monolythic CNF
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pPars->fNewXSim = 0; // updated X-valued simulation
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pPars->fDumpInv = 0; // dump inductive invariant
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pPars->fUseSupp = 1; // using support variables in the invariant
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pPars->fShortest = 0; // forces bug traces to be shortest
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@ -42,6 +42,8 @@ ABC_NAMESPACE_HEADER_START
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/// BASIC TYPES ///
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////////////////////////////////////////////////////////////////////////
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typedef struct Txs_Man_t_ Txs_Man_t;
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typedef struct Pdr_Set_t_ Pdr_Set_t;
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struct Pdr_Set_t_
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{
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@ -87,6 +89,8 @@ struct Pdr_Man_t_
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int * pOrder; // ordering of the lits
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Vec_Int_t * vActVars; // the counter of activation variables
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int iUseFrame; // the first used frame
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// terminary simulation
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Txs_Man_t * pTxs;
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// internal use
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Vec_Int_t * vPrio; // priority flops
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Vec_Int_t * vLits; // array of literals
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@ -189,6 +193,10 @@ extern int Pdr_ManCheckCubeCs( Pdr_Man_t * p, int k, Pdr_Set_t * pCu
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extern int Pdr_ManCheckCube( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** ppPred, int nConfLimit, int fTryConf );
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/*=== pdrTsim.c ==========================================================*/
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extern Pdr_Set_t * Pdr_ManTernarySim( Pdr_Man_t * p, int k, Pdr_Set_t * pCube );
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/*=== pdrTsim2.c ==========================================================*/
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extern Txs_Man_t * Txs_ManStart( Pdr_Man_t * pMan, Aig_Man_t * pAig, Vec_Int_t * vPrio );
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extern void Txs_ManStop( Txs_Man_t * );
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extern Pdr_Set_t * Txs_ManTernarySim( Txs_Man_t * p, int k, Pdr_Set_t * pCube );
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/*=== pdrUtil.c ==========================================================*/
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extern Pdr_Set_t * Pdr_SetAlloc( int nSize );
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extern Pdr_Set_t * Pdr_SetCreate( Vec_Int_t * vLits, Vec_Int_t * vPiLits );
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@ -70,6 +70,8 @@ Pdr_Man_t * Pdr_ManStart( Aig_Man_t * pAig, Pdr_Par_t * pPars, Vec_Int_t * vPrio
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p->vSuppLits= Vec_IntAlloc( 100 ); // support literals
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p->pCubeJust= Pdr_SetAlloc( Saig_ManRegNum(pAig) );
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p->pCnfMan = Cnf_ManStart();
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// ternary simulation
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p->pTxs = Txs_ManStart( p, pAig, p->vPrio );
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// additional AIG data-members
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if ( pAig->pFanData == NULL )
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Aig_ManFanoutStart( pAig );
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@ -150,6 +152,8 @@ void Pdr_ManStop( Pdr_Man_t * p )
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Vec_WecFreeP( &p->vVLits );
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// CNF manager
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Cnf_ManStop( p->pCnfMan );
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// terminary simulation
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Txs_ManStop( p->pTxs );
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// internal use
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Vec_IntFreeP( &p->vPrio ); // priority flops
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Vec_IntFree( p->vLits ); // array of literals
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@ -377,7 +377,14 @@ int Pdr_ManCheckCube( Pdr_Man_t * p, int k, Pdr_Set_t * pCube, Pdr_Set_t ** ppPr
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p->tSatSat += clk;
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p->nCallsS++;
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if ( ppPred )
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*ppPred = Pdr_ManTernarySim( p, k, pCube );
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{
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abctime clk = Abc_Clock();
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if ( p->pPars->fNewXSim )
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*ppPred = Txs_ManTernarySim( p->pTxs, k, pCube );
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else
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*ppPred = Pdr_ManTernarySim( p, k, pCube );
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p->tTsim += Abc_Clock() - clk;
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}
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RetValue = 0;
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}
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@ -364,7 +364,7 @@ Pdr_Set_t * Pdr_ManTernarySim( Pdr_Man_t * p, int k, Pdr_Set_t * pCube )
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Vec_Int_t * vRes = p->vRes; // final result (flop literals)
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Aig_Obj_t * pObj;
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int i, Entry, RetValue;
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abctime clk = Abc_Clock();
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//abctime clk = Abc_Clock();
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// collect CO objects
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Vec_IntClear( vCoObjs );
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@ -474,7 +474,7 @@ Pdr_ManPrintCex( p->pAig, vCiObjs, vCiVals, vCi2Rem );
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// derive the set of resulting registers
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Pdr_ManDeriveResult( p->pAig, vCiObjs, vCiVals, vCi2Rem, vRes, vPiLits );
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assert( Vec_IntSize(vRes) > 0 );
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p->tTsim += Abc_Clock() - clk;
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//p->tTsim += Abc_Clock() - clk;
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pRes = Pdr_SetCreate( vRes, vPiLits );
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//ZH: Disabled assertion because this invariant doesn't hold with down
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//because of the join operation which can bring in initial states
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@ -0,0 +1,389 @@
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/**CFile****************************************************************
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FileName [pdrTsim.c]
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SystemName [ABC: Logic synthesis and verification system.]
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PackageName [Property driven reachability.]
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Synopsis [Improved ternary simulation.]
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Author [Alan Mishchenko]
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Affiliation [UC Berkeley]
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Date [Ver. 1.0. Started - November 20, 2010.]
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Revision [$Id: pdrTsim.c,v 1.00 2010/11/20 00:00:00 alanmi Exp $]
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***********************************************************************/
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#include "pdrInt.h"
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#include "aig/gia/giaAig.h"
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ABC_NAMESPACE_IMPL_START
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////////////////////////////////////////////////////////////////////////
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/// DECLARATIONS ///
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////////////////////////////////////////////////////////////////////////
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struct Txs_Man_t_
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{
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Gia_Man_t * pGia; // user's AIG
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Vec_Int_t * vPrio; // priority of each flop
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Vec_Int_t * vCiObjs; // cone leaves (CI obj IDs)
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Vec_Int_t * vCoObjs; // cone roots (CO obj IDs)
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Vec_Int_t * vCiVals; // cone leaf values (0/1 CI values)
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Vec_Int_t * vCoVals; // cone root values (0/1 CO values)
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Vec_Int_t * vNodes; // cone nodes (node obj IDs)
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Vec_Int_t * vPiLits; // resulting array of PI literals
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Vec_Int_t * vFfLits; // resulting array of flop literals
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Pdr_Man_t * pMan; // calling manager
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};
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////////////////////////////////////////////////////////////////////////
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/// FUNCTION DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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/**Function*************************************************************
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Synopsis [Start and stop the ternary simulation engine.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Txs_Man_t * Txs_ManStart( Pdr_Man_t * pMan, Aig_Man_t * pAig, Vec_Int_t * vPrio )
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{
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Txs_Man_t * p;
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// Aig_Obj_t * pObj;
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// int i;
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assert( Vec_IntSize(vPrio) == Aig_ManRegNum(pAig) );
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p = ABC_CALLOC( Txs_Man_t, 1 );
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p->pGia = Gia_ManFromAigSimple(pAig); // user's AIG
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// Aig_ManForEachObj( pAig, pObj, i )
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// assert( i == 0 || pObj->iData == Abc_Var2Lit(i, 0) );
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p->vPrio = vPrio; // priority of each flop
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p->vCiObjs = Vec_IntAlloc( 100 ); // cone leaves (CI obj IDs)
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p->vCoObjs = Vec_IntAlloc( 100 ); // cone roots (CO obj IDs)
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p->vCiVals = Vec_IntAlloc( 100 ); // cone leaf values (0/1 CI values)
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p->vCoVals = Vec_IntAlloc( 100 ); // cone root values (0/1 CO values)
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p->vNodes = Vec_IntAlloc( 100 ); // cone nodes (node obj IDs)
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p->vPiLits = Vec_IntAlloc( 100 ); // resulting array of PI literals
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p->vFfLits = Vec_IntAlloc( 100 ); // resulting array of flop literals
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p->pMan = pMan; // calling manager
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return p;
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}
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void Txs_ManStop( Txs_Man_t * p )
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{
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Gia_ManStop( p->pGia );
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Vec_IntFree( p->vCiObjs );
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Vec_IntFree( p->vCoObjs );
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Vec_IntFree( p->vCiVals );
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Vec_IntFree( p->vCoVals );
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Vec_IntFree( p->vNodes );
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Vec_IntFree( p->vPiLits );
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Vec_IntFree( p->vFfLits );
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ABC_FREE( p );
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}
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/**Function*************************************************************
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Synopsis [Marks the TFI cone and collects CIs and nodes.]
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Description [For this procedure to work Value should not be ~0
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at the beginning.]
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Txs_ManCollectCone_rec( Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Int_t * vCiObjs, Vec_Int_t * vNodes )
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{
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if ( !~pObj->Value )
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return;
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pObj->Value = ~0;
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if ( Gia_ObjIsCi(pObj) )
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{
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Vec_IntPush( vCiObjs, Gia_ObjId(p, pObj) );
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return;
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}
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assert( Gia_ObjIsAnd(pObj) );
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Txs_ManCollectCone_rec( p, Gia_ObjFanin0(pObj), vCiObjs, vNodes );
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Txs_ManCollectCone_rec( p, Gia_ObjFanin1(pObj), vCiObjs, vNodes );
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Vec_IntPush( vNodes, Gia_ObjId(p, pObj) );
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}
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void Txs_ManCollectCone( Gia_Man_t * p, Vec_Int_t * vCoObjs, Vec_Int_t * vCiObjs, Vec_Int_t * vNodes )
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{
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Gia_Obj_t * pObj; int i;
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// printf( "Collecting cones for clause with %d literals.\n", Vec_IntSize(vCoObjs) );
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Vec_IntClear( vCiObjs );
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Vec_IntClear( vNodes );
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Gia_ManConst0(p)->Value = ~0;
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Gia_ManForEachObjVec( vCoObjs, p, pObj, i )
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Txs_ManCollectCone_rec( p, Gia_ObjFanin0(pObj), vCiObjs, vNodes );
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}
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/**Function*************************************************************
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Synopsis [Propagate values and assign priority.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Txs_ManForwardPass( Gia_Man_t * p,
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Vec_Int_t * vPrio, Vec_Int_t * vCiObjs, Vec_Int_t * vCiVals,
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Vec_Int_t * vNodes, Vec_Int_t * vCoObjs, Vec_Int_t * vCoVals )
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{
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Gia_Obj_t * pObj, * pFan0, * pFan1; int i;
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pObj = Gia_ManConst0(p);
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pObj->fMark0 = 0;
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pObj->fMark1 = 0;
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Gia_ManForEachObjVec( vCiObjs, p, pObj, i )
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{
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pObj->fMark0 = Vec_IntEntry(vCiVals, i);
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pObj->fMark1 = 0;
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pObj->Value = Gia_ObjIsPi(p, pObj) ? 0x7FFFFFFF : Vec_IntEntry(vPrio, Gia_ObjCioId(pObj)-Gia_ManPiNum(p));
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assert( ~pObj->Value );
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}
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Gia_ManForEachObjVec( vNodes, p, pObj, i )
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{
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pFan0 = Gia_ObjFanin0(pObj);
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pFan1 = Gia_ObjFanin1(pObj);
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pObj->fMark0 = (pFan0->fMark0 ^ Gia_ObjFaninC0(pObj)) & (pFan1->fMark0 ^ Gia_ObjFaninC1(pObj));
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pObj->fMark1 = 0;
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if ( pObj->fMark0 )
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pObj->Value = Abc_MinInt( pFan0->Value, pFan1->Value );
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else if ( pFan0->fMark0 )
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pObj->Value = pFan1->Value;
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else if ( pFan1->fMark0 )
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pObj->Value = pFan0->Value;
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else // if ( pFan0->fMark0 == 0 && pFan1->fMark0 == 0 )
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pObj->Value = Abc_MaxInt( pFan0->Value, pFan1->Value );
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assert( ~pObj->Value );
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}
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Gia_ManForEachObjVec( vCoObjs, p, pObj, i )
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{
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pFan0 = Gia_ObjFanin0(pObj);
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pObj->fMark0 = (pFan0->fMark0 ^ Gia_ObjFaninC0(pObj));
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pFan0->fMark1 = 1;
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assert( (int)pObj->fMark0 == Vec_IntEntry(vCoVals, i) );
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}
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}
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/**Function*************************************************************
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Synopsis [Propagate requirements and collect results.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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static inline int Txs_ObjIsJust( Gia_Man_t * p, Gia_Obj_t * pObj )
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{
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Gia_Obj_t * pFan0 = Gia_ObjFanin0(pObj);
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Gia_Obj_t * pFan1 = Gia_ObjFanin1(pObj);
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int value0 = pFan0->fMark0 ^ Gia_ObjFaninC0(pObj);
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int value1 = pFan1->fMark0 ^ Gia_ObjFaninC1(pObj);
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assert( Gia_ObjIsAnd(pObj) );
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if ( pObj->fMark0 )
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return pFan0->fMark1 && pFan1->fMark1;
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assert( !pObj->fMark0 );
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assert( !value0 || !value1 );
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if ( value0 )
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return pFan1->fMark1;
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if ( value1 )
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return pFan0->fMark1;
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assert( !value0 && !value1 );
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return pFan0->fMark1 || pFan1->fMark1 || Gia_ObjIsPi(p, pFan0) || Gia_ObjIsPi(p, pFan1);
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}
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void Txs_ManBackwardPass( Gia_Man_t * p, Vec_Int_t * vCiObjs, Vec_Int_t * vNodes, Vec_Int_t * vPiLits, Vec_Int_t * vFfLits )
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{
|
||||
Gia_Obj_t * pObj, * pFan0, * pFan1; int i, value0, value1;
|
||||
Gia_ManForEachObjVecReverse( vNodes, p, pObj, i )
|
||||
{
|
||||
if ( !pObj->fMark1 )
|
||||
continue;
|
||||
pFan0 = Gia_ObjFanin0(pObj);
|
||||
pFan1 = Gia_ObjFanin1(pObj);
|
||||
if ( pObj->fMark0 )
|
||||
{
|
||||
pFan0->fMark1 = 1;
|
||||
pFan1->fMark1 = 1;
|
||||
continue;
|
||||
}
|
||||
value0 = pFan0->fMark0 ^ Gia_ObjFaninC0(pObj);
|
||||
value1 = pFan1->fMark0 ^ Gia_ObjFaninC1(pObj);
|
||||
assert( !value0 || !value1 );
|
||||
if ( value0 )
|
||||
pFan1->fMark1 = 1;
|
||||
else if ( value1 )
|
||||
pFan0->fMark1 = 1;
|
||||
else // if ( !value0 && !value1 )
|
||||
{
|
||||
if ( pFan0->fMark1 || pFan1->fMark1 )
|
||||
continue;
|
||||
if ( Gia_ObjIsPi(p, pFan0) )
|
||||
pFan0->fMark1 = 1;
|
||||
else if ( Gia_ObjIsPi(p, pFan1) )
|
||||
pFan1->fMark1 = 1;
|
||||
else if ( Gia_ObjIsAnd(pFan0) && Txs_ObjIsJust(p, pFan0) )
|
||||
pFan0->fMark1 = 1;
|
||||
else if ( Gia_ObjIsAnd(pFan1) && Txs_ObjIsJust(p, pFan1) )
|
||||
pFan1->fMark1 = 1;
|
||||
else
|
||||
{
|
||||
if ( pFan0->Value >= pFan1->Value )
|
||||
pFan0->fMark1 = 1;
|
||||
else
|
||||
pFan1->fMark1 = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
Vec_IntClear( vPiLits );
|
||||
Vec_IntClear( vFfLits );
|
||||
Gia_ManForEachObjVec( vCiObjs, p, pObj, i )
|
||||
{
|
||||
if ( !pObj->fMark1 )
|
||||
continue;
|
||||
if ( Gia_ObjIsPi(p, pObj) )
|
||||
Vec_IntPush( vPiLits, Abc_Var2Lit(Gia_ObjCioId(pObj), !pObj->fMark0) );
|
||||
else
|
||||
Vec_IntPush( vFfLits, Abc_Var2Lit(Gia_ObjCioId(pObj)-Gia_ManPiNum(p), !pObj->fMark0) );
|
||||
}
|
||||
assert( Vec_IntSize(vFfLits) > 0 );
|
||||
}
|
||||
|
||||
/**Function*************************************************************
|
||||
|
||||
Synopsis [Verify the result.]
|
||||
|
||||
Description []
|
||||
|
||||
SideEffects []
|
||||
|
||||
SeeAlso []
|
||||
|
||||
***********************************************************************/
|
||||
void Txs_ManVerify( Gia_Man_t * p, Vec_Int_t * vCiObjs, Vec_Int_t * vNodes, Vec_Int_t * vPiLits, Vec_Int_t * vFfLits, Vec_Int_t * vCoObjs, Vec_Int_t * vCoVals )
|
||||
{
|
||||
Gia_Obj_t * pObj;
|
||||
int i, iLit;
|
||||
Gia_ObjTerSimSet0( Gia_ManConst0(p) );
|
||||
Gia_ManForEachObjVec( vCiObjs, p, pObj, i )
|
||||
Gia_ObjTerSimSetX( pObj );
|
||||
Vec_IntForEachEntry( vPiLits, iLit, i )
|
||||
{
|
||||
pObj = Gia_ManPi( p, Abc_Lit2Var(iLit) );
|
||||
assert( Gia_ObjTerSimGetX(pObj) );
|
||||
if ( Abc_LitIsCompl(iLit) )
|
||||
Gia_ObjTerSimSet0( pObj );
|
||||
else
|
||||
Gia_ObjTerSimSet1( pObj );
|
||||
}
|
||||
Vec_IntForEachEntry( vFfLits, iLit, i )
|
||||
{
|
||||
pObj = Gia_ManCi( p, Gia_ManPiNum(p) + Abc_Lit2Var(iLit) );
|
||||
assert( Gia_ObjTerSimGetX(pObj) );
|
||||
if ( Abc_LitIsCompl(iLit) )
|
||||
Gia_ObjTerSimSet0( pObj );
|
||||
else
|
||||
Gia_ObjTerSimSet1( pObj );
|
||||
}
|
||||
Gia_ManForEachObjVec( vNodes, p, pObj, i )
|
||||
Gia_ObjTerSimAnd( pObj );
|
||||
Gia_ManForEachObjVec( vCoObjs, p, pObj, i )
|
||||
{
|
||||
Gia_ObjTerSimCo( pObj );
|
||||
if ( Vec_IntEntry(vCoVals, i) )
|
||||
assert( Gia_ObjTerSimGet1(pObj) );
|
||||
else
|
||||
assert( Gia_ObjTerSimGet0(pObj) );
|
||||
}
|
||||
}
|
||||
|
||||
/**Function*************************************************************
|
||||
|
||||
Synopsis [Shrinks values using ternary simulation.]
|
||||
|
||||
Description [The cube contains the set of flop index literals which,
|
||||
when converted into a clause and applied to the combinational outputs,
|
||||
led to a satisfiable SAT run in frame k (values stored in the SAT solver).
|
||||
If the cube is NULL, it is assumed that the first property output was
|
||||
asserted and failed.
|
||||
The resulting array is a set of flop index literals that asserts the COs.
|
||||
Priority contains 0 for i-th entry if the i-th FF is desirable to remove.]
|
||||
|
||||
SideEffects []
|
||||
|
||||
SeeAlso []
|
||||
|
||||
***********************************************************************/
|
||||
Pdr_Set_t * Txs_ManTernarySim( Txs_Man_t * p, int k, Pdr_Set_t * pCube )
|
||||
{
|
||||
Pdr_Set_t * pRes;
|
||||
Gia_Obj_t * pObj;
|
||||
// collect CO objects
|
||||
Vec_IntClear( p->vCoObjs );
|
||||
if ( pCube == NULL ) // the target is the property output
|
||||
{
|
||||
pObj = Gia_ManCo(p->pGia, p->pMan->iOutCur);
|
||||
Vec_IntPush( p->vCoObjs, Gia_ObjId(p->pGia, pObj) );
|
||||
}
|
||||
else // the target is the cube
|
||||
{
|
||||
int i;
|
||||
for ( i = 0; i < pCube->nLits; i++ )
|
||||
{
|
||||
if ( pCube->Lits[i] == -1 )
|
||||
continue;
|
||||
pObj = Gia_ManCo(p->pGia, Gia_ManPoNum(p->pGia) + Abc_Lit2Var(pCube->Lits[i]));
|
||||
Vec_IntPush( p->vCoObjs, Gia_ObjId(p->pGia, pObj) );
|
||||
}
|
||||
}
|
||||
if ( 0 )
|
||||
{
|
||||
Abc_Print( 1, "Trying to justify cube " );
|
||||
if ( pCube )
|
||||
Pdr_SetPrint( stdout, pCube, Gia_ManRegNum(p->pGia), NULL );
|
||||
else
|
||||
Abc_Print( 1, "<prop=fail>" );
|
||||
Abc_Print( 1, " in frame %d.\n", k );
|
||||
}
|
||||
|
||||
// collect CI objects
|
||||
Txs_ManCollectCone( p->pGia, p->vCoObjs, p->vCiObjs, p->vNodes );
|
||||
// collect values
|
||||
Pdr_ManCollectValues( p->pMan, k, p->vCiObjs, p->vCiVals );
|
||||
Pdr_ManCollectValues( p->pMan, k, p->vCoObjs, p->vCoVals );
|
||||
|
||||
// perform two passes
|
||||
Txs_ManForwardPass( p->pGia, p->vPrio, p->vCiObjs, p->vCiVals, p->vNodes, p->vCoObjs, p->vCoVals );
|
||||
Txs_ManBackwardPass( p->pGia, p->vCiObjs, p->vNodes, p->vPiLits, p->vFfLits );
|
||||
Txs_ManVerify( p->pGia, p->vCiObjs, p->vNodes, p->vPiLits, p->vFfLits, p->vCoObjs, p->vCoVals );
|
||||
|
||||
// derive the final set
|
||||
pRes = Pdr_SetCreate( p->vFfLits, p->vPiLits );
|
||||
//ZH: Disabled assertion because this invariant doesn't hold with down
|
||||
//because of the join operation which can bring in initial states
|
||||
//assert( k == 0 || !Pdr_SetIsInit(pRes, -1) );
|
||||
return pRes;
|
||||
}
|
||||
|
||||
////////////////////////////////////////////////////////////////////////
|
||||
/// END OF FILE ///
|
||||
////////////////////////////////////////////////////////////////////////
|
||||
|
||||
|
||||
ABC_NAMESPACE_IMPL_END
|
||||
Loading…
Reference in New Issue