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https://github.com/YosysHQ/abc.git
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Extending Liberty parser to handle multi-output cells.
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@@ -88,7 +88,7 @@ int Abc_NtkAttach( Abc_Ntk_t * pNtk )
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for ( i = 1; i < nGates; i++ )
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puTruthGates[i] = puTruthGates[i-1] + 2;
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for ( i = 0; i < nGates; i++ )
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Mio_DeriveTruthTable( ppGates[i], uTruths, Mio_GateReadInputs(ppGates[i]), 6, puTruthGates[i] );
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Mio_DeriveTruthTable( ppGates[i], uTruths, Mio_GateReadPinNum(ppGates[i]), 6, puTruthGates[i] );
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// assign the gates to pNode->pCopy
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Abc_NtkCleanCopy( pNtk );
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@@ -1049,7 +1049,7 @@ void Abc_NtkPrintGates( Abc_Ntk_t * pNtk, int fUseLibrary )
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Area = Counter * Mio_GateReadArea( ppGates[i] );
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printf( "%-*s Fanin = %2d Instance = %8d Area = %10.2f %6.2f %%\n",
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nGateNameLen, Mio_GateReadName( ppGates[i] ),
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Mio_GateReadInputs( ppGates[i] ),
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Mio_GateReadPinNum( ppGates[i] ),
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Counter, Area, 100.0 * Area / AreaTotal );
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}
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printf( "%-*s Instance = %8d Area = %10.2f %6.2f %%\n",
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@@ -533,12 +533,12 @@ int Io_ReadBlifReorderFormalNames( Vec_Ptr_t * vTokens, Mio_Gate_t * pGate, Mio_
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nSize = Vec_PtrSize(vTokens);
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if ( pTwin == NULL )
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{
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if ( nSize - 3 != Mio_GateReadInputs(pGate) )
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if ( nSize - 3 != Mio_GateReadPinNum(pGate) )
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return 0;
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}
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else
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{
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if ( nSize - 3 != Mio_GateReadInputs(pGate) && nSize - 4 != Mio_GateReadInputs(pGate) )
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if ( nSize - 3 != Mio_GateReadPinNum(pGate) && nSize - 4 != Mio_GateReadPinNum(pGate) )
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return 0;
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}
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// check if the names are in order
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@@ -553,7 +553,7 @@ int Io_ReadBlifReorderFormalNames( Vec_Ptr_t * vTokens, Mio_Gate_t * pGate, Mio_
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}
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if ( pTwin == NULL )
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{
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if ( i == Mio_GateReadInputs(pGate) )
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if ( i == Mio_GateReadPinNum(pGate) )
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return 1;
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// reorder the pins
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for ( pGatePin = Mio_GateReadPins(pGate), i = 0; pGatePin; pGatePin = Mio_PinReadNext(pGatePin), i++ )
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@@ -589,10 +589,10 @@ int Io_ReadBlifReorderFormalNames( Vec_Ptr_t * vTokens, Mio_Gate_t * pGate, Mio_
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}
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else
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{
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if ( i != Mio_GateReadInputs(pGate) ) // expect the correct order of input pins in the network with twin gates
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if ( i != Mio_GateReadPinNum(pGate) ) // expect the correct order of input pins in the network with twin gates
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return 0;
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// check the last two entries
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if ( nSize - 3 == Mio_GateReadInputs(pGate) ) // only one output is available
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if ( nSize - 3 == Mio_GateReadPinNum(pGate) ) // only one output is available
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{
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pNamePin = Mio_GateReadOutName(pGate);
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Length = strlen(pNamePin);
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@@ -614,7 +614,7 @@ int Io_ReadBlifReorderFormalNames( Vec_Ptr_t * vTokens, Mio_Gate_t * pGate, Mio_
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}
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return 0;
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}
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if ( nSize - 4 == Mio_GateReadInputs(pGate) ) // two outputs are available
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if ( nSize - 4 == Mio_GateReadPinNum(pGate) ) // two outputs are available
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{
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pNamePin = Mio_GateReadOutName(pGate);
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Length = strlen(pNamePin);
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@@ -1527,7 +1527,7 @@ int Ver_ParseGate( Ver_Man_t * pMan, Abc_Ntk_t * pNtk, Mio_Gate_t * pGate )
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Ver_Stream_t * p = pMan->pReader;
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Abc_Obj_t * pNetActual, * pNode, * pNode2 = NULL;
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char * pWord, Symbol;
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int Input, i, nFanins = Mio_GateReadInputs(pGate);
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int Input, i, nFanins = Mio_GateReadPinNum(pGate);
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// convert from the blackbox into the network with local functions representated by gates
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if ( 1 != pMan->fMapped )
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