mirror of https://github.com/YosysHQ/abc.git
Extending GIA to represent pintypes and pins.
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e779b8c889
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@ -114,6 +114,8 @@ struct Gia_Man_t_
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int nConstrs; // the number of constraints
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int nTravIds; // the current traversal ID
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int nFront; // frontier size
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int nPinTypes; // the number of pintypes
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int nPins; // the number of pins
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int * pReprsOld; // representatives (for CIs and ANDs)
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Gia_Rpr_t * pReprs; // representatives (for CIs and ANDs)
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int * pNexts; // next nodes in the equivalence classes
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@ -300,6 +302,8 @@ static inline int Gia_ObjIsAndOrConst0( Gia_Obj_t * pObj ) {
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static inline int Gia_ObjIsCi( Gia_Obj_t * pObj ) { return pObj->fTerm && pObj->iDiff0 == GIA_NONE; }
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static inline int Gia_ObjIsCo( Gia_Obj_t * pObj ) { return pObj->fTerm && pObj->iDiff0 != GIA_NONE; }
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static inline int Gia_ObjIsAnd( Gia_Obj_t * pObj ) { return!pObj->fTerm && pObj->iDiff0 != GIA_NONE; }
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static inline int Gia_ObjIsPinType( Gia_Obj_t * pObj ) { return Gia_ObjIsAnd(pObj) && pObj->iDiff0 == pObj->iDiff1; }
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static inline int Gia_ObjIsPin( Gia_Obj_t * pObj ) { return Gia_ObjIsAnd(pObj) && (Gia_ObjIsPinType(pObj - pObj->iDiff0) || Gia_ObjIsPinType(pObj - pObj->iDiff1)); }
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static inline int Gia_ObjIsCand( Gia_Obj_t * pObj ) { return Gia_ObjIsAnd(pObj) || Gia_ObjIsCi(pObj); }
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static inline int Gia_ObjIsConst0( Gia_Obj_t * pObj ) { return pObj->iDiff0 == GIA_NONE && pObj->iDiff1 == GIA_NONE; }
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static inline int Gia_ManObjIsConst0( Gia_Man_t * p, Gia_Obj_t * pObj){ return pObj == p->pObjs; }
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@ -453,6 +457,22 @@ static inline int Gia_ManAppendAnd( Gia_Man_t * p, int iLit0, int iLit1 )
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}
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return Gia_ObjId( p, pObj ) << 1;
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}
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static inline int Gia_ManAppendPinType( Gia_Man_t * p, int iLit )
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{
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Gia_Obj_t * pObj = Gia_ManAppendObj( p );
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assert( iLit >= 0 && Abc_Lit2Var(iLit) < Gia_ManObjNum(p) );
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pObj->iDiff0 = Gia_ObjId(p, pObj) - Abc_Lit2Var(iLit);
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pObj->fCompl0 = Abc_LitIsCompl(iLit);
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pObj->iDiff1 = Gia_ObjId(p, pObj) - Abc_Lit2Var(iLit);
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pObj->fCompl1 = Abc_LitIsCompl(iLit);
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if ( p->pFanData )
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{
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Gia_ObjAddFanout( p, Gia_ObjFanin0(pObj), pObj );
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Gia_ObjAddFanout( p, Gia_ObjFanin1(pObj), pObj );
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}
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p->nPinTypes++;
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return Gia_ObjId( p, pObj ) << 1;
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}
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static inline int Gia_ManAppendCo( Gia_Man_t * p, int iLit0 )
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{
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Gia_Obj_t * pObj;
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@ -761,7 +761,12 @@ Gia_Man_t * Gia_ReadAigerFromMemory( char * pContents, int nFileSize, int fSkipS
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iNode1 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit1 >> 1), uLit1 & 1 );
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assert( Vec_IntSize(vNodes) == i + 1 + nInputs + nLatches );
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if ( fSkipStrash )
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Vec_IntPush( vNodes, Gia_ManAppendAnd(pNew, iNode0, iNode1) );
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{
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if ( iNode0 == 1 && iNode1 == 1 )
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Vec_IntPush( vNodes, Gia_ManAppendPinType(pNew, 1) );
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else
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Vec_IntPush( vNodes, Gia_ManAppendAnd(pNew, iNode0, iNode1) );
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}
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else
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Vec_IntPush( vNodes, Gia_ManHashAnd(pNew, iNode0, iNode1) );
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}
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@ -1448,7 +1453,7 @@ void Gia_WriteAiger( Gia_Man_t * pInit, char * pFileName, int fWriteSymbols, int
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uLit = Abc_Var2Lit( i, 0 );
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uLit0 = Gia_ObjFaninLit0( pObj, i );
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uLit1 = Gia_ObjFaninLit1( pObj, i );
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assert( uLit0 < uLit1 );
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assert( p->nPinTypes || uLit0 < uLit1 );
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Pos = Gia_WriteAigerEncode( pBuffer, Pos, uLit - uLit1 );
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Pos = Gia_WriteAigerEncode( pBuffer, Pos, uLit1 - uLit0 );
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if ( Pos > nBufferSize - 10 )
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@ -540,7 +540,9 @@ Gia_Man_t * Gia_ManDupMarked( Gia_Man_t * p )
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if ( pObj->fMark0 )
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continue;
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pObj->fMark0 = 0;
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if ( Gia_ObjIsAnd(pObj) )
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if ( p->nPinTypes && Gia_ObjIsPinType(pObj) )
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pObj->Value = Gia_ManAppendPinType( pNew, Gia_ObjFanin0Copy(pObj) );
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else if ( Gia_ObjIsAnd(pObj) )
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pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
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else if ( Gia_ObjIsCi(pObj) )
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{
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@ -193,7 +193,7 @@ void Gia_ManHashResize( Gia_Man_t * p )
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Counter++;
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}
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Counter2 = Gia_ManAndNum(p);
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assert( Counter == Counter2 );
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assert( p->nPinTypes || Counter == Counter2 );
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ABC_FREE( pHTableOld );
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// if ( p->fVerbose )
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// printf( "Resizing GIA hash table: %d -> %d.\n", nHTableOld, p->nHTable );
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@ -303,6 +303,7 @@ void Gia_ManPrintStats( Gia_Man_t * p, int fTents, int fSwitch )
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printf( " ff =%7d", Gia_ManRegNum(p) );
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printf( " and =%8d", Gia_ManAndNum(p) );
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printf( " lev =%5d", Gia_ManLevelNum(p) ); Vec_IntFreeP( &p->vLevels );
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if ( p->nPinTypes == 0 )
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printf( " cut = %d(%d)", Gia_ManCrossCut(p, 0), Gia_ManCrossCut(p, 1) );
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// printf( " mem =%5.2f MB", 1.0*(sizeof(Gia_Obj_t)*p->nObjs + sizeof(int)*(Vec_IntSize(p->vCis) + Vec_IntSize(p->vCos)))/(1<<20) );
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printf( " mem =%5.2f MB", 1.0*(sizeof(Gia_Obj_t)*p->nObjsAlloc + sizeof(int)*(Vec_IntCap(p->vCis) + Vec_IntCap(p->vCos)))/(1<<20) );
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@ -9407,7 +9407,14 @@ int Abc_CommandTest( Abc_Frame_t * pAbc, int argc, char ** argv )
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if ( pNtk )
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{
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extern void Abc_NtkTestTim( Abc_Ntk_t * pNtk, int fVerbose );
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Abc_NtkTestTim( pNtk, fVerbose );
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extern void Abc_NtkTestPinGia( Abc_Ntk_t * pNtk, int fWhiteBoxOnly, int fVerbose );
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// Abc_NtkTestTim( pNtk, fVerbose );
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if ( !Abc_NtkIsLogic(pNtk) )
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{
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Abc_Print( -1, "The current ABC netowrk is not a logic network.\n" );
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return 1;
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}
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Abc_NtkTestPinGia( pNtk, 0, 0 );
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}
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return 0;
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@ -142,6 +142,93 @@ int Abc_NtkTestTimNodeStrash( Gia_Man_t * pGia, Abc_Obj_t * pNode )
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}
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/**Function*************************************************************
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Synopsis [Derives GIA manager using special pins to denote box boundaries.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Gia_Man_t * Abc_NtkTestPinDeriveGia( Abc_Ntk_t * pNtk, int fWhiteBoxOnly, int fVerbose )
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{
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Gia_Man_t * pTemp;
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Gia_Man_t * pGia = NULL;
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Vec_Ptr_t * vNodes;
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Abc_Obj_t * pObj, * pFanin;
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int i, k, iPinLit = 0;
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// prepare logic network
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assert( Abc_NtkIsLogic(pNtk) );
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Abc_NtkToAig( pNtk );
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// construct GIA
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Abc_NtkFillTemp( pNtk );
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pGia = Gia_ManStart( Abc_NtkObjNumMax(pNtk) );
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Gia_ManHashAlloc( pGia );
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// create primary inputs
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Abc_NtkForEachCi( pNtk, pObj, i )
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pObj->iTemp = Gia_ManAppendCi(pGia);
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// create internal nodes in a topologic order from white boxes
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vNodes = Abc_NtkDfs( pNtk, 0 );
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Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i )
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{
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// input side
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if ( !fWhiteBoxOnly || Abc_NodeIsWhiteBox(pObj) )
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{
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// create special pintype for this node
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iPinLit = Gia_ManAppendPinType( pGia, 1 );
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// create input pins
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Abc_ObjForEachFanin( pObj, pFanin, k )
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pFanin->iTemp = Gia_ManAppendAnd( pGia, pFanin->iTemp, iPinLit );
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}
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// perform GIA construction
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pObj->iTemp = Abc_NtkTestTimNodeStrash( pGia, pObj );
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// output side
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if ( !fWhiteBoxOnly || Abc_NodeIsWhiteBox(pObj) )
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{
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// create special pintype for this node
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iPinLit = Gia_ManAppendPinType( pGia, 1 );
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// create output pins
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pObj->iTemp = Gia_ManAppendAnd( pGia, pObj->iTemp, iPinLit );
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}
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}
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Vec_PtrFree( vNodes );
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// create primary outputs
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Abc_NtkForEachCo( pNtk, pObj, i )
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pObj->iTemp = Gia_ManAppendCo( pGia, Abc_ObjFanin0(pObj)->iTemp );
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// finalize GIA
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Gia_ManHashStop( pGia );
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Gia_ManSetRegNum( pGia, 0 );
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// clean up GIA
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pGia = Gia_ManCleanup( pTemp = pGia );
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Gia_ManStop( pTemp );
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return pGia;
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Abc_NtkTestPinGia( Abc_Ntk_t * pNtk, int fWhiteBoxOnly, int fVerbose )
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{
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Gia_Man_t * pGia;
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char * pFileName = "testpin.aig";
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pGia = Abc_NtkTestPinDeriveGia( pNtk, fWhiteBoxOnly, fVerbose );
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Gia_WriteAiger( pGia, pFileName, 0, 0 );
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Gia_ManStop( pGia );
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printf( "AIG with pins derived from mapped network \"%s\" was written into file \"%s\".\n",
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Abc_NtkName(pNtk), pFileName );
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}
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/**Function*************************************************************
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