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Adding dumping of genlib library in Verilog.

This commit is contained in:
Alan Mishchenko 2020-05-03 12:09:55 -07:00
parent 3e150dd553
commit 559f8f5b5e
1 changed files with 1 additions and 1 deletions
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2
src/map/mio/exp.h
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@ -123,7 +123,7 @@ static inline void Exp_Print( int nVars, Vec_Int_t * p )
}
static inline void Exp_PrintNodeVerilog( FILE * pFile, int nVars, Vec_Int_t * p, Vec_Ptr_t * vNames, int Node, int fCompl )
{
extern void Exp_PrintLitVerilog( FILE * pFile, int nVars, Vec_Int_t * p, Vec_Ptr_t * vNames, int Lit );
static void Exp_PrintLitVerilog( FILE * pFile, int nVars, Vec_Int_t * p, Vec_Ptr_t * vNames, int Lit );
if ( Vec_IntEntry(p, 2*Node+1) >= 2*nVars )
fprintf( pFile, "(" );
Exp_PrintLitVerilog( pFile, nVars, p, vNames, Vec_IntEntry(p, 2*Node+1) ^ fCompl );