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Version abc90809 

committer: Baruch Sterin <baruchs@gmail.com>
This commit is contained in:
Alan Mishchenko 2015-06-22 23:05:06 -07:00
parent b288bac6b3
commit 4d1bc4a268
9 changed files with 55 additions and 22 deletions
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9
src/aig/cec/cecCorr.c
View File

@ -1007,20 +1007,21 @@ void Cec_ManPrintFlopEquivs( Gia_Man_t * p )
Gia_ManForEachRo( p, pObj, i )
{
if ( Gia_ObjIsConst(p, Gia_ObjId(p, pObj)) )
printf( "Flop \"%s\" is equivalent to constant 0.\n", Vec_PtrEntry(p->vNamesIn, Gia_ObjCioId(pObj)) );
printf( "Original flop %s is proved equivalent to constant.\n", Vec_PtrEntry(p->vNamesIn, Gia_ObjCioId(pObj)) );
else if ( (pRepr = Gia_ObjReprObj(p, Gia_ObjId(p, pObj))) )
{
if ( Gia_ObjIsCi(pRepr) )
printf( "Flop \"%s\" is equivalent to flop \"%s\".\n",
Vec_PtrEntry( p->vNamesIn, Gia_ObjCioId(pObj) ),
printf( "Original flop %s is proved equivalent to flop %s.\n",
Vec_PtrEntry( p->vNamesIn, Gia_ObjCioId(pObj) ),
Vec_PtrEntry( p->vNamesIn, Gia_ObjCioId(pRepr) ) );
else
printf( "Flop \"%s\" is equivalent to internal node %d.\n",
printf( "Original flop %s is proved equivalent to internal node %d.\n",
Vec_PtrEntry( p->vNamesIn, Gia_ObjCioId(pObj) ), Gia_ObjId(p, pRepr) );
}
}
}
/**Function*************************************************************
Synopsis [Top-level procedure for register correspondence.]

8
src/aig/dar/darScript.c
View File

@ -261,7 +261,11 @@ Aig_Man_t * Dar_ManCompress2( Aig_Man_t * pAig, int fBalance, int fUpdateLevel,
}
*/
// rewrite
// Dar_ManRewrite( pAig, pParsRwr );
pParsRwr->fUpdateLevel = 0; // disable level update
Dar_ManRewrite( pAig, pParsRwr );
pParsRwr->fUpdateLevel = fUpdateLevel; // reenable level update if needed
pAig = Aig_ManDupDfs( pTemp = pAig );
Aig_ManStop( pTemp );
if ( fVerbose ) Aig_ManPrintStats( pAig );
@ -601,7 +605,11 @@ Aig_Man_t * Dar_NewCompress2( Aig_Man_t * pAig, int fBalance, int fUpdateLevel,
if ( !fLightSynth )
{
// rewrite
//Dar_ManRewrite( pAig, pParsRwr );
pParsRwr->fUpdateLevel = 0; // disable level update
Dar_ManRewrite( pAig, pParsRwr );
pParsRwr->fUpdateLevel = fUpdateLevel; // reenable level update if needed
pAig = Aig_ManDupDfs( pTemp = pAig );
Aig_ManStop( pTemp );
if ( fVerbose ) Aig_ManPrintStats( pAig );

8
src/base/abci/abc.c
View File

@ -3980,7 +3980,7 @@ int Abc_CommandMfs( Abc_Frame_t * pAbc, int argc, char ** argv )
// set defaults
Abc_NtkMfsParsDefault( pPars );
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "WFDMLCraestpvwh" ) ) != EOF )
while ( ( c = Extra_UtilGetopt( argc, argv, "WFDMLCraestpgvwh" ) ) != EOF )
{
switch ( c )
{
@ -4068,6 +4068,9 @@ int Abc_CommandMfs( Abc_Frame_t * pAbc, int argc, char ** argv )
case 'p':
pPars->fPower ^= 1;
break;
case 'g':
pPars->fGiaSat ^= 1;
break;
case 'v':
pPars->fVerbose ^= 1;
break;
@ -4101,7 +4104,7 @@ int Abc_CommandMfs( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0;
usage:
fprintf( pErr, "usage: mfs [-WFDMLC <num>] [-raestpvh]\n" );
fprintf( pErr, "usage: mfs [-WFDMLC <num>] [-raestpgvh]\n" );
fprintf( pErr, "\t performs don't-care-based optimization of logic networks\n" );
fprintf( pErr, "\t-W <num> : the number of levels in the TFO cone (0 <= num) [default = %d]\n", pPars->nWinTfoLevs );
fprintf( pErr, "\t-F <num> : the max number of fanouts to skip (1 <= num) [default = %d]\n", pPars->nFanoutsMax );
@ -4115,6 +4118,7 @@ usage:
fprintf( pErr, "\t-s : toggle evaluation of edge swapping [default = %s]\n", pPars->fSwapEdge? "yes": "no" );
fprintf( pErr, "\t-t : toggle using artificial one-hotness conditions [default = %s]\n", pPars->fOneHotness? "yes": "no" );
fprintf( pErr, "\t-p : toggle power-aware optimization [default = %s]\n", pPars->fPower? "yes": "no" );
fprintf( pErr, "\t-g : toggle using new SAT solver [default = %s]\n", pPars->fGiaSat? "yes": "no" );
fprintf( pErr, "\t-v : toggle printing optimization summary [default = %s]\n", pPars->fVerbose? "yes": "no" );
fprintf( pErr, "\t-w : toggle printing detailed stats for each node [default = %s]\n", pPars->fVeryVerbose? "yes": "no" );
fprintf( pErr, "\t-h : print the command usage\n");

1
src/opt/mfs/mfs.h
View File

@ -55,6 +55,7 @@ struct Mfs_Par_t_
int fOneHotness; // adds one-hotness conditions
int fDelay; // performs optimization for delay
int fPower; // performs power-aware optimization
int fGiaSat; // use new SAT solver
int fVerbose; // enable basic stats
int fVeryVerbose; // enable detailed stats
};

6
src/opt/mfs/mfsCore.c
View File

@ -266,7 +266,8 @@ clk = clock();
return 1;
}
clk = clock();
// Abc_NtkMfsConstructGia( p );
if ( p->pPars->fGiaSat )
Abc_NtkMfsConstructGia( p );
p->timeGia += clock() - clk;
// solve the SAT problem
if ( p->pPars->fPower )
@ -280,7 +281,8 @@ p->timeGia += clock() - clk;
Abc_NtkMfsResubNode2( p, pNode );
}
p->timeSat += clock() - clk;
// Abc_NtkMfsDeconstructGia( p );
if ( p->pPars->fGiaSat )
Abc_NtkMfsDeconstructGia( p );
return 1;
}

2
src/opt/mfs/mfsDiv.c
View File

@ -255,7 +255,7 @@ Vec_Ptr_t * Abc_MfsComputeDivisors( Mfs_Man_t * p, Abc_Obj_t * pNode, int nLevDi
// skip nodes with large level
if ( (int)pFanout->Level > nLevDivMax )
continue;
// skip nodes whose fanins are not divisors
// skip nodes whose fanins are not divisors -- here we skip more than we need to skip!!! (revise later) August 7, 2009
Abc_ObjForEachFanin( pFanout, pFanin, m )
if ( !Abc_NodeIsTravIdPrevious(pFanin) )
break;

2
src/opt/mfs/mfsInt.h
View File

@ -68,7 +68,7 @@ struct Mfs_Man_t_
int nSatCexes;
// intermediate AIG data
Gia_Man_t * pGia; // replica of the AIG in the new package
Gia_Obj_t ** pSat2Gia; // mapping of PO SAT var into internal GIA nodes
// Gia_Obj_t ** pSat2Gia; // mapping of PO SAT var into internal GIA nodes
Tas_Man_t * pTas; // the SAT solver
Vec_Int_t * vCex; // the counter-example
Vec_Ptr_t * vGiaLits; // literals given as assumptions

4
src/opt/mfs/mfsMan.c
View File

@ -136,10 +136,10 @@ void Mfs_ManPrint( Mfs_Man_t * p )
p->TotalSwitchingBeg - p->TotalSwitchingEnd,
100.0*(p->TotalSwitchingBeg-p->TotalSwitchingEnd)/p->TotalSwitchingBeg );
printf( "\n" );
#if 0
//#if 0
printf( "Nodes = %d. Try = %d. Resub = %d. Div = %d. SAT calls = %d. Timeouts = %d.\n",
Abc_NtkNodeNum(p->pNtk), p->nNodesTried, p->nNodesResub, p->nTotalDivs, p->nSatCalls, p->nTimeOuts );
#endif
//#endif
if ( p->pPars->fSwapEdge )
printf( "Swappable edges = %d. Total edges = %d. Ratio = %5.2f.\n",
p->nNodesResub, Abc_NtkGetTotalFanins(p->pNtk), 1.00 * p->nNodesResub / Abc_NtkGetTotalFanins(p->pNtk) );

37
src/opt/mfs/mfsResub.c
View File

@ -27,7 +27,7 @@
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Updates the network after resubstitution.]
@ -97,27 +97,41 @@ void Abc_NtkMfsPrintResubStats( Mfs_Man_t * p )
***********************************************************************/
int Abc_NtkMfsTryResubOnce( Mfs_Man_t * p, int * pCands, int nCands )
{
int fVeryVerbose = 0;
unsigned * pData;
int RetValue, iVar, i;
// int clk = clock(), RetValue2 = Abc_NtkMfsTryResubOnceGia( p, pCands, nCands );
//p->timeGia += clock() - clk;
int RetValue, RetValue2 = -1, iVar, i, clk = clock();
if ( p->pPars->fGiaSat )
{
RetValue2 = Abc_NtkMfsTryResubOnceGia( p, pCands, nCands );
p->timeGia += clock() - clk;
return RetValue2;
}
p->nSatCalls++;
RetValue = sat_solver_solve( p->pSat, pCands, pCands + nCands, (ABC_INT64_T)p->pPars->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
// assert( RetValue == l_False || RetValue == l_True );
assert( RetValue == l_False || RetValue == l_True );
// if ( RetValue != l_Undef && RetValue2 != -1 )
// {
// assert( (RetValue == l_False) == (RetValue2 == 1) );
// }
if ( RetValue != l_Undef && RetValue2 != -1 )
{
assert( (RetValue == l_False) == (RetValue2 == 1) );
}
if ( RetValue == l_False )
{
if ( fVeryVerbose )
printf( "U " );
return 1;
}
if ( RetValue != l_True )
{
if ( fVeryVerbose )
printf( "T " );
p->nTimeOuts++;
return -1;
}
if ( fVeryVerbose )
printf( "S " );
p->nSatCexes++;
// store the counter-example
Vec_IntForEachEntry( p->vProjVars, iVar, i )
@ -131,6 +145,7 @@ int Abc_NtkMfsTryResubOnce( Mfs_Man_t * p, int * pCands, int nCands )
}
p->nCexes++;
return 0;
}
/**Function*************************************************************
@ -146,7 +161,7 @@ int Abc_NtkMfsTryResubOnce( Mfs_Man_t * p, int * pCands, int nCands )
***********************************************************************/
int Abc_NtkMfsSolveSatResub( Mfs_Man_t * p, Abc_Obj_t * pNode, int iFanin, int fOnlyRemove, int fSkipUpdate )
{
int fVeryVerbose = p->pPars->fVeryVerbose && Vec_PtrSize(p->vDivs) < 80;
int fVeryVerbose = p->pPars->fVeryVerbose && Vec_PtrSize(p->vDivs) < 80;// || pNode->Id == 556;
unsigned * pData;
int pCands[MFS_FANIN_MAX];
int RetValue, iVar, i, nCands, nWords, w, clk;
@ -533,6 +548,7 @@ int Abc_NtkMfsResubNode( Mfs_Man_t * p, Abc_Obj_t * pNode )
}
if ( Abc_ObjFaninNum(pNode) == p->nFaninMax )
return 0;
/*
// try replacing area critical fanins while adding two new fanins
Abc_ObjForEachFanin( pNode, pFanin, i )
if ( !Abc_ObjIsCi(pFanin) && Abc_ObjFanoutNum(pFanin) == 1 )
@ -540,6 +556,7 @@ int Abc_NtkMfsResubNode( Mfs_Man_t * p, Abc_Obj_t * pNode )
if ( Abc_NtkMfsSolveSatResub2( p, pNode, i, -1 ) )
return 1;
}
*/
return 0;
}