mirror of https://github.com/YosysHQ/abc.git
Updating logic extraction.
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@ -772,7 +772,8 @@ int Dam_ManUpdateNode( Dam_Man_t * p, int iObj, int iLit0, int iLit1, int iLitNe
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if ( Num > 0 )
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{
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Vec_FltAddToEntry( p->vCounts, Num, -1 );
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Vec_QueUpdate( p->vQue, Num );
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if ( Vec_QueIsMember(p->vQue, Num) )
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Vec_QueUpdate( p->vQue, Num );
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fPres |= (1 << c);
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}
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}
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@ -826,7 +827,7 @@ void Dam_ManUpdate( Dam_Man_t * p, int iDiv )
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Vec_IntFillExtra( p->vNodStore, Vec_IntSize(p->vNodStore) + nRefs, -1 );
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pPairsNew++;
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}
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printf( "Added %d new pairs\n", pPairsNew );
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// printf( "Added %d new pairs\n", pPairsNew );
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// fill in the divisors
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iNode = -1;
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Vec_IntForEachEntry( vDivs, iDivTemp, i )
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