luke/abc
1
0
Fork 0
mirror of https://github.com/YosysHQ/abc.git synced 2026-09-06 09:07:01 +02:00
Code Issues Packages Projects Releases Wiki Activity

Version abc51127

Browse Source
This commit is contained in:
Alan Mishchenko
2005-11-27 08:01:00 -08:00
parent e3c40ed61e
commit 3a1ca9fa0e
22 changed files with 1022 additions and 783 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/map/fpga/fpgaCore.c
+1 -1
View File
@@ -85,7 +85,7 @@ int Fpga_Mapping( Fpga_Man_t * p )
It iterates the loop, in which the required times are computed and
the mapping is updated. It is conceptually similar to the paper:
V. Manohararajah, S. D. Brown, Z. G. Vranesic, Heuristics for area
minimization in LUT-based FGPA technology mapping. Proc. IWLS '04.]
minimization in LUT-based FPGA technology mapping. Proc. IWLS '04.]
SideEffects []