mirror of https://github.com/YosysHQ/abc.git
Version abc80702
This commit is contained in:
Alan Mishchenko
parent
fa67e3c19e
commit
303baf27cf
11
Makefile
11
Makefile
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@ -6,21 +6,24 @@ CP := cp
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PROG := abc
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MODULES := src/base/abc src/base/abci src/base/cmd \
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MODULES := \
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src/base/abc src/base/abci src/base/cmd \
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src/base/io src/base/main src/base/ver \
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src/bdd/cudd src/bdd/dsd src/bdd/epd src/bdd/mtr \
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src/bdd/parse src/bdd/reo src/bdd/cas \
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src/map/fpga src/map/mapper src/map/mio src/map/super src/map/if \
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src/map/fpga src/map/mapper src/map/mio src/map/super \
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src/map/if \
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src/misc/extra src/misc/mvc src/misc/st src/misc/util \
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src/misc/espresso src/misc/nm src/misc/vec src/misc/hash \
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src/misc/bzlib src/misc/zlib \
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src/opt/cut src/opt/dec src/opt/fxu src/opt/rwr src/opt/mfs \
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src/opt/sim src/opt/ret src/opt/res src/opt/lpk src/opt/fret \
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src/sat/bsat src/sat/csat src/sat/msat src/sat/fraig \
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src/aig/ivy src/aig/hop src/aig/rwt src/aig/deco \
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src/aig/mem src/aig/dar src/aig/fra src/aig/cnf \
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src/aig/csw src/aig/ioa src/aig/aig src/aig/kit \
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src/aig/bdc src/aig/bar src/aig/ntl src/aig/nwk src/aig/mfx \
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src/aig/tim src/aig/saig src/aig/bbr src/misc/bzlib
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src/aig/bdc src/aig/bar src/aig/ntl src/aig/nwk \
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src/aig/mfx src/aig/tim src/aig/saig src/aig/bbr
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default: $(PROG)
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96
abc.dsp
96
abc.dsp
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@ -42,7 +42,7 @@ RSC=rc.exe
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# PROP Ignore_Export_Lib 0
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# PROP Target_Dir ""
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# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /c
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# ADD CPP /nologo /W3 /GX /O2 /I "src/base/abc" /I "src/base/abci" /I "src/base/cmd" /I "src/base/io" /I "src/base/main" /I "src/base/ver" /I "src/bdd/cudd" /I "src/bdd/dsd" /I "src/bdd/epd" /I "src/bdd/mtr" /I "src/bdd/parse" /I "src/bdd/reo" /I "src/bdd/cas" /I "src/map/fpga" /I "src/map/mapper" /I "src/map/mio" /I "src/map/super" /I "src/map/if" /I "src/map/pcm" /I "src/map/ply" /I "src/misc/extra" /I "src/misc/mvc" /I "src/misc/st" /I "src/misc/util" /I "src/misc/espresso" /I "src/misc/nm" /I "src/misc/vec" /I "src/misc/hash" /I "src/misc/bzlib" /I "src/opt/cut" /I "src/opt/dec" /I "src/opt/fxu" /I "src/opt/rwr" /I "src/opt/sim" /I "src/opt/ret" /I "src/opt/res" /I "src/opt/lpk" /I "src/sat/bsat" /I "src/sat/csat" /I "src/sat/msat" /I "src/sat/fraig" /I "src/aig/ivy" /I "src/aig/hop" /I "src/aig/rwt" /I "src/aig/deco" /I "src/aig/mem" /I "src/aig/dar" /I "src/aig/fra" /I "src/aig/cnf" /I "src/aig/csw" /I "src/aig/ioa" /I "src/aig/aig" /I "src/aig/kit" /I "src/aig/bdc" /I "src/aig/bar" /I "src/aig/ntl" /I "src/aig/nwk" /I "src/aig/tim" /I "src/opt/mfs" /I "src/aig/mfx" /I "src/aig/saig" /I "src/aig/bbr" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /D ABC_DLL=DLLEXPORT /FR /YX /FD /c
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# ADD CPP /nologo /W3 /GX /O2 /I "src/base/abc" /I "src/base/abci" /I "src/base/cmd" /I "src/base/io" /I "src/base/main" /I "src/base/ver" /I "src/bdd/cudd" /I "src/bdd/dsd" /I "src/bdd/epd" /I "src/bdd/mtr" /I "src/bdd/parse" /I "src/bdd/reo" /I "src/bdd/cas" /I "src/map/fpga" /I "src/map/mapper" /I "src/map/mio" /I "src/map/super" /I "src/map/if" /I "src/map/pcm" /I "src/map/ply" /I "src/misc/extra" /I "src/misc/mvc" /I "src/misc/st" /I "src/misc/util" /I "src/misc/espresso" /I "src/misc/nm" /I "src/misc/vec" /I "src/misc/hash" /I "src/misc/bzlib" /I "src/misc/zlib" /I "src/opt/cut" /I "src/opt/dec" /I "src/opt/fxu" /I "src/opt/rwr" /I "src/opt/sim" /I "src/opt/ret" /I "src/opt/res" /I "src/opt/lpk" /I "src/sat/bsat" /I "src/sat/csat" /I "src/sat/msat" /I "src/sat/fraig" /I "src/aig/ivy" /I "src/aig/hop" /I "src/aig/rwt" /I "src/aig/deco" /I "src/aig/mem" /I "src/aig/dar" /I "src/aig/fra" /I "src/aig/cnf" /I "src/aig/csw" /I "src/aig/ioa" /I "src/aig/aig" /I "src/aig/kit" /I "src/aig/bdc" /I "src/aig/bar" /I "src/aig/ntl" /I "src/aig/nwk" /I "src/aig/tim" /I "src/opt/mfs" /I "src/aig/mfx" /I "src/aig/saig" /I "src/aig/bbr" /D "WIN32" /D "NDEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /D ABC_DLL=DLLEXPORT /FR /YX /FD /c
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# ADD BASE RSC /l 0x409 /d "NDEBUG"
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# ADD RSC /l 0x409 /d "NDEBUG"
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BSC32=bscmake.exe
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@ -66,7 +66,7 @@ LINK32=link.exe
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# PROP Ignore_Export_Lib 0
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# PROP Target_Dir ""
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# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /YX /FD /GZ /c
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# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I "src/base/abc" /I "src/base/abci" /I "src/base/cmd" /I "src/base/io" /I "src/base/main" /I "src/base/ver" /I "src/bdd/cudd" /I "src/bdd/dsd" /I "src/bdd/epd" /I "src/bdd/mtr" /I "src/bdd/parse" /I "src/bdd/reo" /I "src/bdd/cas" /I "src/map/fpga" /I "src/map/mapper" /I "src/map/mio" /I "src/map/super" /I "src/map/if" /I "src/map/pcm" /I "src/map/ply" /I "src/misc/extra" /I "src/misc/mvc" /I "src/misc/st" /I "src/misc/util" /I "src/misc/espresso" /I "src/misc/nm" /I "src/misc/vec" /I "src/misc/hash" /I "src/misc/bzlib" /I "src/opt/cut" /I "src/opt/dec" /I "src/opt/fxu" /I "src/opt/rwr" /I "src/opt/sim" /I "src/opt/ret" /I "src/opt/res" /I "src/opt/lpk" /I "src/sat/bsat" /I "src/sat/csat" /I "src/sat/msat" /I "src/sat/fraig" /I "src/aig/ivy" /I "src/aig/hop" /I "src/aig/rwt" /I "src/aig/deco" /I "src/aig/mem" /I "src/aig/dar" /I "src/aig/fra" /I "src/aig/cnf" /I "src/aig/csw" /I "src/aig/ioa" /I "src/aig/aig" /I "src/aig/kit" /I "src/aig/bdc" /I "src/aig/bar" /I "src/aig/ntl" /I "src/aig/nwk" /I "src/aig/tim" /I "src/opt/mfs" /I "src/aig/mfx" /I "src/aig/saig" /I "src/aig/bbr" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /D ABC_DLL=DLLEXPORT /FR /YX /FD /GZ /c
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# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I "src/base/abc" /I "src/base/abci" /I "src/base/cmd" /I "src/base/io" /I "src/base/main" /I "src/base/ver" /I "src/bdd/cudd" /I "src/bdd/dsd" /I "src/bdd/epd" /I "src/bdd/mtr" /I "src/bdd/parse" /I "src/bdd/reo" /I "src/bdd/cas" /I "src/map/fpga" /I "src/map/mapper" /I "src/map/mio" /I "src/map/super" /I "src/map/if" /I "src/map/pcm" /I "src/map/ply" /I "src/misc/extra" /I "src/misc/mvc" /I "src/misc/st" /I "src/misc/util" /I "src/misc/espresso" /I "src/misc/nm" /I "src/misc/vec" /I "src/misc/hash" /I "src/misc/bzlib" /I "src/misc/zlib" /I "src/opt/cut" /I "src/opt/dec" /I "src/opt/fxu" /I "src/opt/rwr" /I "src/opt/sim" /I "src/opt/ret" /I "src/opt/res" /I "src/opt/lpk" /I "src/sat/bsat" /I "src/sat/csat" /I "src/sat/msat" /I "src/sat/fraig" /I "src/aig/ivy" /I "src/aig/hop" /I "src/aig/rwt" /I "src/aig/deco" /I "src/aig/mem" /I "src/aig/dar" /I "src/aig/fra" /I "src/aig/cnf" /I "src/aig/csw" /I "src/aig/ioa" /I "src/aig/aig" /I "src/aig/kit" /I "src/aig/bdc" /I "src/aig/bar" /I "src/aig/ntl" /I "src/aig/nwk" /I "src/aig/tim" /I "src/opt/mfs" /I "src/aig/mfx" /I "src/aig/saig" /I "src/aig/bbr" /D "WIN32" /D "_DEBUG" /D "_CONSOLE" /D "_MBCS" /D "__STDC__" /D ABC_DLL=DLLEXPORT /FR /YX /FD /GZ /c
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# SUBTRACT CPP /X
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# ADD BASE RSC /l 0x409 /d "_DEBUG"
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# ADD RSC /l 0x409 /d "_DEBUG"
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@ -2489,6 +2489,98 @@ SOURCE=.\src\misc\bzlib\huffman.c
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SOURCE=.\src\misc\bzlib\randtable.c
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# End Source File
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# End Group
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# Begin Group "zlib"
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# PROP Default_Filter ""
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# Begin Source File
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SOURCE=.\src\misc\zlib\adler32.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\compress_.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\crc32.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\crc32.h
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\deflate.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\deflate.h
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\gzio.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\infback.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\inffast.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\inffast.h
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\inffixed.h
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\inflate.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\inflate.h
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\inftrees.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\inftrees.h
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\trees.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\trees.h
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\uncompr.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\zconf.h
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\zlib.h
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\zutil.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\misc\zlib\zutil.h
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# End Source File
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# End Group
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# End Group
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# Begin Group "ai"
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5
abc.rc
5
abc.rc
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@ -1,7 +1,7 @@
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# global parameters
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set check # checks intermediate networks
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#set check # checks intermediate networks
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#set checkfio # prints warnings when fanins/fanouts are duplicated
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set checkread # checks new networks after reading from file
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#set checkread # checks new networks after reading from file
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set backup # saves backup networks retrived by "undo" and "recall"
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set savesteps 1 # sets the maximum number of backup networks to save
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set progressbar # display the progress bar
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@ -51,6 +51,7 @@ alias psy print_symm
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alias pun print_unate
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alias q quit
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alias r read
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alias ra read_aiger
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alias r3 retime -M 3
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alias r3f retime -M 3 -f
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alias r3b retime -M 3 -b
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@ -327,7 +327,7 @@ static inline Aig_Obj_t * Aig_ObjFanout0( Aig_Man_t * p, Aig_Obj_t * pObj ) {
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static inline Aig_Obj_t * Aig_ObjEquiv( Aig_Man_t * p, Aig_Obj_t * pObj ) { return p->pEquivs? p->pEquivs[pObj->Id] : NULL; }
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static inline Aig_Obj_t * Aig_ObjRepr( Aig_Man_t * p, Aig_Obj_t * pObj ) { return p->pReprs? p->pReprs[pObj->Id] : NULL; }
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static inline Aig_Obj_t * Aig_ObjHaig( Aig_Obj_t * pObj ) { assert( Aig_Regular(pObj)->pHaig ); return Aig_NotCond( Aig_Regular(pObj)->pHaig, Aig_IsComplement(pObj) ); }
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static inline int Aig_ObjPioNum( Aig_Obj_t * pObj ) { assert( !Aig_ObjIsNode(pObj) ); return (int)(long)pObj->pNext; }
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static inline int Aig_ObjPioNum( Aig_Obj_t * pObj ) { assert( !Aig_ObjIsNode(pObj) ); return (int)(PORT_PTRINT_T)pObj->pNext; }
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static inline int Aig_ObjWhatFanin( Aig_Obj_t * pObj, Aig_Obj_t * pFanin )
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{
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if ( Aig_ObjFanin0(pObj) == pFanin ) return 0;
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@ -51,7 +51,7 @@ void Aig_ManInterFast( Aig_Man_t * pManOn, Aig_Man_t * pManOff, int fVerbose )
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Cnf_Dat_t * pCnfOn, * pCnfOff;
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Aig_Obj_t * pObj, * pObj2;
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int Lits[3], status, i;
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int clk = clock();
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// int clk = clock();
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assert( Aig_ManPiNum(pManOn) == Aig_ManPiNum(pManOff) );
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assert( Aig_ManPoNum(pManOn) == Aig_ManPoNum(pManOff) );
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@ -154,7 +154,7 @@ Aig_Man_t * Aig_ManInter( Aig_Man_t * pManOn, Aig_Man_t * pManOff, int fRelation
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Aig_Obj_t * pObj, * pObj2;
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int Lits[3], status, i;
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int clk;
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int iLast;
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int iLast = -1; // Suppress "might be used uninitialized"
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assert( Aig_ManPiNum(pManOn) == Aig_ManPiNum(pManOff) );
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@ -322,7 +322,8 @@ void Aig_ObjPrint( Aig_Man_t * p, Aig_Obj_t * pObj )
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if ( fShowFanouts && p->pFanData )
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{
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Aig_Obj_t * pFanout;
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int i, iFan;
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int i;
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int iFan = -1; // Suppress "might be used uninitialized"
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printf( "\nFanouts:\n" );
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Aig_ObjForEachFanout( p, pObj, pFanout, iFan, i )
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{
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@ -236,7 +236,7 @@ Aig_Obj_t * Aig_Exor( Aig_Man_t * p, Aig_Obj_t * p0, Aig_Obj_t * p1 )
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p1 = Aig_Regular(p1);
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pGhost = Aig_ObjCreateGhost( p, p0, p1, AIG_OBJ_EXOR );
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// check the table
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if ( pResult = Aig_TableLookup( p, pGhost ) )
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if ( (pResult = Aig_TableLookup( p, pGhost )) )
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return Aig_NotCond( pResult, fCompl );
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pResult = Aig_ObjCreate( p, pGhost );
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return Aig_NotCond( pResult, fCompl );
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|
|
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@ -1514,10 +1514,6 @@ void Aig_ManChoiceEval( Aig_Man_t * p )
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{
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if ( !Aig_ObjIsChoice(p, pNode) )
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continue;
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if ( pNode->Id == 4225 )
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{
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int x = 0;
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}
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Counter = 0;
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for ( pTemp = pNode; pTemp; pTemp = Aig_ObjEquiv(p, pTemp) )
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Counter++;
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|
|
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|
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@ -119,7 +119,9 @@ void Aig_ManRegManStop( Aig_ManPre_t * p )
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int Aig_ManRegFindSeed( Aig_ManPre_t * p )
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{
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Vec_Int_t * vRegs;
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int i, k, iReg, iMax, nRegsCur, nRegsMax = -1;
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int i, k, iReg;
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int iMax = -1; // Suppress "might be used uninitialized"
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int nRegsCur, nRegsMax = -1;
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for ( i = 0; i < Aig_ManRegNum(p->pAig); i++ )
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{
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if ( p->pfUsedRegs[i] )
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|
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|
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@ -526,15 +526,16 @@ int Aig_TransferMappedClasses( Aig_Man_t * pAig, Aig_Man_t * pPart, int * pMapBa
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Aig_Obj_t * pObj;
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int nClasses, k;
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nClasses = 0;
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if ( pPart->pReprs )
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Aig_ManForEachObj( pPart, pObj, k )
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{
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if ( pPart->pReprs[pObj->Id] == NULL )
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continue;
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nClasses++;
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Aig_ObjSetRepr( pAig,
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Aig_ManObj(pAig, pMapBack[pObj->Id]),
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Aig_ManObj(pAig, pMapBack[pPart->pReprs[pObj->Id]->Id]) );
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if ( pPart->pReprs ) {
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||||
Aig_ManForEachObj( pPart, pObj, k )
|
||||
{
|
||||
if ( pPart->pReprs[pObj->Id] == NULL )
|
||||
continue;
|
||||
nClasses++;
|
||||
Aig_ObjSetRepr( pAig,
|
||||
Aig_ManObj(pAig, pMapBack[pObj->Id]),
|
||||
Aig_ManObj(pAig, pMapBack[pPart->pReprs[pObj->Id]->Id]) );
|
||||
}
|
||||
}
|
||||
return nClasses;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -329,7 +329,7 @@ void Aig_WriteDotAig( Aig_Man_t * pMan, char * pFileName, int fHaig, Vec_Ptr_t *
|
|||
void Aig_ManShow( Aig_Man_t * pMan, int fHaig, Vec_Ptr_t * vBold )
|
||||
{
|
||||
extern void Abc_ShowFile( char * FileNameDot );
|
||||
static Counter = 0;
|
||||
static int Counter = 0;
|
||||
char FileNameDot[200];
|
||||
FILE * pFile;
|
||||
// create the file name
|
||||
|
|
|
|||
|
|
@ -699,7 +699,7 @@ void Aig_ManDumpBlif( Aig_Man_t * p, char * pFileName, Vec_Ptr_t * vPiNames, Vec
|
|||
fprintf( pFile, ".inputs" );
|
||||
Aig_ManForEachPiSeq( p, pObj, i )
|
||||
if ( vPiNames )
|
||||
fprintf( pFile, " %s", Vec_PtrEntry(vPiNames, i) );
|
||||
fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, i) );
|
||||
else
|
||||
fprintf( pFile, " n%0*d", nDigits, pObj->iData );
|
||||
fprintf( pFile, "\n" );
|
||||
|
|
@ -707,7 +707,7 @@ void Aig_ManDumpBlif( Aig_Man_t * p, char * pFileName, Vec_Ptr_t * vPiNames, Vec
|
|||
fprintf( pFile, ".outputs" );
|
||||
Aig_ManForEachPoSeq( p, pObj, i )
|
||||
if ( vPoNames )
|
||||
fprintf( pFile, " %s", Vec_PtrEntry(vPoNames, i) );
|
||||
fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPoNames, i) );
|
||||
else
|
||||
fprintf( pFile, " n%0*d", nDigits, pObj->iData );
|
||||
fprintf( pFile, "\n" );
|
||||
|
|
@ -719,11 +719,11 @@ void Aig_ManDumpBlif( Aig_Man_t * p, char * pFileName, Vec_Ptr_t * vPiNames, Vec
|
|||
{
|
||||
fprintf( pFile, ".latch" );
|
||||
if ( vPoNames )
|
||||
fprintf( pFile, " %s", Vec_PtrEntry(vPoNames, Aig_ManPoNum(p)-Aig_ManRegNum(p)+i) );
|
||||
fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPoNames, Aig_ManPoNum(p)-Aig_ManRegNum(p)+i) );
|
||||
else
|
||||
fprintf( pFile, " n%0*d", nDigits, pObjLi->iData );
|
||||
if ( vPiNames )
|
||||
fprintf( pFile, " %s", Vec_PtrEntry(vPiNames, Aig_ManPiNum(p)-Aig_ManRegNum(p)+i) );
|
||||
fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ManPiNum(p)-Aig_ManRegNum(p)+i) );
|
||||
else
|
||||
fprintf( pFile, " n%0*d", nDigits, pObjLo->iData );
|
||||
fprintf( pFile, " 0\n" );
|
||||
|
|
@ -738,11 +738,11 @@ void Aig_ManDumpBlif( Aig_Man_t * p, char * pFileName, Vec_Ptr_t * vPiNames, Vec
|
|||
{
|
||||
fprintf( pFile, ".names" );
|
||||
if ( vPiNames && Aig_ObjIsPi(Aig_ObjFanin0(pObj)) )
|
||||
fprintf( pFile, " %s", Vec_PtrEntry(vPiNames, Aig_ObjPioNum(Aig_ObjFanin0(pObj))) );
|
||||
fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ObjPioNum(Aig_ObjFanin0(pObj))) );
|
||||
else
|
||||
fprintf( pFile, " n%0*d", nDigits, Aig_ObjFanin0(pObj)->iData );
|
||||
if ( vPiNames && Aig_ObjIsPi(Aig_ObjFanin1(pObj)) )
|
||||
fprintf( pFile, " %s", Vec_PtrEntry(vPiNames, Aig_ObjPioNum(Aig_ObjFanin1(pObj))) );
|
||||
fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ObjPioNum(Aig_ObjFanin1(pObj))) );
|
||||
else
|
||||
fprintf( pFile, " n%0*d", nDigits, Aig_ObjFanin1(pObj)->iData );
|
||||
fprintf( pFile, " n%0*d\n", nDigits, pObj->iData );
|
||||
|
|
@ -753,11 +753,11 @@ void Aig_ManDumpBlif( Aig_Man_t * p, char * pFileName, Vec_Ptr_t * vPiNames, Vec
|
|||
{
|
||||
fprintf( pFile, ".names" );
|
||||
if ( vPiNames && Aig_ObjIsPi(Aig_ObjFanin0(pObj)) )
|
||||
fprintf( pFile, " %s", Vec_PtrEntry(vPiNames, Aig_ObjPioNum(Aig_ObjFanin0(pObj))) );
|
||||
fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Aig_ObjPioNum(Aig_ObjFanin0(pObj))) );
|
||||
else
|
||||
fprintf( pFile, " n%0*d", nDigits, Aig_ObjFanin0(pObj)->iData );
|
||||
if ( vPoNames )
|
||||
fprintf( pFile, " %s\n", Vec_PtrEntry(vPoNames, Aig_ObjPioNum(pObj)) );
|
||||
fprintf( pFile, " %s\n", (char*)Vec_PtrEntry(vPoNames, Aig_ObjPioNum(pObj)) );
|
||||
else
|
||||
fprintf( pFile, " n%0*d\n", nDigits, pObj->iData );
|
||||
fprintf( pFile, "%d 1\n", !Aig_ObjFaninC0(pObj) );
|
||||
|
|
@ -901,9 +901,9 @@ void Aig_ManSetPioNumbers( Aig_Man_t * p )
|
|||
Aig_Obj_t * pObj;
|
||||
int i;
|
||||
Aig_ManForEachPi( p, pObj, i )
|
||||
pObj->pNext = (Aig_Obj_t *)i;
|
||||
pObj->PioNum = i;
|
||||
Aig_ManForEachPo( p, pObj, i )
|
||||
pObj->pNext = (Aig_Obj_t *)i;
|
||||
pObj->PioNum = i;
|
||||
}
|
||||
|
||||
/**Function*************************************************************
|
||||
|
|
@ -961,7 +961,7 @@ int Aig_ManCountChoices( Aig_Man_t * p )
|
|||
void Aig_ManPrintControlFanouts( Aig_Man_t * p )
|
||||
{
|
||||
Aig_Obj_t * pObj, * pFanin0, * pFanin1, * pCtrl;
|
||||
int i, Counter = 0;
|
||||
int i;
|
||||
|
||||
pCtrl = Aig_ManPi( p, Aig_ManPiNum(p) - 1 );
|
||||
|
||||
|
|
@ -1072,8 +1072,8 @@ void Aig_ManRandomTest1()
|
|||
}
|
||||
|
||||
|
||||
#define NUMBER1 3716960521
|
||||
#define NUMBER2 2174103536
|
||||
#define NUMBER1 3716960521u
|
||||
#define NUMBER2 2174103536u
|
||||
|
||||
/**Function*************************************************************
|
||||
|
||||
|
|
|
|||
|
|
@ -939,7 +939,7 @@ int Bbr_FindBestVariable( DdManager * dd,
|
|||
int iVarBest, v;
|
||||
double CostBest, CostCur;
|
||||
|
||||
CostBest = 100000000000000;
|
||||
CostBest = 100000000000000.0;
|
||||
iVarBest = -1;
|
||||
for ( v = 0; v < nVars; v++ )
|
||||
if ( pVars[v] )
|
||||
|
|
|
|||
|
|
@ -48,7 +48,6 @@ static inline void Aig_ObjCleanGlobalBdd( DdManager * dd, Aig_Obj_t * pObj )
|
|||
DdNode * Bbr_NodeGlobalBdds_rec( DdManager * dd, Aig_Obj_t * pNode, int nBddSizeMax, int fDropInternal, ProgressBar * pProgress, int * pCounter, int fVerbose )
|
||||
{
|
||||
DdNode * bFunc, * bFunc0, * bFunc1;
|
||||
int fDetectMuxes = 1;
|
||||
assert( !Aig_IsComplement(pNode) );
|
||||
if ( Cudd_ReadKeys(dd)-Cudd_ReadDead(dd) > (unsigned)nBddSizeMax )
|
||||
{
|
||||
|
|
|
|||
|
|
@ -206,10 +206,12 @@ DdNode ** Aig_ManCreatePartitions( DdManager * dd, Aig_Man_t * p, int fReorder,
|
|||
int Aig_ManComputeReachable( DdManager * dd, Aig_Man_t * p, DdNode ** pbParts, DdNode * bInitial, DdNode ** pbOutputs, int nBddMax, int nIterMax, int fPartition, int fReorder, int fVerbose, int fSilent )
|
||||
{
|
||||
int fInternalReorder = 0;
|
||||
Bbr_ImageTree_t * pTree;
|
||||
Bbr_ImageTree2_t * pTree2;
|
||||
Bbr_ImageTree_t * pTree = NULL; // Suppress "might be used uninitialized"
|
||||
Bbr_ImageTree2_t * pTree2 = NULL; // Supprses "might be used uninitialized"
|
||||
DdNode * bReached, * bCubeCs;
|
||||
DdNode * bCurrent, * bNext, * bTemp;
|
||||
DdNode * bCurrent;
|
||||
DdNode * bNext = NULL; // Suppress "might be used uninitialized"
|
||||
DdNode * bTemp;
|
||||
DdNode ** pbVarsY;
|
||||
Aig_Obj_t * pLatch;
|
||||
int i, nIters, nBddSize;
|
||||
|
|
|
|||
|
|
@ -41,7 +41,8 @@
|
|||
***********************************************************************/
|
||||
void Bdc_SuppMinimize2( Bdc_Man_t * p, Bdc_Isf_t * pIsf )
|
||||
{
|
||||
int v, clk;
|
||||
int v;
|
||||
int clk = 0; // Suppress "might be used uninitialized"
|
||||
if ( p->pPars->fVerbose )
|
||||
clk = clock();
|
||||
// compute support
|
||||
|
|
@ -82,7 +83,8 @@ void Bdc_SuppMinimize2( Bdc_Man_t * p, Bdc_Isf_t * pIsf )
|
|||
***********************************************************************/
|
||||
void Bdc_SuppMinimize( Bdc_Man_t * p, Bdc_Isf_t * pIsf )
|
||||
{
|
||||
int v, clk;
|
||||
int v;
|
||||
int clk = 0; // Suppress "might be used uninitialized"
|
||||
if ( p->pPars->fVerbose )
|
||||
clk = clock();
|
||||
// go through the support variables
|
||||
|
|
@ -245,7 +247,9 @@ int Bdc_DecomposeFindInitialVarSet( Bdc_Man_t * p, Bdc_Isf_t * pIsf, Bdc_Isf_t *
|
|||
***********************************************************************/
|
||||
int Bdc_DecomposeWeakOr( Bdc_Man_t * p, Bdc_Isf_t * pIsf, Bdc_Isf_t * pIsfL, Bdc_Isf_t * pIsfR )
|
||||
{
|
||||
int v, VarCost, VarBest, Cost, VarCostBest = 0;
|
||||
int v, VarCost;
|
||||
int VarBest = -1; // Suppress "might be used uninitialized"
|
||||
int Cost, VarCostBest = 0;
|
||||
|
||||
for ( v = 0; v < p->nVars; v++ )
|
||||
{
|
||||
|
|
@ -542,7 +546,7 @@ int Bdc_DecomposeStepMux( Bdc_Man_t * p, Bdc_Isf_t * pIsf, Bdc_Isf_t * pIsfL, Bd
|
|||
{
|
||||
int Var, VarMin, nSuppMin, nSuppCur;
|
||||
unsigned uSupp0, uSupp1;
|
||||
int clk;
|
||||
int clk = 0; // Suppress "might be used uninitialized"
|
||||
if ( p->pPars->fVerbose )
|
||||
clk = clock();
|
||||
VarMin = -1;
|
||||
|
|
@ -667,13 +671,14 @@ Bdc_Fun_t * Bdc_ManCreateGate( Bdc_Man_t * p, Bdc_Fun_t * pFunc0, Bdc_Fun_t * pF
|
|||
***********************************************************************/
|
||||
Bdc_Fun_t * Bdc_ManDecompose_rec( Bdc_Man_t * p, Bdc_Isf_t * pIsf )
|
||||
{
|
||||
int static Counter = 0;
|
||||
int LocalCounter = Counter++;
|
||||
// int static Counter = 0;
|
||||
// int LocalCounter = Counter++;
|
||||
Bdc_Type_t Type;
|
||||
Bdc_Fun_t * pFunc, * pFunc0, * pFunc1;
|
||||
Bdc_Isf_t IsfL, * pIsfL = &IsfL;
|
||||
Bdc_Isf_t IsfB, * pIsfR = &IsfB;
|
||||
int iVar, clk;
|
||||
int iVar;
|
||||
int clk = 0; // Suppress "might be used uninitialized"
|
||||
/*
|
||||
printf( "Init function (%d):\n", LocalCounter );
|
||||
Extra_PrintBinary( stdout, pIsf->puOn, 1<<4 );printf("\n");
|
||||
|
|
|
|||
|
|
@ -555,7 +555,7 @@ p->timeCuts += clock() - clk;
|
|||
}
|
||||
if ( nVars == 2 && nFanins > 2 && fUseResub )
|
||||
{
|
||||
if ( pObjNew = Csw_ObjTwoVarCut( p, pCut ) )
|
||||
if ( (pObjNew = Csw_ObjTwoVarCut( p, pCut )) )
|
||||
{
|
||||
p->nNodesTriv2++;
|
||||
return pObjNew;
|
||||
|
|
|
|||
|
|
@ -264,7 +264,7 @@ Aig_MmFixed_t * Dar_ManComputeCuts( Aig_Man_t * pAig, int nCutsMax, int fVerbose
|
|||
printf( "Nodes = %6d. Total cuts = %6d. 4-input cuts = %6d.\n",
|
||||
Aig_ManObjNum(pAig), nCuts, nCutsK );
|
||||
printf( "Cut size = %2d. Truth size = %2d. Total mem = %5.2f Mb ",
|
||||
sizeof(Dar_Cut_t), 4, 1.0*Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20) );
|
||||
sizeof(Dar_Cut_t), (int)4, 1.0*Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20) );
|
||||
PRT( "Runtime", clock() - clk );
|
||||
/*
|
||||
Aig_ManForEachNode( pAig, pObj, i )
|
||||
|
|
|
|||
|
|
@ -441,7 +441,6 @@ int Fra_ClauCheckClause( Cla_Man_t * p, Vec_Int_t * vClause, Vec_Int_t * vCex )
|
|||
{
|
||||
int nBTLimit = 0;
|
||||
int RetValue, iVar, i;
|
||||
int nClauseSize = Vec_IntSize( vClause );
|
||||
// complement literals
|
||||
Vec_IntPush( vClause, toLit( p->nSatVarsTestCur++ ) ); // helper positive
|
||||
Vec_IntComplement( vClause ); // helper negative (the clause is C v h')
|
||||
|
|
|
|||
|
|
@ -813,7 +813,9 @@ clk = clock();
|
|||
p->nClauses = Vec_IntSize( p->vClauses );
|
||||
if ( Vec_IntSize( p->vClausesProven ) > 0 )
|
||||
{
|
||||
int RetValue, k, Beg, End, * pStart;
|
||||
int RetValue, k, Beg;
|
||||
int End = -1; // Suppress "might be used uninitialized"
|
||||
int * pStart;
|
||||
// reset the solver
|
||||
if ( p->pSatMain ) sat_solver_delete( p->pSatMain );
|
||||
p->pSatMain = Cnf_DataWriteIntoSolver( p->pCnf, 1, 0 );
|
||||
|
|
|
|||
|
|
@ -388,7 +388,8 @@ Aig_Man_t * Fra_FraigInduction( Aig_Man_t * pManAig, Fra_Ssw_t * pParams )
|
|||
Cnf_Dat_t * pCnf;
|
||||
Aig_Man_t * pManAigNew = NULL;
|
||||
int nNodesBeg, nRegsBeg;
|
||||
int nIter, i, clk = clock(), clk2;
|
||||
int nIter = -1; // Suppress "might be used uninitialized"
|
||||
int i, clk = clock(), clk2;
|
||||
int TimeToStop = (pParams->TimeLimit == 0.0)? 0 : clock() + (int)(pParams->TimeLimit * CLOCKS_PER_SEC);
|
||||
|
||||
if ( Aig_ManNodeNum(pManAig) == 0 )
|
||||
|
|
|
|||
|
|
@ -76,7 +76,7 @@ clk = clock();
|
|||
{
|
||||
vSup = Vec_VecEntry( vSupps, i );
|
||||
Vec_IntForEachEntry( vSup, Entry, k )
|
||||
Vec_VecPush( vSuppsIn, Entry, (void *)i );
|
||||
Vec_VecPush( vSuppsIn, Entry, (void *)(PORT_PTRUINT_T)i );
|
||||
}
|
||||
PRT( "Inverse ", clock() - clk );
|
||||
|
||||
|
|
@ -212,7 +212,7 @@ clk = clock();
|
|||
break;
|
||||
vSup = Vec_VecEntry( vSupps, i );
|
||||
Vec_IntForEachEntry( vSup, Entry, k )
|
||||
Vec_VecPush( vSuppsIn, Entry, (void *)i );
|
||||
Vec_VecPush( vSuppsIn, Entry, (void *)(PORT_PTRUINT_T)i );
|
||||
}
|
||||
PRT( "Inverse ", clock() - clk );
|
||||
|
||||
|
|
|
|||
|
|
@ -166,13 +166,13 @@ static inline int Hop_ObjIsMarkA( Hop_Obj_t * pObj ) { return pObj-
|
|||
static inline void Hop_ObjSetMarkA( Hop_Obj_t * pObj ) { pObj->fMarkA = 1; }
|
||||
static inline void Hop_ObjClearMarkA( Hop_Obj_t * pObj ) { pObj->fMarkA = 0; }
|
||||
|
||||
static inline void Hop_ObjSetTravId( Hop_Obj_t * pObj, int TravId ) { pObj->pData = (void *)(long)TravId; }
|
||||
static inline void Hop_ObjSetTravIdCurrent( Hop_Man_t * p, Hop_Obj_t * pObj ) { pObj->pData = (void *)(long)p->nTravIds; }
|
||||
static inline void Hop_ObjSetTravIdPrevious( Hop_Man_t * p, Hop_Obj_t * pObj ) { pObj->pData = (void *)(long)(p->nTravIds - 1); }
|
||||
static inline int Hop_ObjIsTravIdCurrent( Hop_Man_t * p, Hop_Obj_t * pObj ) { return (int)((int)(long)pObj->pData == p->nTravIds); }
|
||||
static inline int Hop_ObjIsTravIdPrevious( Hop_Man_t * p, Hop_Obj_t * pObj ) { return (int)((int)(long)pObj->pData == p->nTravIds - 1); }
|
||||
static inline void Hop_ObjSetTravId( Hop_Obj_t * pObj, int TravId ) { pObj->pData = (void *)(PORT_PTRINT_T)TravId; }
|
||||
static inline void Hop_ObjSetTravIdCurrent( Hop_Man_t * p, Hop_Obj_t * pObj ) { pObj->pData = (void *)(PORT_PTRINT_T)p->nTravIds; }
|
||||
static inline void Hop_ObjSetTravIdPrevious( Hop_Man_t * p, Hop_Obj_t * pObj ) { pObj->pData = (void *)(PORT_PTRINT_T)(p->nTravIds - 1); }
|
||||
static inline int Hop_ObjIsTravIdCurrent( Hop_Man_t * p, Hop_Obj_t * pObj ) { return (int)((int)(PORT_PTRINT_T)pObj->pData == p->nTravIds); }
|
||||
static inline int Hop_ObjIsTravIdPrevious( Hop_Man_t * p, Hop_Obj_t * pObj ) { return (int)((int)(PORT_PTRINT_T)pObj->pData == p->nTravIds - 1); }
|
||||
|
||||
static inline int Hop_ObjTravId( Hop_Obj_t * pObj ) { return (int)pObj->pData; }
|
||||
static inline int Hop_ObjTravId( Hop_Obj_t * pObj ) { return (int)(PORT_PTRINT_T)pObj->pData; }
|
||||
static inline int Hop_ObjPhase( Hop_Obj_t * pObj ) { return pObj->fPhase; }
|
||||
static inline int Hop_ObjRefs( Hop_Obj_t * pObj ) { return pObj->nRefs; }
|
||||
static inline void Hop_ObjRef( Hop_Obj_t * pObj ) { pObj->nRefs++; }
|
||||
|
|
|
|||
|
|
@ -123,15 +123,15 @@ int Hop_ManCountLevels( Hop_Man_t * p )
|
|||
vNodes = Hop_ManDfs( p );
|
||||
Vec_PtrForEachEntry( vNodes, pObj, i )
|
||||
{
|
||||
Level0 = (int)Hop_ObjFanin0(pObj)->pData;
|
||||
Level1 = (int)Hop_ObjFanin1(pObj)->pData;
|
||||
pObj->pData = (void *)(1 + Hop_ObjIsExor(pObj) + AIG_MAX(Level0, Level1));
|
||||
Level0 = (int)(PORT_PTRUINT_T)Hop_ObjFanin0(pObj)->pData;
|
||||
Level1 = (int)(PORT_PTRUINT_T)Hop_ObjFanin1(pObj)->pData;
|
||||
pObj->pData = (void *)(PORT_PTRUINT_T)(1 + Hop_ObjIsExor(pObj) + AIG_MAX(Level0, Level1));
|
||||
}
|
||||
Vec_PtrFree( vNodes );
|
||||
// get levels of the POs
|
||||
LevelsMax = 0;
|
||||
Hop_ManForEachPo( p, pObj, i )
|
||||
LevelsMax = AIG_MAX( LevelsMax, (int)Hop_ObjFanin0(pObj)->pData );
|
||||
LevelsMax = AIG_MAX( LevelsMax, (int)(PORT_PTRUINT_T)Hop_ObjFanin0(pObj)->pData );
|
||||
return LevelsMax;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -95,7 +95,7 @@ void Hop_ManAddMemory( Hop_Man_t * p )
|
|||
pMemory = ALLOC( char, nBytes );
|
||||
Vec_PtrPush( p->vChunks, pMemory );
|
||||
// align memory at the 32-byte boundary
|
||||
pMemory = pMemory + 64 - (((int)pMemory) & 63);
|
||||
pMemory = pMemory + 64 - (((int)(PORT_PTRUINT_T)pMemory) & 63);
|
||||
// remember the manager in the first entry
|
||||
Vec_PtrPush( p->vPages, pMemory );
|
||||
// break the memory down into nodes
|
||||
|
|
|
|||
|
|
@ -116,7 +116,7 @@ Hop_Obj_t * Hop_And( Hop_Man_t * p, Hop_Obj_t * p0, Hop_Obj_t * p1 )
|
|||
// return Hop_Exor( p, pFan0, pFan1 );
|
||||
// check the table
|
||||
pGhost = Hop_ObjCreateGhost( p, p0, p1, AIG_AND );
|
||||
if ( pResult = Hop_TableLookup( p, pGhost ) )
|
||||
if ( (pResult = Hop_TableLookup( p, pGhost )) )
|
||||
return pResult;
|
||||
return Hop_ObjCreate( p, pGhost );
|
||||
}
|
||||
|
|
|
|||
|
|
@ -333,7 +333,7 @@ void Hop_ObjPrintEqn( FILE * pFile, Hop_Obj_t * pObj, Vec_Vec_t * vLevels, int L
|
|||
// PI case
|
||||
if ( Hop_ObjIsPi(pObj) )
|
||||
{
|
||||
fprintf( pFile, "%s%s", fCompl? "!" : "", pObj->pData );
|
||||
fprintf( pFile, "%s%s", fCompl? "!" : "", (char*)pObj->pData );
|
||||
return;
|
||||
}
|
||||
// AND case
|
||||
|
|
@ -380,7 +380,7 @@ void Hop_ObjPrintVerilog( FILE * pFile, Hop_Obj_t * pObj, Vec_Vec_t * vLevels, i
|
|||
// PI case
|
||||
if ( Hop_ObjIsPi(pObj) )
|
||||
{
|
||||
fprintf( pFile, "%s%s", fCompl? "~" : "", pObj->pData );
|
||||
fprintf( pFile, "%s%s", fCompl? "~" : "", (char*)pObj->pData );
|
||||
return;
|
||||
}
|
||||
// EXOR case
|
||||
|
|
@ -516,13 +516,13 @@ void Hop_ManDumpBlif( Hop_Man_t * p, char * pFileName )
|
|||
// collect nodes in the DFS order
|
||||
vNodes = Hop_ManDfs( p );
|
||||
// assign IDs to objects
|
||||
Hop_ManConst1(p)->pData = (void *)Counter++;
|
||||
Hop_ManConst1(p)->pData = (void *)(PORT_PTRUINT_T)Counter++;
|
||||
Hop_ManForEachPi( p, pObj, i )
|
||||
pObj->pData = (void *)Counter++;
|
||||
pObj->pData = (void *)(PORT_PTRUINT_T)Counter++;
|
||||
Hop_ManForEachPo( p, pObj, i )
|
||||
pObj->pData = (void *)Counter++;
|
||||
pObj->pData = (void *)(PORT_PTRUINT_T)Counter++;
|
||||
Vec_PtrForEachEntry( vNodes, pObj, i )
|
||||
pObj->pData = (void *)Counter++;
|
||||
pObj->pData = (void *)(PORT_PTRUINT_T)Counter++;
|
||||
nDigits = Hop_Base10Log( Counter );
|
||||
// write the file
|
||||
pFile = fopen( pFileName, "w" );
|
||||
|
|
@ -532,34 +532,34 @@ void Hop_ManDumpBlif( Hop_Man_t * p, char * pFileName )
|
|||
// write PIs
|
||||
fprintf( pFile, ".inputs" );
|
||||
Hop_ManForEachPi( p, pObj, i )
|
||||
fprintf( pFile, " n%0*d", nDigits, (int)pObj->pData );
|
||||
fprintf( pFile, " n%0*d", nDigits, (int)(PORT_PTRUINT_T)pObj->pData );
|
||||
fprintf( pFile, "\n" );
|
||||
// write POs
|
||||
fprintf( pFile, ".outputs" );
|
||||
Hop_ManForEachPo( p, pObj, i )
|
||||
fprintf( pFile, " n%0*d", nDigits, (int)pObj->pData );
|
||||
fprintf( pFile, " n%0*d", nDigits, (int)(PORT_PTRUINT_T)pObj->pData );
|
||||
fprintf( pFile, "\n" );
|
||||
// write nodes
|
||||
Vec_PtrForEachEntry( vNodes, pObj, i )
|
||||
{
|
||||
fprintf( pFile, ".names n%0*d n%0*d n%0*d\n",
|
||||
nDigits, (int)Hop_ObjFanin0(pObj)->pData,
|
||||
nDigits, (int)Hop_ObjFanin1(pObj)->pData,
|
||||
nDigits, (int)pObj->pData );
|
||||
nDigits, (int)(PORT_PTRUINT_T)Hop_ObjFanin0(pObj)->pData,
|
||||
nDigits, (int)(PORT_PTRUINT_T)Hop_ObjFanin1(pObj)->pData,
|
||||
nDigits, (int)(PORT_PTRUINT_T)pObj->pData );
|
||||
fprintf( pFile, "%d%d 1\n", !Hop_ObjFaninC0(pObj), !Hop_ObjFaninC1(pObj) );
|
||||
}
|
||||
// write POs
|
||||
Hop_ManForEachPo( p, pObj, i )
|
||||
{
|
||||
fprintf( pFile, ".names n%0*d n%0*d\n",
|
||||
nDigits, (int)Hop_ObjFanin0(pObj)->pData,
|
||||
nDigits, (int)pObj->pData );
|
||||
nDigits, (int)(PORT_PTRUINT_T)Hop_ObjFanin0(pObj)->pData,
|
||||
nDigits, (int)(PORT_PTRUINT_T)pObj->pData );
|
||||
fprintf( pFile, "%d 1\n", !Hop_ObjFaninC0(pObj) );
|
||||
if ( Hop_ObjIsConst1(Hop_ObjFanin0(pObj)) )
|
||||
pConst1 = Hop_ManConst1(p);
|
||||
}
|
||||
if ( pConst1 )
|
||||
fprintf( pFile, ".names n%0*d\n 1\n", nDigits, (int)pConst1->pData );
|
||||
fprintf( pFile, ".names n%0*d\n 1\n", nDigits, (int)(PORT_PTRUINT_T)pConst1->pData );
|
||||
fprintf( pFile, ".end\n\n" );
|
||||
fclose( pFile );
|
||||
Vec_PtrFree( vNodes );
|
||||
|
|
|
|||
|
|
@ -208,13 +208,13 @@ Vec_Str_t * Ioa_WriteEncodeLiterals( Vec_Int_t * vLits )
|
|||
int Pos = 0, Lit, LitPrev, Diff, i;
|
||||
vBinary = Vec_StrAlloc( 2 * Vec_IntSize(vLits) );
|
||||
LitPrev = Vec_IntEntry( vLits, 0 );
|
||||
Pos = Ioa_WriteAigerEncode( Vec_StrArray(vBinary), Pos, LitPrev );
|
||||
Pos = Ioa_WriteAigerEncode( (unsigned char *)Vec_StrArray(vBinary), Pos, LitPrev );
|
||||
Vec_IntForEachEntryStart( vLits, Lit, i, 1 )
|
||||
{
|
||||
Diff = Lit - LitPrev;
|
||||
Diff = (Lit < LitPrev)? -Diff : Diff;
|
||||
Diff = (Diff << 1) | (int)(Lit < LitPrev);
|
||||
Pos = Ioa_WriteAigerEncode( Vec_StrArray(vBinary), Pos, Diff );
|
||||
Pos = Ioa_WriteAigerEncode( (unsigned char *)Vec_StrArray(vBinary), Pos, Diff );
|
||||
LitPrev = Lit;
|
||||
if ( Pos + 10 > vBinary->nCap )
|
||||
Vec_StrGrow( vBinary, vBinary->nCap+1 );
|
||||
|
|
@ -254,7 +254,7 @@ void Ioa_WriteAiger( Aig_Man_t * pMan, char * pFileName, int fWriteSymbols, int
|
|||
// Bar_Progress_t * pProgress;
|
||||
FILE * pFile;
|
||||
Aig_Obj_t * pObj, * pDriver;
|
||||
int i, nNodes, Pos, nBufferSize;
|
||||
int i, nNodes, nBufferSize, Pos;
|
||||
unsigned char * pBuffer;
|
||||
unsigned uLit0, uLit1, uLit;
|
||||
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@ Ivy_Man_t * Ivy_ManBalance( Ivy_Man_t * p, int fUpdateLevel )
|
|||
Ivy_ObjCreatePo( pNew, Ivy_EdgeToNode(pNew, NewNodeId) );
|
||||
}
|
||||
Vec_VecFree( vStore );
|
||||
if ( i = Ivy_ManCleanup( pNew ) )
|
||||
if ( (i = Ivy_ManCleanup( pNew )) )
|
||||
{
|
||||
// printf( "Cleanup after balancing removed %d dangling nodes.\n", i );
|
||||
}
|
||||
|
|
|
|||
|
|
@ -53,7 +53,7 @@ Ivy_Obj_t * Ivy_CanonPair_rec( Ivy_Man_t * p, Ivy_Obj_t * pGhost )
|
|||
// consider the case when the pair is canonical
|
||||
if ( !Ivy_ObjIsLatch(Ivy_ObjFanin0(pGhost)) || !Ivy_ObjIsLatch(Ivy_ObjFanin1(pGhost)) )
|
||||
{
|
||||
if ( pResult = Ivy_TableLookup( p, pGhost ) )
|
||||
if ( (pResult = Ivy_TableLookup( p, pGhost )) )
|
||||
return pResult;
|
||||
return Ivy_ObjCreate( p, pGhost );
|
||||
}
|
||||
|
|
|
|||
|
|
@ -300,7 +300,8 @@ int Ivy_ManFindBoolCutCost( Ivy_Obj_t * pObj )
|
|||
***********************************************************************/
|
||||
int Ivy_ManFindBoolCut( Ivy_Man_t * p, Ivy_Obj_t * pRoot, Vec_Ptr_t * vFront, Vec_Ptr_t * vVolume, Vec_Ptr_t * vLeaves )
|
||||
{
|
||||
Ivy_Obj_t * pObj, * pFaninC, * pFanin0, * pFanin1, * pPivot;
|
||||
Ivy_Obj_t * pObj = NULL; // Suppress "might be used uninitialized"
|
||||
Ivy_Obj_t * pFaninC, * pFanin0, * pFanin1, * pPivot;
|
||||
int RetValue, LevelLimit, Lev, k;
|
||||
assert( !Ivy_IsComplement(pRoot) );
|
||||
// clear the frontier and collect the nodes
|
||||
|
|
|
|||
|
|
@ -382,7 +382,7 @@ int Ivy_ManIsAcyclic( Ivy_Man_t * p )
|
|||
Ivy_ManForEachCo( p, pObj, i )
|
||||
{
|
||||
// traverse the output logic cone
|
||||
if ( fAcyclic = Ivy_ManIsAcyclic_rec(p, Ivy_ObjFanin0(pObj)) )
|
||||
if ( (fAcyclic = Ivy_ManIsAcyclic_rec(p, Ivy_ObjFanin0(pObj))) )
|
||||
continue;
|
||||
// stop as soon as the first loop is detected
|
||||
fprintf( stdout, " (cone of %s \"%d\")\n", Ivy_ObjIsLatch(pObj)? "latch" : "PO", Ivy_ObjId(pObj) );
|
||||
|
|
|
|||
|
|
@ -309,7 +309,7 @@ int Ivy_FastMapArea( Ivy_Man_t * pAig )
|
|||
SeeAlso []
|
||||
|
||||
***********************************************************************/
|
||||
static inline Ivy_ObjIsNodeInt1( Ivy_Obj_t * pObj )
|
||||
static inline int Ivy_ObjIsNodeInt1( Ivy_Obj_t * pObj )
|
||||
{
|
||||
return Ivy_ObjIsNode(pObj) && Ivy_ObjRefs(pObj) == 1;
|
||||
}
|
||||
|
|
@ -325,7 +325,7 @@ static inline Ivy_ObjIsNodeInt1( Ivy_Obj_t * pObj )
|
|||
SeeAlso []
|
||||
|
||||
***********************************************************************/
|
||||
static inline Ivy_ObjIsNodeInt2( Ivy_Obj_t * pObj )
|
||||
static inline int Ivy_ObjIsNodeInt2( Ivy_Obj_t * pObj )
|
||||
{
|
||||
return Ivy_ObjIsNode(pObj) && Ivy_ObjRefs(pObj) <= 2;
|
||||
}
|
||||
|
|
@ -612,30 +612,30 @@ void Ivy_FastMapNode( Ivy_Man_t * pAig, Ivy_Obj_t * pObj, int nLimit )
|
|||
pFaninA = Ivy_ObjFanin0(pFanin0);
|
||||
pFaninB = Ivy_ObjFanin1(pFanin0);
|
||||
if ( Ivy_ObjIsNodeInt1(pFaninA) && Ivy_ObjIsNodeInt1(pFaninB) )
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFanin0);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFanin0);
|
||||
else
|
||||
{
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFaninA);
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFaninB);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFaninA);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFaninB);
|
||||
}
|
||||
}
|
||||
else
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFanin0);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFanin0);
|
||||
// process the second fanin
|
||||
if ( Ivy_ObjIsNodeInt1(pFanin1) )
|
||||
{
|
||||
pFaninA = Ivy_ObjFanin0(pFanin1);
|
||||
pFaninB = Ivy_ObjFanin1(pFanin1);
|
||||
if ( Ivy_ObjIsNodeInt1(pFaninA) && Ivy_ObjIsNodeInt1(pFaninB) )
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFanin1);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFanin1);
|
||||
else
|
||||
{
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFaninA);
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFaninB);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFaninA);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFaninB);
|
||||
}
|
||||
}
|
||||
else
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFanin1);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFanin1);
|
||||
// sort the fanins
|
||||
Vec_IntSelectSort( pSupp->pArray, pSupp->nSize );
|
||||
pSupp->nSize = Vec_IntRemoveDup( pSupp->pArray, pSupp->nSize );
|
||||
|
|
@ -681,30 +681,30 @@ void Ivy_FastMapNode( Ivy_Man_t * pAig, Ivy_Obj_t * pObj, int nLimit )
|
|||
pFaninA = Ivy_ObjFanin0(pFanin0);
|
||||
pFaninB = Ivy_ObjFanin1(pFanin0);
|
||||
if ( Ivy_ObjIsNodeInt1(pFaninA) && Ivy_ObjIsNodeInt1(pFaninB) )
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFanin0);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFanin0);
|
||||
else
|
||||
{
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFaninA);
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFaninB);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFaninA);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFaninB);
|
||||
}
|
||||
}
|
||||
else
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFanin0);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFanin0);
|
||||
// process the second fanin
|
||||
if ( Ivy_ObjIsNodeInt1(pFanin1) )
|
||||
{
|
||||
pFaninA = Ivy_ObjFanin0(pFanin1);
|
||||
pFaninB = Ivy_ObjFanin1(pFanin1);
|
||||
if ( Ivy_ObjIsNodeInt1(pFaninA) && Ivy_ObjIsNodeInt1(pFaninB) )
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFanin1);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFanin1);
|
||||
else
|
||||
{
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFaninA);
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFaninB);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFaninA);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFaninB);
|
||||
}
|
||||
}
|
||||
else
|
||||
pSupp->pArray[pSupp->nSize++] = Ivy_ObjId(pFanin1);
|
||||
pSupp->pArray[(int)(pSupp->nSize++)] = Ivy_ObjId(pFanin1);
|
||||
// sort the fanins
|
||||
Vec_IntSelectSort( pSupp->pArray, pSupp->nSize );
|
||||
pSupp->nSize = Vec_IntRemoveDup( pSupp->pArray, pSupp->nSize );
|
||||
|
|
@ -1497,10 +1497,6 @@ void Ivy_FastMapNodeRecover( Ivy_Man_t * pAig, Ivy_Obj_t * pObj, int nLimit, Vec
|
|||
AreaBef = Ivy_FastMapNodeAreaRefed( pAig, pObj );
|
||||
// if ( AreaBef == 1 )
|
||||
// return;
|
||||
if ( pObj->Id == 102 )
|
||||
{
|
||||
int x = 0;
|
||||
}
|
||||
// the cut is non-trivial
|
||||
Ivy_FastMapNodePrepare( pAig, pObj, nLimit, vFront, vFrontOld );
|
||||
// iteratively modify the cut
|
||||
|
|
|
|||
|
|
@ -141,7 +141,7 @@ static inline Ivy_Obj_t * Ivy_ObjNodeHashNext( Ivy_Obj_t * pObj )
|
|||
static inline Ivy_Obj_t * Ivy_ObjEquivListNext( Ivy_Obj_t * pObj ) { return pObj->pPrevFan0; }
|
||||
static inline Ivy_Obj_t * Ivy_ObjEquivListPrev( Ivy_Obj_t * pObj ) { return pObj->pPrevFan1; }
|
||||
static inline Ivy_Obj_t * Ivy_ObjFraig( Ivy_Obj_t * pObj ) { return pObj->pEquiv; }
|
||||
static inline int Ivy_ObjSatNum( Ivy_Obj_t * pObj ) { return (int)pObj->pNextFan0; }
|
||||
static inline int Ivy_ObjSatNum( Ivy_Obj_t * pObj ) { return (int)(PORT_PTRUINT_T)pObj->pNextFan0; }
|
||||
static inline Vec_Ptr_t * Ivy_ObjFaninVec( Ivy_Obj_t * pObj ) { return (Vec_Ptr_t *)pObj->pNextFan1; }
|
||||
|
||||
static inline void Ivy_ObjSetSim( Ivy_Obj_t * pObj, Ivy_FraigSim_t * pSim ) { pObj->pFanout = (Ivy_Obj_t *)pSim; }
|
||||
|
|
@ -152,7 +152,7 @@ static inline void Ivy_ObjSetNodeHashNext( Ivy_Obj_t * pObj, Ivy_Obj_t *
|
|||
static inline void Ivy_ObjSetEquivListNext( Ivy_Obj_t * pObj, Ivy_Obj_t * pNext ) { pObj->pPrevFan0 = pNext; }
|
||||
static inline void Ivy_ObjSetEquivListPrev( Ivy_Obj_t * pObj, Ivy_Obj_t * pPrev ) { pObj->pPrevFan1 = pPrev; }
|
||||
static inline void Ivy_ObjSetFraig( Ivy_Obj_t * pObj, Ivy_Obj_t * pNode ) { pObj->pEquiv = pNode; }
|
||||
static inline void Ivy_ObjSetSatNum( Ivy_Obj_t * pObj, int Num ) { pObj->pNextFan0 = (Ivy_Obj_t *)Num; }
|
||||
static inline void Ivy_ObjSetSatNum( Ivy_Obj_t * pObj, int Num ) { pObj->pNextFan0 = (Ivy_Obj_t *)(PORT_PTRUINT_T)Num; }
|
||||
static inline void Ivy_ObjSetFaninVec( Ivy_Obj_t * pObj, Vec_Ptr_t * vFanins ) { pObj->pNextFan1 = (Ivy_Obj_t *)vFanins; }
|
||||
|
||||
static inline unsigned Ivy_ObjRandomSim() { return (rand() << 24) ^ (rand() << 12) ^ rand(); }
|
||||
|
|
@ -252,8 +252,8 @@ int Ivy_FraigProve( Ivy_Man_t ** ppManAig, void * pPars )
|
|||
Prove_Params_t * pParams = pPars;
|
||||
Ivy_FraigParams_t Params, * pIvyParams = &Params;
|
||||
Ivy_Man_t * pManAig, * pManTemp;
|
||||
int RetValue, nIter, clk, timeStart = clock();//, Counter;
|
||||
sint64 nSatConfs, nSatInspects;
|
||||
int RetValue, nIter, clk;//, Counter;
|
||||
sint64 nSatConfs = 0, nSatInspects = 0;
|
||||
|
||||
// start the network and parameters
|
||||
pManAig = *ppManAig;
|
||||
|
|
@ -2076,7 +2076,7 @@ void Ivy_FraigPrintActivity( Ivy_FraigMan_t * p )
|
|||
***********************************************************************/
|
||||
int Ivy_FraigNodesAreEquiv( Ivy_FraigMan_t * p, Ivy_Obj_t * pOld, Ivy_Obj_t * pNew )
|
||||
{
|
||||
int pLits[4], RetValue, RetValue1, nBTLimit, clk, clk2 = clock();
|
||||
int pLits[4], RetValue, RetValue1, nBTLimit, clk; //, clk2 = clock();
|
||||
|
||||
// make sure the nodes are not complemented
|
||||
assert( !Ivy_IsComplement(pNew) );
|
||||
|
|
@ -2225,7 +2225,8 @@ p->timeSatFail += clock() - clk;
|
|||
***********************************************************************/
|
||||
int Ivy_FraigNodeIsConst( Ivy_FraigMan_t * p, Ivy_Obj_t * pNew )
|
||||
{
|
||||
int pLits[2], RetValue1, RetValue, clk;
|
||||
int pLits[2], RetValue1, clk;
|
||||
// int RetValue;
|
||||
|
||||
// make sure the nodes are not complemented
|
||||
assert( !Ivy_IsComplement(pNew) );
|
||||
|
|
|
|||
|
|
@ -96,7 +96,7 @@ void Ivy_ManAddMemory( Ivy_Man_t * p )
|
|||
pMemory = ALLOC( char, nBytes );
|
||||
Vec_PtrPush( p->vChunks, pMemory );
|
||||
// align memory at the 32-byte boundary
|
||||
pMemory = pMemory + EntrySizeMax - (((int)pMemory) & (EntrySizeMax-1));
|
||||
pMemory = pMemory + EntrySizeMax - (((int)(PORT_PTRUINT_T)pMemory) & (EntrySizeMax-1));
|
||||
// remember the manager in the first entry
|
||||
Vec_PtrPush( p->vPages, pMemory );
|
||||
// break the memory down into nodes
|
||||
|
|
|
|||
|
|
@ -56,7 +56,8 @@ int Ivy_MultiPlus( Ivy_Man_t * p, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vCone, Ivy_Ty
|
|||
{
|
||||
static Ivy_Eva_t pEvals[IVY_EVAL_LIMIT];
|
||||
Ivy_Eva_t * pEval, * pFan0, * pFan1;
|
||||
Ivy_Obj_t * pObj, * pTemp;
|
||||
Ivy_Obj_t * pObj = NULL; // Suppress "might be used uninitialized"
|
||||
Ivy_Obj_t * pTemp;
|
||||
int nEvals, nEvalsOld, i, k, x, nLeaves;
|
||||
unsigned uMaskAll;
|
||||
|
||||
|
|
@ -218,9 +219,14 @@ static inline int Ivy_MultiWeight( unsigned uMask, int nMaskOnes, unsigned uFoun
|
|||
int Ivy_MultiCover( Ivy_Man_t * p, Ivy_Eva_t * pEvals, int nLeaves, int nEvals, int nLimit, Vec_Ptr_t * vSols )
|
||||
{
|
||||
int fVerbose = 0;
|
||||
Ivy_Eva_t * pEval, * pEvalBest;
|
||||
Ivy_Eva_t * pEval;
|
||||
Ivy_Eva_t * pEvalBest = NULL; // Suppress "might be used uninitialized"
|
||||
unsigned uMaskAll, uFound, uTemp;
|
||||
int i, k, BestK, WeightBest, WeightCur, LevelBest, LevelCur;
|
||||
int i, k, BestK;
|
||||
int WeightBest = -1; // Suppress "might be used uninitialized"
|
||||
int WeightCur;
|
||||
int LevelBest = -1; // Suppress "might be used uninitialized"
|
||||
int LevelCur;
|
||||
uMaskAll = (nLeaves == 32)? (~(unsigned)0) : ((1 << nLeaves) - 1);
|
||||
uFound = 0;
|
||||
// solve the covering problem
|
||||
|
|
|
|||
|
|
@ -81,7 +81,7 @@ int Ivy_ManRewritePre( Ivy_Man_t * p, int fUpdateLevel, int fUseZeroCost, int fV
|
|||
break;
|
||||
// for each cut, try to resynthesize it
|
||||
nGain = Ivy_NodeRewrite( p, pManRwt, pNode, fUpdateLevel, fUseZeroCost );
|
||||
if ( nGain > 0 || nGain == 0 && fUseZeroCost )
|
||||
if ( nGain > 0 || (nGain == 0 && fUseZeroCost) )
|
||||
{
|
||||
Dec_Graph_t * pGraph = Rwt_ManReadDecs(pManRwt);
|
||||
int fCompl = Rwt_ManReadCompl(pManRwt);
|
||||
|
|
@ -122,7 +122,7 @@ Rwt_ManAddTimeTotal( pManRwt, clock() - clkStart );
|
|||
else
|
||||
Ivy_ManResetLevels( p );
|
||||
// check
|
||||
if ( i = Ivy_ManCleanup(p) )
|
||||
if ( (i = Ivy_ManCleanup(p)) )
|
||||
printf( "Cleanup after rewriting removed %d dangling nodes.\n", i );
|
||||
if ( !Ivy_ManCheck(p) )
|
||||
printf( "Ivy_ManRewritePre(): The check has failed.\n" );
|
||||
|
|
@ -154,9 +154,12 @@ int Ivy_NodeRewrite( Ivy_Man_t * pMan, Rwt_Man_t * p, Ivy_Obj_t * pNode, int fUp
|
|||
Ivy_Store_t * pStore;
|
||||
Ivy_Cut_t * pCut;
|
||||
Ivy_Obj_t * pFanin;
|
||||
unsigned uPhase, uTruthBest, uTruth;
|
||||
unsigned uPhase;
|
||||
unsigned uTruthBest = 0; // Suppress "might be used uninitialized"
|
||||
unsigned uTruth;
|
||||
char * pPerm;
|
||||
int Required, nNodesSaved, nNodesSaveCur;
|
||||
int Required, nNodesSaved;
|
||||
int nNodesSaveCur = -1; // Suppress "might be used uninitialized"
|
||||
int i, c, GainCur, GainBest = -1;
|
||||
int clk, clk2;
|
||||
|
||||
|
|
@ -190,14 +193,14 @@ clk = clock();
|
|||
clk2 = clock();
|
||||
uTruth = 0xFFFF & Ivy_NodeGetTruth( pNode, pCut->pArray, pCut->nSize ); // truth table
|
||||
p->timeTruth += clock() - clk2;
|
||||
pPerm = p->pPerms4[ p->pPerms[uTruth] ];
|
||||
pPerm = p->pPerms4[ (int) p->pPerms[uTruth] ];
|
||||
uPhase = p->pPhases[uTruth];
|
||||
// collect fanins with the corresponding permutation/phase
|
||||
Vec_PtrClear( p->vFaninsCur );
|
||||
Vec_PtrFill( p->vFaninsCur, (int)pCut->nSize, 0 );
|
||||
for ( i = 0; i < (int)pCut->nSize; i++ )
|
||||
{
|
||||
pFanin = Ivy_ManObj( pMan, pCut->pArray[pPerm[i]] );
|
||||
pFanin = Ivy_ManObj( pMan, pCut->pArray[(int)pPerm[i]] );
|
||||
assert( Ivy_ObjIsNode(pFanin) || Ivy_ObjIsCi(pFanin) );
|
||||
pFanin = Ivy_NotCond(pFanin, ((uPhase & (1<<i)) > 0) );
|
||||
Vec_PtrWriteEntry( p->vFaninsCur, i, pFanin );
|
||||
|
|
@ -355,7 +358,8 @@ unsigned Ivy_NodeGetTruth( Ivy_Obj_t * pObj, int * pNums, int nNums )
|
|||
Dec_Graph_t * Rwt_CutEvaluate( Ivy_Man_t * pMan, Rwt_Man_t * p, Ivy_Obj_t * pRoot, Vec_Ptr_t * vFaninsCur, int nNodesSaved, int LevelMax, int * pGainBest, unsigned uTruth )
|
||||
{
|
||||
Vec_Ptr_t * vSubgraphs;
|
||||
Dec_Graph_t * pGraphBest, * pGraphCur;
|
||||
Dec_Graph_t * pGraphBest = NULL; // Suppress "might be used uninitialized"
|
||||
Dec_Graph_t * pGraphCur;
|
||||
Rwt_Node_t * pNode, * pFanin;
|
||||
int nNodesAdded, GainBest, i, k;
|
||||
// find the matching class of subgraphs
|
||||
|
|
@ -478,7 +482,7 @@ int Ivy_GraphToNetworkCount( Ivy_Man_t * p, Ivy_Obj_t * pRoot, Dec_Graph_t * pGr
|
|||
Ivy_Obj_t * Ivy_GraphToNetwork( Ivy_Man_t * p, Dec_Graph_t * pGraph )
|
||||
{
|
||||
Ivy_Obj_t * pAnd0, * pAnd1;
|
||||
Dec_Node_t * pNode;
|
||||
Dec_Node_t * pNode = NULL; // Suppress "might be used uninitialized"
|
||||
int i;
|
||||
// check for constant function
|
||||
if ( Dec_GraphIsConst(pGraph) )
|
||||
|
|
|
|||
|
|
@ -91,7 +91,7 @@ int Ivy_ManRewriteSeq( Ivy_Man_t * p, int fUseZeroCost, int fVerbose )
|
|||
break;
|
||||
// for each cut, try to resynthesize it
|
||||
nGain = Ivy_NodeRewriteSeq( p, pManRwt, pNode, fUseZeroCost );
|
||||
if ( nGain > 0 || nGain == 0 && fUseZeroCost )
|
||||
if ( nGain > 0 || (nGain == 0 && fUseZeroCost) )
|
||||
{
|
||||
Dec_Graph_t * pGraph = Rwt_ManReadDecs(pManRwt);
|
||||
int fCompl = Rwt_ManReadCompl(pManRwt);
|
||||
|
|
@ -147,9 +147,12 @@ int Ivy_NodeRewriteSeq( Ivy_Man_t * pMan, Rwt_Man_t * p, Ivy_Obj_t * pNode, int
|
|||
Ivy_Cut_t * pCut;
|
||||
Ivy_Obj_t * pFanin;//, * pFanout;
|
||||
Vec_Ptr_t * vFanout;
|
||||
unsigned uPhase, uTruthBest, uTruth;//, nNewClauses;
|
||||
unsigned uPhase;
|
||||
unsigned uTruthBest = 0; // Suppress "might be used uninitialized"
|
||||
unsigned uTruth;//, nNewClauses;
|
||||
char * pPerm;
|
||||
int nNodesSaved, nNodesSaveCur;
|
||||
int nNodesSaved;
|
||||
int nNodesSaveCur = -1; // Suppress "might be used uninitialized"
|
||||
int i, c, GainCur, GainBest = -1;
|
||||
int clk, clk2;//, clk3;
|
||||
|
||||
|
|
@ -182,14 +185,14 @@ clk = clock();
|
|||
clk2 = clock();
|
||||
uTruth = 0xFFFF & Ivy_CutGetTruth( pMan, pNode, pCut->pArray, pCut->nSize ); // truth table
|
||||
p->timeTruth += clock() - clk2;
|
||||
pPerm = p->pPerms4[ p->pPerms[uTruth] ];
|
||||
pPerm = p->pPerms4[ (int)p->pPerms[uTruth] ];
|
||||
uPhase = p->pPhases[uTruth];
|
||||
// collect fanins with the corresponding permutation/phase
|
||||
Vec_PtrClear( p->vFaninsCur );
|
||||
Vec_PtrFill( p->vFaninsCur, (int)pCut->nSize, 0 );
|
||||
for ( i = 0; i < (int)pCut->nSize; i++ )
|
||||
{
|
||||
pFanin = Ivy_ManObj( pMan, Ivy_LeafId( pCut->pArray[pPerm[i]] ) );
|
||||
pFanin = Ivy_ManObj( pMan, Ivy_LeafId( pCut->pArray[(int)pPerm[i]] ) );
|
||||
assert( Ivy_ObjIsNode(pFanin) || Ivy_ObjIsCi(pFanin) || Ivy_ObjIsConst1(pFanin) );
|
||||
pFanin = Ivy_NotCond(pFanin, ((uPhase & (1<<i)) > 0) );
|
||||
Vec_PtrWriteEntry( p->vFaninsCur, i, pFanin );
|
||||
|
|
@ -305,7 +308,8 @@ p->timeRes += clock() - clk;
|
|||
Dec_Graph_t * Rwt_CutEvaluateSeq( Ivy_Man_t * pMan, Rwt_Man_t * p, Ivy_Obj_t * pRoot, Ivy_Cut_t * pCut, char * pPerm, Vec_Ptr_t * vFaninsCur, int nNodesSaved, int * pGainBest, unsigned uTruth )
|
||||
{
|
||||
Vec_Ptr_t * vSubgraphs;
|
||||
Dec_Graph_t * pGraphBest, * pGraphCur;
|
||||
Dec_Graph_t * pGraphBest = NULL; // Suppress "might be used uninitialized"
|
||||
Dec_Graph_t * pGraphCur;
|
||||
Rwt_Node_t * pNode;
|
||||
int nNodesAdded, GainBest, i;
|
||||
// find the matching class of subgraphs
|
||||
|
|
@ -364,7 +368,7 @@ void Ivy_GraphPrepare( Dec_Graph_t * pGraph, Ivy_Cut_t * pCut, Vec_Ptr_t * vFani
|
|||
Dec_GraphForEachLeaf( pGraph, pNode, i )
|
||||
{
|
||||
pNode->pFunc = Vec_PtrEntry( vFanins, i );
|
||||
pNode->nLat2 = Ivy_LeafLat( pCut->pArray[pPerm[i]] );
|
||||
pNode->nLat2 = Ivy_LeafLat( pCut->pArray[(int)pPerm[i]] );
|
||||
}
|
||||
// propagate latches through the nodes
|
||||
Dec_GraphForEachNode( pGraph, pNode, i )
|
||||
|
|
@ -470,7 +474,7 @@ int Ivy_GraphToNetworkSeqCountSeq( Ivy_Man_t * p, Ivy_Obj_t * pRoot, Dec_Graph_t
|
|||
Ivy_Obj_t * Ivy_GraphToNetworkSeq( Ivy_Man_t * p, Dec_Graph_t * pGraph )
|
||||
{
|
||||
Ivy_Obj_t * pAnd0, * pAnd1;
|
||||
Dec_Node_t * pNode;
|
||||
Dec_Node_t * pNode = NULL; // Suppress "might be used uninitialized"
|
||||
int i, k;
|
||||
// check for constant function
|
||||
if ( Dec_GraphIsConst(pGraph) )
|
||||
|
|
@ -1021,7 +1025,6 @@ Ivy_Store_t * Ivy_CutComputeForNode( Ivy_Man_t * p, Ivy_Obj_t * pObj, int nLeave
|
|||
{
|
||||
static Ivy_Store_t CutStore, * pCutStore = &CutStore;
|
||||
Ivy_Cut_t CutNew, * pCutNew = &CutNew, * pCut;
|
||||
Ivy_Man_t * pMan = p;
|
||||
Ivy_Obj_t * pLeaf;
|
||||
int i, k, Temp, nLats, iLeaf0, iLeaf1;
|
||||
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@ static void Ivy_WriteDotAig( Ivy_Man_t * pMan, char * pFileName, int fHaig, Vec_
|
|||
void Ivy_ManShow( Ivy_Man_t * pMan, int fHaig, Vec_Ptr_t * vBold )
|
||||
{
|
||||
extern void Abc_ShowFile( char * FileNameDot );
|
||||
static Counter = 0;
|
||||
static int Counter = 0;
|
||||
char FileNameDot[200];
|
||||
FILE * pFile;
|
||||
// create the file name
|
||||
|
|
|
|||
|
|
@ -176,8 +176,8 @@ struct cloudCacheEntry3 // the three-argument cache
|
|||
#define DD_P2 4256249
|
||||
#define DD_P3 741457
|
||||
#define DD_P4 1618033999
|
||||
#define cloudHashCudd2(f,g,s) ((((unsigned)(f) * DD_P1 + (unsigned)(g)) * DD_P2) >> (s))
|
||||
#define cloudHashCudd3(f,g,h,s) (((((unsigned)(f) * DD_P1 + (unsigned)(g)) * DD_P2 + (unsigned)(h)) * DD_P3) >> (s))
|
||||
#define cloudHashCudd2(f,g,s) ((((unsigned)(PORT_PTRUINT_T)(f) * DD_P1 + (unsigned)(PORT_PTRUINT_T)(g)) * DD_P2) >> (s))
|
||||
#define cloudHashCudd3(f,g,h,s) (((((unsigned)(PORT_PTRUINT_T)(f) * DD_P1 + (unsigned)(PORT_PTRUINT_T)(g)) * DD_P2 + (unsigned)(PORT_PTRUINT_T)(h)) * DD_P3) >> (s))
|
||||
|
||||
// node complementation (using node)
|
||||
#define Cloud_Regular(p) ((CloudNode*)(((PORT_PTRUINT_T)(p)) & ~01)) // get the regular node (w/o bubble)
|
||||
|
|
|
|||
|
|
@ -88,7 +88,7 @@ DdNode * Kit_SopToBdd( DdManager * dd, Kit_Sop_t * cSop, int nVars )
|
|||
DdNode * Kit_GraphToBdd( DdManager * dd, Kit_Graph_t * pGraph )
|
||||
{
|
||||
DdNode * bFunc, * bFunc0, * bFunc1;
|
||||
Kit_Node_t * pNode;
|
||||
Kit_Node_t * pNode = NULL; // Suppress "might be used uninitialized"
|
||||
int i;
|
||||
|
||||
// sanity checks
|
||||
|
|
|
|||
|
|
@ -304,14 +304,16 @@ unsigned * Kit_TruthCompose( CloudManager * dd, unsigned * pTruth, int nVars,
|
|||
void Kit_TruthCofSupports( Vec_Int_t * vBddDir, Vec_Int_t * vBddInv, int nVars, Vec_Int_t * vMemory, unsigned * puSupps )
|
||||
{
|
||||
Kit_Mux_t Mux;
|
||||
unsigned * puSuppAll, * pThis, * pFan0, * pFan1;
|
||||
unsigned * puSuppAll;
|
||||
unsigned * pThis = NULL; // Suppress "might be used uninitialized"
|
||||
unsigned * pFan0, * pFan1;
|
||||
int i, v, Var, Entry, nSupps;
|
||||
nSupps = 2 * nVars;
|
||||
|
||||
// extend storage
|
||||
if ( Vec_IntSize( vMemory ) < nSupps * Vec_IntSize(vBddDir) )
|
||||
Vec_IntGrow( vMemory, nSupps * Vec_IntSize(vBddDir) );
|
||||
puSuppAll = Vec_IntArray( vMemory );
|
||||
puSuppAll = (unsigned *)Vec_IntArray( vMemory );
|
||||
// clear storage for the const node
|
||||
memset( puSuppAll, 0, sizeof(unsigned) * nSupps );
|
||||
// compute supports from nodes
|
||||
|
|
@ -336,7 +338,7 @@ void Kit_TruthCofSupports( Vec_Int_t * vBddDir, Vec_Int_t * vBddInv, int nVars,
|
|||
// extend storage
|
||||
if ( Vec_IntSize( vMemory ) < nSupps * Vec_IntSize(vBddInv) )
|
||||
Vec_IntGrow( vMemory, nSupps * Vec_IntSize(vBddInv) );
|
||||
puSuppAll = Vec_IntArray( vMemory );
|
||||
puSuppAll = (unsigned *)Vec_IntArray( vMemory );
|
||||
// clear storage for the const node
|
||||
memset( puSuppAll, 0, sizeof(unsigned) * nSupps );
|
||||
// compute supports from nodes
|
||||
|
|
|
|||
|
|
@ -1018,7 +1018,7 @@ unsigned Kit_DsdNonDsdSupports( Kit_DsdNtk_t * pNtk )
|
|||
SeeAlso []
|
||||
|
||||
***********************************************************************/
|
||||
void Kit_DsdExpandCollectAnd_rec( Kit_DsdNtk_t * p, int iLit, int * piLitsNew, int * nLitsNew )
|
||||
void Kit_DsdExpandCollectAnd_rec( Kit_DsdNtk_t * p, unsigned iLit, unsigned * piLitsNew, int * nLitsNew )
|
||||
{
|
||||
Kit_DsdObj_t * pObj;
|
||||
unsigned i, iLitFanin;
|
||||
|
|
@ -1045,7 +1045,7 @@ void Kit_DsdExpandCollectAnd_rec( Kit_DsdNtk_t * p, int iLit, int * piLitsNew, i
|
|||
SeeAlso []
|
||||
|
||||
***********************************************************************/
|
||||
void Kit_DsdExpandCollectXor_rec( Kit_DsdNtk_t * p, int iLit, int * piLitsNew, int * nLitsNew )
|
||||
void Kit_DsdExpandCollectXor_rec( Kit_DsdNtk_t * p, unsigned iLit, unsigned * piLitsNew, int * nLitsNew )
|
||||
{
|
||||
Kit_DsdObj_t * pObj;
|
||||
unsigned i, iLitFanin;
|
||||
|
|
@ -1179,7 +1179,7 @@ Kit_DsdNtk_t * Kit_DsdExpand( Kit_DsdNtk_t * p )
|
|||
SeeAlso []
|
||||
|
||||
***********************************************************************/
|
||||
void Kit_DsdCompSort( int pPrios[], unsigned uSupps[], unsigned char * piLits, int nVars, int piLitsRes[] )
|
||||
void Kit_DsdCompSort( int pPrios[], unsigned uSupps[], unsigned char * piLits, int nVars, unsigned piLitsRes[] )
|
||||
{
|
||||
int nSuppSizes[16], Priority[16], pOrder[16];
|
||||
int i, k, iVarBest, SuppMax, PrioMax;
|
||||
|
|
@ -1236,7 +1236,8 @@ void Kit_DsdCompSort( int pPrios[], unsigned uSupps[], unsigned char * piLits, i
|
|||
***********************************************************************/
|
||||
int Kit_DsdShrink_rec( Kit_DsdNtk_t * pNew, Kit_DsdNtk_t * p, int iLit, int pPrios[] )
|
||||
{
|
||||
Kit_DsdObj_t * pObj, * pObjNew;
|
||||
Kit_DsdObj_t * pObj;
|
||||
Kit_DsdObj_t * pObjNew = NULL; // Suppress "might be used uninitialized"
|
||||
unsigned * pTruth, * pTruthNew;
|
||||
unsigned i, piLitsNew[16], uSupps[16];
|
||||
int iLitFanin, iLitNew;
|
||||
|
|
@ -2265,7 +2266,14 @@ int Kit_DsdCofactoringGetVars( Kit_DsdNtk_t ** ppNtk, int nSize, int * pVars )
|
|||
***********************************************************************/
|
||||
int Kit_DsdCofactoring( unsigned * pTruth, int nVars, int * pCofVars, int nLimit, int fVerbose )
|
||||
{
|
||||
Kit_DsdNtk_t * ppNtks[5][16] = {0}, * pTemp;
|
||||
Kit_DsdNtk_t * ppNtks[5][16] = {
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
|
||||
{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}
|
||||
};
|
||||
Kit_DsdNtk_t * pTemp;
|
||||
unsigned * ppCofs[5][16];
|
||||
int pTryVars[16], nTryVars;
|
||||
int nPrimeSizeMin, nPrimeSizeMax, nPrimeSizeCur;
|
||||
|
|
|
|||
|
|
@ -174,7 +174,9 @@ void Kit_SopDivideByCube( Kit_Sop_t * cSop, Kit_Sop_t * cDiv, Kit_Sop_t * vQuo,
|
|||
***********************************************************************/
|
||||
void Kit_SopDivideInternal( Kit_Sop_t * cSop, Kit_Sop_t * cDiv, Kit_Sop_t * vQuo, Kit_Sop_t * vRem, Vec_Int_t * vMemory )
|
||||
{
|
||||
unsigned uCube, uDiv, uCube2, uDiv2, uQuo;
|
||||
unsigned uCube, uDiv;
|
||||
unsigned uCube2 = 0; // Suppress "might be used uninitialized"
|
||||
unsigned uDiv2, uQuo;
|
||||
int i, i2, k, k2, nCubesRem;
|
||||
assert( Kit_SopCubeNum(cSop) >= Kit_SopCubeNum(cDiv) );
|
||||
// consider special case
|
||||
|
|
|
|||
|
|
@ -198,7 +198,6 @@ int Mfx_Perform( Nwk_Man_t * pNtk, Mfx_Par_t * pPars, If_Lib_t * pLutLib )
|
|||
Bdc_Par_t Pars = {0}, * pDecPars = &Pars;
|
||||
Bar_Progress_t * pProgress;
|
||||
Mfx_Man_t * p;
|
||||
Tim_Man_t * pManTimeOld = NULL;
|
||||
Nwk_Obj_t * pObj;
|
||||
Vec_Vec_t * vLevels;
|
||||
Vec_Ptr_t * vNodes;
|
||||
|
|
|
|||
|
|
@ -106,7 +106,7 @@ int Ntl_ModelCheck( Ntl_Mod_t * pModel, int fMain )
|
|||
{
|
||||
if ( Ntl_ModelLatchNum(pModel) > 0 )
|
||||
{
|
||||
printf( "Root level model has %d registers.\n", pModel->pName, Ntl_ModelLatchNum(pModel) );
|
||||
printf( "Root level model %s has %d registers.\n", pModel->pName, Ntl_ModelLatchNum(pModel) );
|
||||
fStatus = 0;
|
||||
}
|
||||
goto checkobjs;
|
||||
|
|
|
|||
|
|
@ -85,7 +85,7 @@ Aig_Obj_t * Ntl_ConvertSopToAigInternal( Aig_Man_t * pMan, Ntl_Obj_t * pNode, ch
|
|||
***********************************************************************/
|
||||
Aig_Obj_t * Ntl_GraphToNetworkAig( Aig_Man_t * pMan, Dec_Graph_t * pGraph )
|
||||
{
|
||||
Dec_Node_t * pNode;
|
||||
Dec_Node_t * pNode = NULL; // Suppress "might be used uninitialized"
|
||||
Aig_Obj_t * pAnd0, * pAnd1;
|
||||
int i;
|
||||
// check for constant function
|
||||
|
|
@ -526,15 +526,16 @@ Aig_Man_t * Ntl_ManCollapse( Ntl_Man_t * p, int fSeq )
|
|||
}
|
||||
nTruePis = Aig_ManPiNum(p->pAig);
|
||||
// create inputs of seq boxes
|
||||
if ( fSeq )
|
||||
Ntl_ModelForEachBox( pRoot, pBox, i )
|
||||
{
|
||||
if ( !(Ntl_BoxIsSeq(pBox) && Ntl_BoxIsWhite(pBox)) )
|
||||
continue;
|
||||
Vec_IntPush( p->vBox1Cios, Aig_ManPiNum(p->pAig) );
|
||||
Ntl_ManCollapseBoxSeq1_rec( p, pBox, fSeq );
|
||||
Ntl_ObjForEachFanout( pBox, pNet, k )
|
||||
pNet->nVisits = 2;
|
||||
if ( fSeq ) {
|
||||
Ntl_ModelForEachBox( pRoot, pBox, i )
|
||||
{
|
||||
if ( !(Ntl_BoxIsSeq(pBox) && Ntl_BoxIsWhite(pBox)) )
|
||||
continue;
|
||||
Vec_IntPush( p->vBox1Cios, Aig_ManPiNum(p->pAig) );
|
||||
Ntl_ManCollapseBoxSeq1_rec( p, pBox, fSeq );
|
||||
Ntl_ObjForEachFanout( pBox, pNet, k )
|
||||
pNet->nVisits = 2;
|
||||
}
|
||||
}
|
||||
// derive the outputs
|
||||
Ntl_ManForEachCoNet( p, pNet, i )
|
||||
|
|
@ -548,18 +549,19 @@ Aig_Man_t * Ntl_ManCollapse( Ntl_Man_t * p, int fSeq )
|
|||
}
|
||||
nTruePos = Aig_ManPoNum(p->pAig);
|
||||
// create outputs of seq boxes
|
||||
if ( fSeq )
|
||||
Ntl_ModelForEachBox( pRoot, pBox, i )
|
||||
{
|
||||
if ( !(Ntl_BoxIsSeq(pBox) && Ntl_BoxIsWhite(pBox)) )
|
||||
continue;
|
||||
Ntl_ObjForEachFanin( pBox, pNet, k )
|
||||
if ( !Ntl_ManCollapse_rec( p, pNet, fSeq ) )
|
||||
{
|
||||
printf( "Ntl_ManCollapse(): Error: Combinational loop is detected.\n" );
|
||||
return 0;
|
||||
}
|
||||
Ntl_ManCollapseBoxSeq2_rec( p, pBox, fSeq, Vec_IntEntry(p->vBox1Cios, iBox++) );
|
||||
if ( fSeq ) {
|
||||
Ntl_ModelForEachBox( pRoot, pBox, i )
|
||||
{
|
||||
if ( !(Ntl_BoxIsSeq(pBox) && Ntl_BoxIsWhite(pBox)) )
|
||||
continue;
|
||||
Ntl_ObjForEachFanin( pBox, pNet, k )
|
||||
if ( !Ntl_ManCollapse_rec( p, pNet, fSeq ) )
|
||||
{
|
||||
printf( "Ntl_ManCollapse(): Error: Combinational loop is detected.\n" );
|
||||
return 0;
|
||||
}
|
||||
Ntl_ManCollapseBoxSeq2_rec( p, pBox, fSeq, Vec_IntEntry(p->vBox1Cios, iBox++) );
|
||||
}
|
||||
}
|
||||
// make sure registers are added correctly
|
||||
if ( Aig_ManPiNum(p->pAig) - nTruePis != Aig_ManPoNum(p->pAig) - nTruePos )
|
||||
|
|
|
|||
|
|
@ -177,7 +177,7 @@ Ntl_Obj_t * Ntl_ModelCreateBox( Ntl_Mod_t * pModel, int nFanins, int nFanouts )
|
|||
***********************************************************************/
|
||||
Ntl_Obj_t * Ntl_ModelDupObj( Ntl_Mod_t * pModel, Ntl_Obj_t * pOld )
|
||||
{
|
||||
Ntl_Obj_t * pNew;
|
||||
Ntl_Obj_t * pNew = NULL; // Supprses "might be used uninitialized"
|
||||
if ( Ntl_ObjIsPi( pOld ) )
|
||||
pNew = Ntl_ModelCreatePi( pModel );
|
||||
else if ( Ntl_ObjIsPo( pOld ) )
|
||||
|
|
|
|||
|
|
@ -18,8 +18,10 @@
|
|||
|
||||
***********************************************************************/
|
||||
|
||||
// The code in this file is developed in collaboration with Mark Jarvin of Toronto.
|
||||
|
||||
#include "ntl.h"
|
||||
#include <bzlib.h>
|
||||
#include "bzlib.h"
|
||||
|
||||
////////////////////////////////////////////////////////////////////////
|
||||
/// DECLARATIONS ///
|
||||
|
|
@ -803,7 +805,7 @@ static int Ioa_ReadParseLineModel( Ioa_ReadMod_t * p, char * pLine )
|
|||
p->pNtk = Ntl_ModelAlloc( p->pMan->pDesign, Vec_PtrEntry(vTokens, 1) );
|
||||
if ( p->pNtk == NULL )
|
||||
{
|
||||
sprintf( p->pMan->sError, "Line %d: Model %s already exists.", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens, 1) );
|
||||
sprintf( p->pMan->sError, "Line %d: Model %s already exists.", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
|
|
@ -961,7 +963,7 @@ static int Ioa_ReadParseLineLatch( Ioa_ReadMod_t * p, char * pLine )
|
|||
pObj->LatchId.regInit = 2;
|
||||
if ( pObj->LatchId.regInit < 0 || pObj->LatchId.regInit > 2 )
|
||||
{
|
||||
sprintf( p->pMan->sError, "Line %d: Initial state of the latch is incorrect \"%s\".", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens,3) );
|
||||
sprintf( p->pMan->sError, "Line %d: Initial state of the latch is incorrect \"%s\".", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens,3) );
|
||||
return 0;
|
||||
}
|
||||
// get the register class
|
||||
|
|
@ -988,7 +990,7 @@ static int Ioa_ReadParseLineLatch( Ioa_ReadMod_t * p, char * pLine )
|
|||
}
|
||||
if ( pObj->LatchId.regClass < 0 || pObj->LatchId.regClass > (1<<24) )
|
||||
{
|
||||
sprintf( p->pMan->sError, "Line %d: Class of the latch is incorrect \"%s\".", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens,3) );
|
||||
sprintf( p->pMan->sError, "Line %d: Class of the latch is incorrect \"%s\".", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens,3) );
|
||||
return 0;
|
||||
}
|
||||
// get the clock
|
||||
|
|
@ -1134,7 +1136,7 @@ static int Ioa_ReadParseLineDelay( Ioa_ReadMod_t * p, char * pLine )
|
|||
Delay = atof( pTokenNum );
|
||||
if ( Delay == 0.0 && pTokenNum[0] != '0' )
|
||||
{
|
||||
sprintf( p->pMan->sError, "Line %d: Delay value (%s) appears to be invalid.", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntryLast(vTokens) );
|
||||
sprintf( p->pMan->sError, "Line %d: Delay value (%s) appears to be invalid.", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntryLast(vTokens) );
|
||||
return 0;
|
||||
}
|
||||
// find the PI/PO numbers
|
||||
|
|
@ -1144,7 +1146,7 @@ static int Ioa_ReadParseLineDelay( Ioa_ReadMod_t * p, char * pLine )
|
|||
RetValue1 = Ntl_ModelFindPioNumber( p->pNtk, 0, 0, Vec_PtrEntry(vTokens, 1), &Number1 );
|
||||
if ( RetValue1 == 0 )
|
||||
{
|
||||
sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs/POs.", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens, 1) );
|
||||
sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs/POs.", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
|
@ -1154,14 +1156,14 @@ static int Ioa_ReadParseLineDelay( Ioa_ReadMod_t * p, char * pLine )
|
|||
RetValue2 = Ntl_ModelFindPioNumber( p->pNtk, 0, 0, Vec_PtrEntry(vTokens, 2), &Number2 );
|
||||
if ( RetValue2 == 0 )
|
||||
{
|
||||
sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs/POs.", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens, 2) );
|
||||
sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs/POs.", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 2) );
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
if ( RetValue1 == RetValue2 && RetValue1 )
|
||||
{
|
||||
sprintf( p->pMan->sError, "Line %d: Both signals \"%s\" and \"%s\" listed appear to be PIs or POs.",
|
||||
Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens, 1), Vec_PtrEntry(vTokens, 2) );
|
||||
Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1), (char*)Vec_PtrEntry(vTokens, 2) );
|
||||
return 0;
|
||||
}
|
||||
if ( RetValue2 < RetValue1 )
|
||||
|
|
@ -1219,7 +1221,7 @@ static int Ioa_ReadParseLineTimes( Ioa_ReadMod_t * p, char * pLine, int fOutput
|
|||
Delay = atof( pTokenNum );
|
||||
if ( Delay == 0.0 && pTokenNum[0] != '0' )
|
||||
{
|
||||
sprintf( p->pMan->sError, "Line %d: Delay value (%s) appears to be invalid.", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntryLast(vTokens) );
|
||||
sprintf( p->pMan->sError, "Line %d: Delay value (%s) appears to be invalid.", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntryLast(vTokens) );
|
||||
return 0;
|
||||
}
|
||||
// find the PI/PO numbers
|
||||
|
|
@ -1230,7 +1232,7 @@ static int Ioa_ReadParseLineTimes( Ioa_ReadMod_t * p, char * pLine, int fOutput
|
|||
RetValue = Ntl_ModelFindPioNumber( p->pNtk, 0, 1, Vec_PtrEntry(vTokens, 1), &Number );
|
||||
if ( RetValue == 0 )
|
||||
{
|
||||
sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among POs.", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens, 1) );
|
||||
sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among POs.", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
|
@ -1247,7 +1249,7 @@ static int Ioa_ReadParseLineTimes( Ioa_ReadMod_t * p, char * pLine, int fOutput
|
|||
RetValue = Ntl_ModelFindPioNumber( p->pNtk, 1, 0, Vec_PtrEntry(vTokens, 1), &Number );
|
||||
if ( RetValue == 0 )
|
||||
{
|
||||
sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs.", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens, 1) );
|
||||
sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs.", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -91,20 +91,21 @@ void Ntl_ManUnpackLeafTiming( Ntl_Man_t * p, Tim_Man_t * pMan )
|
|||
pNet->dTemp = 0;
|
||||
// store the PI timing
|
||||
vTimes = pRoot->vTimeInputs;
|
||||
if ( vTimes )
|
||||
Vec_IntForEachEntry( vTimes, Entry, i )
|
||||
{
|
||||
dTime = Aig_Int2Float( Vec_IntEntry(vTimes,++i) );
|
||||
if ( Entry == -1 )
|
||||
{
|
||||
Ntl_ModelForEachPi( pRoot, pObj, v )
|
||||
Ntl_ObjFanout0(pObj)->dTemp = dTime;
|
||||
}
|
||||
else
|
||||
{
|
||||
pObj = Ntl_ModelPi( pRoot, Entry );
|
||||
Ntl_ObjFanout0(pObj)->dTemp = dTime;
|
||||
}
|
||||
if ( vTimes ) {
|
||||
Vec_IntForEachEntry( vTimes, Entry, i )
|
||||
{
|
||||
dTime = Aig_Int2Float( Vec_IntEntry(vTimes,++i) );
|
||||
if ( Entry == -1 )
|
||||
{
|
||||
Ntl_ModelForEachPi( pRoot, pObj, v )
|
||||
Ntl_ObjFanout0(pObj)->dTemp = dTime;
|
||||
}
|
||||
else
|
||||
{
|
||||
pObj = Ntl_ModelPi( pRoot, Entry );
|
||||
Ntl_ObjFanout0(pObj)->dTemp = dTime;
|
||||
}
|
||||
}
|
||||
}
|
||||
// store box timing
|
||||
Ntl_ModelForEachMapLeaf( pRoot, pObj, k )
|
||||
|
|
|
|||
|
|
@ -18,10 +18,12 @@
|
|||
|
||||
***********************************************************************/
|
||||
|
||||
// The code in this file is developed in collaboration with Mark Jarvin of Toronto.
|
||||
|
||||
#include "ntl.h"
|
||||
#include "ioa.h"
|
||||
|
||||
#include <bzlib.h>
|
||||
#include "bzlib.h"
|
||||
#include <stdarg.h>
|
||||
|
||||
#ifdef _WIN32
|
||||
|
|
|
|||
|
|
@ -232,7 +232,7 @@ void Nwk_ObjPatchFanin( Nwk_Obj_t * pObj, Nwk_Obj_t * pFaninOld, Nwk_Obj_t * pFa
|
|||
if ( iFanin == -1 )
|
||||
{
|
||||
printf( "Nwk_ObjPatchFanin(); Error! Node %d is not among", pFaninOld->Id );
|
||||
printf( " the fanins of node %s...\n", pObj->Id );
|
||||
printf( " the fanins of node %d...\n", pObj->Id );
|
||||
return;
|
||||
}
|
||||
pObj->pFanio[iFanin] = pFaninNew;
|
||||
|
|
|
|||
|
|
@ -78,7 +78,7 @@ static inline void Nwk_ObjSetVisitedTop( Nwk_Obj_t * pObj )
|
|||
else
|
||||
assert( 0 );
|
||||
}
|
||||
static inline Nwk_ManIncrementTravIdFlow( Nwk_Man_t * pMan )
|
||||
static inline void Nwk_ManIncrementTravIdFlow( Nwk_Man_t * pMan )
|
||||
{
|
||||
Nwk_ManIncrementTravId( pMan );
|
||||
Nwk_ManIncrementTravId( pMan );
|
||||
|
|
|
|||
|
|
@ -140,11 +140,11 @@ int Nwk_ManCompareAndSaveBest( Nwk_Man_t * pNtk, void * pNtl )
|
|||
ParsNew.nPis = Nwk_ManPiNum( pNtk );
|
||||
ParsNew.nPos = Nwk_ManPoNum( pNtk );
|
||||
// reset the parameters if the network has the same name
|
||||
if ( ParsBest.pName == NULL ||
|
||||
strcmp(ParsBest.pName, pNtk->pName) ||
|
||||
ParsBest.Depth > ParsNew.Depth ||
|
||||
ParsBest.Depth == ParsNew.Depth && ParsBest.Flops > ParsNew.Flops ||
|
||||
ParsBest.Depth == ParsNew.Depth && ParsBest.Flops == ParsNew.Flops && ParsBest.Nodes > ParsNew.Nodes )
|
||||
if ( ParsBest.pName == NULL ||
|
||||
strcmp(ParsBest.pName, pNtk->pName) ||
|
||||
ParsBest.Depth > ParsNew.Depth ||
|
||||
(ParsBest.Depth == ParsNew.Depth && ParsBest.Flops > ParsNew.Flops) ||
|
||||
(ParsBest.Depth == ParsNew.Depth && ParsBest.Flops == ParsNew.Flops && ParsBest.Nodes > ParsNew.Nodes) )
|
||||
{
|
||||
FREE( ParsBest.pName );
|
||||
ParsBest.pName = Aig_UtilStrsav( pNtk->pName );
|
||||
|
|
|
|||
|
|
@ -221,8 +221,8 @@ Aig_Man_t * Nwk_ManSpeedup( Nwk_Man_t * pNtk, int fUseLutLib, int Percentage, in
|
|||
printf( "\n" );
|
||||
}
|
||||
// mark the timing critical nodes and edges
|
||||
puTCEdges = ALLOC( int, Nwk_ManObjNumMax(pNtk) );
|
||||
memset( puTCEdges, 0, sizeof(int) * Nwk_ManObjNumMax(pNtk) );
|
||||
puTCEdges = ALLOC( unsigned, Nwk_ManObjNumMax(pNtk) );
|
||||
memset( puTCEdges, 0, sizeof(unsigned) * Nwk_ManObjNumMax(pNtk) );
|
||||
Nwk_ManForEachNode( pNtk, pNode, i )
|
||||
{
|
||||
if ( Nwk_ObjSlack(pNode) >= tDelta )
|
||||
|
|
|
|||
|
|
@ -264,7 +264,8 @@ float Nwk_NodePropagateRequired( Nwk_Obj_t * pObj, int fUseSorting )
|
|||
int pPinPerm[32];
|
||||
float pPinDelays[32];
|
||||
Nwk_Obj_t * pFanin;
|
||||
float tRequired, * pDelays;
|
||||
float tRequired = 0.0; // Suppress "might be used uninitialized"
|
||||
float * pDelays;
|
||||
int k;
|
||||
assert( Nwk_ObjIsNode(pObj) );
|
||||
if ( pLutLib == NULL )
|
||||
|
|
@ -557,10 +558,10 @@ void Nwk_NodeUpdateAddToQueue( Vec_Ptr_t * vQueue, Nwk_Obj_t * pObj, int iCurren
|
|||
***********************************************************************/
|
||||
void Nwk_NodeUpdateArrival( Nwk_Obj_t * pObj )
|
||||
{
|
||||
If_Lib_t * pLutLib = pObj->pMan->pLutLib;
|
||||
Tim_Man_t * pManTime = pObj->pMan->pManTime;
|
||||
Vec_Ptr_t * vQueue = pObj->pMan->vTemp;
|
||||
Nwk_Obj_t * pTemp, * pNext;
|
||||
Nwk_Obj_t * pTemp;
|
||||
Nwk_Obj_t * pNext = NULL; // Suppress "might be used uninitialized"
|
||||
float tArrival;
|
||||
int iCur, k, iBox, iTerm1, nTerms;
|
||||
assert( Nwk_ObjIsNode(pObj) );
|
||||
|
|
@ -636,10 +637,10 @@ void Nwk_NodeUpdateArrival( Nwk_Obj_t * pObj )
|
|||
***********************************************************************/
|
||||
void Nwk_NodeUpdateRequired( Nwk_Obj_t * pObj )
|
||||
{
|
||||
If_Lib_t * pLutLib = pObj->pMan->pLutLib;
|
||||
Tim_Man_t * pManTime = pObj->pMan->pManTime;
|
||||
Vec_Ptr_t * vQueue = pObj->pMan->vTemp;
|
||||
Nwk_Obj_t * pTemp, * pNext;
|
||||
Nwk_Obj_t * pTemp;
|
||||
Nwk_Obj_t * pNext = NULL; // Suppress "might be used uninitialized"
|
||||
float tRequired;
|
||||
int iCur, k, iBox, iTerm1, nTerms;
|
||||
assert( Nwk_ObjIsNode(pObj) );
|
||||
|
|
@ -763,7 +764,8 @@ void Nwk_ManUpdateLevel( Nwk_Obj_t * pObj )
|
|||
{
|
||||
Tim_Man_t * pManTime = pObj->pMan->pManTime;
|
||||
Vec_Ptr_t * vQueue = pObj->pMan->vTemp;
|
||||
Nwk_Obj_t * pTemp, * pNext;
|
||||
Nwk_Obj_t * pTemp;
|
||||
Nwk_Obj_t * pNext = NULL; // Suppress "might be used uninitialized"
|
||||
int LevelNew, iCur, k, iBox, iTerm1, nTerms;
|
||||
assert( Nwk_ObjIsNode(pObj) );
|
||||
// initialize the queue with the node
|
||||
|
|
|
|||
|
|
@ -261,7 +261,7 @@ void Nwk_ManDumpBlif( Nwk_Man_t * pNtk, char * pFileName, Vec_Ptr_t * vPiNames,
|
|||
Aig_MmFlex_t * pMem;
|
||||
char * pSop = NULL;
|
||||
unsigned * pTruth;
|
||||
int i, k, nDigits, Counter = 0;
|
||||
int i, k, nDigits;
|
||||
if ( Nwk_ManPoNum(pNtk) == 0 )
|
||||
{
|
||||
printf( "Nwk_ManDumpBlif(): Network does not have POs.\n" );
|
||||
|
|
@ -278,7 +278,7 @@ void Nwk_ManDumpBlif( Nwk_Man_t * pNtk, char * pFileName, Vec_Ptr_t * vPiNames,
|
|||
fprintf( pFile, ".inputs" );
|
||||
Nwk_ManForEachCi( pNtk, pObj, i )
|
||||
if ( vPiNames )
|
||||
fprintf( pFile, " %s", Vec_PtrEntry(vPiNames, i) );
|
||||
fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, i) );
|
||||
else
|
||||
fprintf( pFile, " n%0*d", nDigits, pObj->Id );
|
||||
fprintf( pFile, "\n" );
|
||||
|
|
@ -286,7 +286,7 @@ void Nwk_ManDumpBlif( Nwk_Man_t * pNtk, char * pFileName, Vec_Ptr_t * vPiNames,
|
|||
fprintf( pFile, ".outputs" );
|
||||
Nwk_ManForEachCo( pNtk, pObj, i )
|
||||
if ( vPoNames )
|
||||
fprintf( pFile, " %s", Vec_PtrEntry(vPoNames, i) );
|
||||
fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPoNames, i) );
|
||||
else
|
||||
fprintf( pFile, " n%0*d", nDigits, pObj->Id );
|
||||
fprintf( pFile, "\n" );
|
||||
|
|
@ -310,7 +310,7 @@ void Nwk_ManDumpBlif( Nwk_Man_t * pNtk, char * pFileName, Vec_Ptr_t * vPiNames,
|
|||
{
|
||||
Nwk_ObjForEachFanin( pObj, pFanin, k )
|
||||
if ( vPiNames && Nwk_ObjIsPi(pFanin) )
|
||||
fprintf( pFile, " %s", Vec_PtrEntry(vPiNames, Nwk_ObjPioNum(pFanin)) );
|
||||
fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Nwk_ObjPioNum(pFanin)) );
|
||||
else
|
||||
fprintf( pFile, " n%0*d", nDigits, pFanin->Id );
|
||||
}
|
||||
|
|
@ -327,11 +327,11 @@ void Nwk_ManDumpBlif( Nwk_Man_t * pNtk, char * pFileName, Vec_Ptr_t * vPiNames,
|
|||
{
|
||||
fprintf( pFile, ".names" );
|
||||
if ( vPiNames && Nwk_ObjIsPi(Nwk_ObjFanin0(pObj)) )
|
||||
fprintf( pFile, " %s", Vec_PtrEntry(vPiNames, Nwk_ObjPioNum(Nwk_ObjFanin0(pObj))) );
|
||||
fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Nwk_ObjPioNum(Nwk_ObjFanin0(pObj))) );
|
||||
else
|
||||
fprintf( pFile, " n%0*d", nDigits, Nwk_ObjFanin0(pObj)->Id );
|
||||
if ( vPoNames )
|
||||
fprintf( pFile, " %s\n", Vec_PtrEntry(vPoNames, Nwk_ObjPioNum(pObj)) );
|
||||
fprintf( pFile, " %s\n", (char*)Vec_PtrEntry(vPoNames, Nwk_ObjPioNum(pObj)) );
|
||||
else
|
||||
fprintf( pFile, " n%0*d\n", nDigits, pObj->Id );
|
||||
fprintf( pFile, "%d 1\n", !pObj->fInvert );
|
||||
|
|
|
|||
|
|
@ -60,7 +60,7 @@ void Rwt_ManPreprocess( Rwt_Man_t * p )
|
|||
for ( pNode = p->pTable[i]; pNode; pNode = pNode->pNext )
|
||||
{
|
||||
assert( pNode->uTruth == p->pTable[i]->uTruth );
|
||||
assert( p->pMap[pNode->uTruth] >= 0 && p->pMap[pNode->uTruth] < 222 );
|
||||
assert( p->pMap[pNode->uTruth] < 222 ); // Always >= 0 b/c unsigned.
|
||||
Vec_VecPush( p->vClasses, p->pMap[pNode->uTruth], pNode );
|
||||
p->pMapInv[ p->pMap[pNode->uTruth] ] = p->puCanons[pNode->uTruth];
|
||||
}
|
||||
|
|
|
|||
|
|
@ -151,7 +151,8 @@ Aig_Man_t * Saig_ManDuplicated( Aig_Man_t * p )
|
|||
Aig_Man_t * Saig_ManTransformed( Aig_Man_t * p )
|
||||
{
|
||||
Aig_Man_t * pNew;
|
||||
Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pCtrl;
|
||||
Aig_Obj_t * pObj, * pObjLi, * pObjLo;
|
||||
Aig_Obj_t * pCtrl = NULL; // Suppress "might be used uninitialized"
|
||||
int i;
|
||||
assert( Aig_ManRegNum(p) > 0 );
|
||||
// create the new manager
|
||||
|
|
@ -583,12 +584,6 @@ p->timeCnf += clock() - clk;
|
|||
printf( " I = %2d. Bmc =%3d. IntAnd =%6d. IntLev =%5d. Conf =%6d. ",
|
||||
i+1, i + 1 + p->nFrames, Aig_ManNodeNum(p->pInter), Aig_ManLevelNum(p->pInter), p->nConfCur );
|
||||
PRT( "Time", clock() - clk );
|
||||
if ( Aig_ManNodeNum(p->pInter) == 0 )
|
||||
{
|
||||
Aig_Obj_t * pObj = Aig_ManPo(p->pInter, 0);
|
||||
Aig_Obj_t * pObjR = Aig_Regular(pObj);
|
||||
int x = 0;
|
||||
}
|
||||
}
|
||||
if ( RetValue == 0 ) // found a (spurious?) counter-example
|
||||
{
|
||||
|
|
|
|||
|
|
@ -150,13 +150,14 @@ int Saig_ManRetimeUnsatCore( Aig_Man_t * p, int fVerbose )
|
|||
printf( "\n" );
|
||||
}
|
||||
// collect the nodes
|
||||
if ( fVeryVerbose )
|
||||
Aig_ManForEachObj( p, pObj, i )
|
||||
if ( pCnf->pVarNums[pObj->Id] >= 0 && pVars[ pCnf->pVarNums[pObj->Id] ] == 1 )
|
||||
{
|
||||
Aig_ObjPrint( p, pObj );
|
||||
printf( "\n" );
|
||||
}
|
||||
if ( fVeryVerbose ) {
|
||||
Aig_ManForEachObj( p, pObj, i )
|
||||
if ( pCnf->pVarNums[pObj->Id] >= 0 && pVars[ pCnf->pVarNums[pObj->Id] ] == 1 )
|
||||
{
|
||||
Aig_ObjPrint( p, pObj );
|
||||
printf( "\n" );
|
||||
}
|
||||
}
|
||||
// pick the first PO in the list
|
||||
nPos = 0;
|
||||
iBadPo = -1;
|
||||
|
|
|
|||
|
|
@ -82,7 +82,7 @@ void Saig_ManReportUselessRegisters( Aig_Man_t * pAig )
|
|||
int Saig_ManReportComplements( Aig_Man_t * p )
|
||||
{
|
||||
Aig_Obj_t * pObj, * pFanin;
|
||||
int i, Counter = 0, Diffs = 0;
|
||||
int i, Counter = 0;
|
||||
assert( Aig_ManRegNum(p) > 0 );
|
||||
Aig_ManForEachObj( p, pObj, i )
|
||||
assert( !pObj->fMarkA );
|
||||
|
|
|
|||
|
|
@ -375,7 +375,7 @@ Aig_Man_t * Saig_ManTimeframeSimplify( Aig_Man_t * pAig, int nFrames, int nFrame
|
|||
{
|
||||
extern Aig_Man_t * Fra_FraigEquivence( Aig_Man_t * pManAig, int nConfMax, int fProve );
|
||||
Aig_Man_t * pFrames, * pFraig, * pRes1, * pRes2;
|
||||
int clk, clkTotal = clock();
|
||||
int clk;
|
||||
// create uninitialized timeframes with map1
|
||||
pFrames = Saig_ManFramesNonInitial( pAig, nFrames );
|
||||
// perform fraiging for the unrolled timeframes
|
||||
|
|
|
|||
|
|
@ -439,10 +439,10 @@ static inline bool Abc_LatchIsInitNone( Abc_Obj_t * pLatch ) { assert(Ab
|
|||
static inline bool Abc_LatchIsInit0( Abc_Obj_t * pLatch ) { assert(Abc_ObjIsLatch(pLatch)); return pLatch->pData == (void *)ABC_INIT_ZERO; }
|
||||
static inline bool Abc_LatchIsInit1( Abc_Obj_t * pLatch ) { assert(Abc_ObjIsLatch(pLatch)); return pLatch->pData == (void *)ABC_INIT_ONE; }
|
||||
static inline bool Abc_LatchIsInitDc( Abc_Obj_t * pLatch ) { assert(Abc_ObjIsLatch(pLatch)); return pLatch->pData == (void *)ABC_INIT_DC; }
|
||||
static inline int Abc_LatchInit( Abc_Obj_t * pLatch ) { assert(Abc_ObjIsLatch(pLatch)); return (int)pLatch->pData; }
|
||||
static inline int Abc_LatchInit( Abc_Obj_t * pLatch ) { assert(Abc_ObjIsLatch(pLatch)); return (int)(PORT_PTRINT_T)pLatch->pData; }
|
||||
|
||||
// global BDDs of the nodes
|
||||
static inline void * Abc_NtkGlobalBdd( Abc_Ntk_t * pNtk ) { return (void *)Vec_PtrEntry(pNtk->vAttrs, VEC_ATTR_GLOBAL_BDD); }
|
||||
static inline void * Abc_NtkGlobalBdd( Abc_Ntk_t * pNtk ) { return (void *)Vec_PtrEntry(pNtk->vAttrs, VEC_ATTR_GLOBAL_BDD); }
|
||||
static inline DdManager * Abc_NtkGlobalBddMan( Abc_Ntk_t * pNtk ) { return (DdManager *)Vec_AttMan( (Vec_Att_t *)Abc_NtkGlobalBdd(pNtk) ); }
|
||||
static inline DdNode ** Abc_NtkGlobalBddArray( Abc_Ntk_t * pNtk ) { return (DdNode **)Vec_AttArray( (Vec_Att_t *)Abc_NtkGlobalBdd(pNtk) ); }
|
||||
static inline DdNode * Abc_ObjGlobalBdd( Abc_Obj_t * pObj ) { return (DdNode *)Vec_AttEntry( (Vec_Att_t *)Abc_NtkGlobalBdd(pObj->pNtk), pObj->Id ); }
|
||||
|
|
|
|||
|
|
@ -43,7 +43,7 @@ void Abc_NtkStartMvVars( Abc_Ntk_t * pNtk )
|
|||
{
|
||||
Vec_Att_t * pAttMan;
|
||||
assert( Abc_NtkMvVar(pNtk) == NULL );
|
||||
pAttMan = Vec_AttAlloc( 0, Abc_NtkObjNumMax(pNtk) + 1, Extra_MmFlexStart(), Extra_MmFlexStop, NULL, NULL );
|
||||
pAttMan = Vec_AttAlloc( Abc_NtkObjNumMax(pNtk) + 1, Extra_MmFlexStart(), (void(*)(void*))Extra_MmFlexStop, NULL, NULL );
|
||||
Vec_PtrWriteEntry( pNtk->vAttrs, VEC_ATTR_MVVAR, pAttMan );
|
||||
//printf( "allocing attr\n" );
|
||||
}
|
||||
|
|
|
|||
|
|
@ -234,7 +234,7 @@ bool Abc_NtkDoCheck( Abc_Ntk_t * pNtk )
|
|||
***********************************************************************/
|
||||
bool Abc_NtkCheckNames( Abc_Ntk_t * pNtk )
|
||||
{
|
||||
Abc_Obj_t * pObj;
|
||||
Abc_Obj_t * pObj = NULL; // Ensure pObj isn't used uninitialized.
|
||||
Vec_Int_t * vNameIds;
|
||||
char * pName;
|
||||
int i, NameId;
|
||||
|
|
@ -262,6 +262,8 @@ bool Abc_NtkCheckNames( Abc_Ntk_t * pNtk )
|
|||
}
|
||||
}
|
||||
|
||||
assert(pObj); // pObj should point to something here.
|
||||
|
||||
// return the array of all IDs, which have names
|
||||
vNameIds = Nm_ManReturnNameIds( pNtk->pManName );
|
||||
// make sure that these IDs correspond to live objects
|
||||
|
|
@ -571,10 +573,10 @@ bool Abc_NtkCheckLatch( Abc_Ntk_t * pNtk, Abc_Obj_t * pLatch )
|
|||
Value = 0;
|
||||
}
|
||||
// make sure the latch has a reasonable return value
|
||||
if ( (int)pLatch->pData < ABC_INIT_ZERO || (int)pLatch->pData > ABC_INIT_DC )
|
||||
if ( (int)(PORT_PTRINT_T)pLatch->pData < ABC_INIT_ZERO || (int)(PORT_PTRINT_T)pLatch->pData > ABC_INIT_DC )
|
||||
{
|
||||
fprintf( stdout, "NodeCheck: Latch \"%s\" has incorrect reset value (%d).\n",
|
||||
Abc_ObjName(pLatch), (int)pLatch->pData );
|
||||
Abc_ObjName(pLatch), (int)(PORT_PTRINT_T)pLatch->pData );
|
||||
Value = 0;
|
||||
}
|
||||
// make sure the latch has only one fanin
|
||||
|
|
@ -857,7 +859,7 @@ int Abc_NtkCheckUniqueCiNames( Abc_Ntk_t * pNtk )
|
|||
for ( i = 1; i < Abc_NtkCiNum(pNtk); i++ )
|
||||
if ( !strcmp( Vec_PtrEntry(vNames,i-1), Vec_PtrEntry(vNames,i) ) )
|
||||
{
|
||||
printf( "Abc_NtkCheck: Repeated CI names: %s and %s.\n", Vec_PtrEntry(vNames,i-1), Vec_PtrEntry(vNames,i) );
|
||||
printf( "Abc_NtkCheck: Repeated CI names: %s and %s.\n", (char*)Vec_PtrEntry(vNames,i-1), (char*)Vec_PtrEntry(vNames,i) );
|
||||
fRetValue = 0;
|
||||
}
|
||||
Vec_PtrFree( vNames );
|
||||
|
|
@ -890,7 +892,7 @@ int Abc_NtkCheckUniqueCoNames( Abc_Ntk_t * pNtk )
|
|||
// printf( "%s\n", Vec_PtrEntry(vNames,i) );
|
||||
if ( !strcmp( Vec_PtrEntry(vNames,i-1), Vec_PtrEntry(vNames,i) ) )
|
||||
{
|
||||
printf( "Abc_NtkCheck: Repeated CO names: %s and %s.\n", Vec_PtrEntry(vNames,i-1), Vec_PtrEntry(vNames,i) );
|
||||
printf( "Abc_NtkCheck: Repeated CO names: %s and %s.\n", (char*)Vec_PtrEntry(vNames,i-1), (char*)Vec_PtrEntry(vNames,i) );
|
||||
fRetValue = 0;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -197,10 +197,11 @@ Vec_Ptr_t * Abc_NtkDfsReverse( Abc_Ntk_t * pNtk )
|
|||
Abc_NtkDfsReverse_rec( pFanout, vNodes );
|
||||
}
|
||||
// add constant nodes in the end
|
||||
if ( !Abc_NtkIsStrash(pNtk) )
|
||||
if ( !Abc_NtkIsStrash(pNtk) ) {
|
||||
Abc_NtkForEachNode( pNtk, pObj, i )
|
||||
if ( Abc_NodeIsConst(pObj) )
|
||||
Vec_PtrPush( vNodes, pObj );
|
||||
}
|
||||
return vNodes;
|
||||
}
|
||||
|
||||
|
|
@ -492,7 +493,7 @@ void Abc_NtkDfs_iter( Vec_Ptr_t * vStack, Abc_Obj_t * pRoot, Vec_Ptr_t * vNodes
|
|||
while ( Vec_PtrSize(vStack) > 0 )
|
||||
{
|
||||
// get the node and its fanin
|
||||
iFanin = (int)Vec_PtrPop(vStack);
|
||||
iFanin = (int)(PORT_PTRINT_T)Vec_PtrPop(vStack);
|
||||
pNode = Vec_PtrPop(vStack);
|
||||
assert( !Abc_ObjIsNet(pNode) );
|
||||
// add it to the array of nodes if we finished
|
||||
|
|
@ -503,7 +504,7 @@ void Abc_NtkDfs_iter( Vec_Ptr_t * vStack, Abc_Obj_t * pRoot, Vec_Ptr_t * vNodes
|
|||
}
|
||||
// explore the next fanin
|
||||
Vec_PtrPush( vStack, pNode );
|
||||
Vec_PtrPush( vStack, (void *)(iFanin+1) );
|
||||
Vec_PtrPush( vStack, (void *)(PORT_PTRINT_T)(iFanin+1) );
|
||||
// get the fanin
|
||||
pFanin = Abc_ObjFanin0Ntk( Abc_ObjFanin(pNode,iFanin) );
|
||||
// if this node is already visited, skip
|
||||
|
|
@ -1112,7 +1113,7 @@ bool Abc_NtkIsAcyclic_rec( Abc_Obj_t * pNode )
|
|||
Abc_NodeSetTravIdCurrent( pNode );
|
||||
// visit the transitive fanin
|
||||
Abc_ObjForEachFanin( pNode, pFanin, i )
|
||||
{
|
||||
{
|
||||
pFanin = Abc_ObjFanin0Ntk(pFanin);
|
||||
// make sure there is no mixing of networks
|
||||
assert( pFanin->pNtk == pNode->pNtk );
|
||||
|
|
@ -1120,7 +1121,7 @@ bool Abc_NtkIsAcyclic_rec( Abc_Obj_t * pNode )
|
|||
if ( Abc_NodeIsTravIdPrevious(pFanin) )
|
||||
continue;
|
||||
// traverse the fanin's cone searching for the loop
|
||||
if ( fAcyclic = Abc_NtkIsAcyclic_rec(pFanin) )
|
||||
if ( (fAcyclic = Abc_NtkIsAcyclic_rec(pFanin)) )
|
||||
continue;
|
||||
// return as soon as the loop is detected
|
||||
fprintf( stdout, " %s ->", Abc_ObjName(pFanin) );
|
||||
|
|
@ -1135,7 +1136,7 @@ bool Abc_NtkIsAcyclic_rec( Abc_Obj_t * pNode )
|
|||
if ( Abc_NodeIsTravIdPrevious(pFanin) )
|
||||
continue;
|
||||
// traverse the fanin's cone searching for the loop
|
||||
if ( fAcyclic = Abc_NtkIsAcyclic_rec(pFanin) )
|
||||
if ( (fAcyclic = Abc_NtkIsAcyclic_rec(pFanin)) )
|
||||
continue;
|
||||
// return as soon as the loop is detected
|
||||
fprintf( stdout, " %s", Abc_ObjName(pFanin) );
|
||||
|
|
@ -1184,7 +1185,7 @@ bool Abc_NtkIsAcyclic( Abc_Ntk_t * pNtk )
|
|||
if ( Abc_NodeIsTravIdPrevious(pNode) )
|
||||
continue;
|
||||
// traverse the output logic cone
|
||||
if ( fAcyclic = Abc_NtkIsAcyclic_rec(pNode) )
|
||||
if ( (fAcyclic = Abc_NtkIsAcyclic_rec(pNode)) )
|
||||
continue;
|
||||
// stop as soon as the first loop is detected
|
||||
fprintf( stdout, " CO \"%s\"\n", Abc_ObjName(Abc_ObjFanout0(pNode)) );
|
||||
|
|
@ -1211,7 +1212,7 @@ int Abc_NodeSetChoiceLevel_rec( Abc_Obj_t * pNode, int fMaximum )
|
|||
int Level1, Level2, Level, LevelE;
|
||||
// skip the visited node
|
||||
if ( Abc_NodeIsTravIdCurrent( pNode ) )
|
||||
return (int)pNode->pCopy;
|
||||
return (int)(PORT_PTRINT_T)pNode->pCopy;
|
||||
Abc_NodeSetTravIdCurrent( pNode );
|
||||
// compute levels of the children nodes
|
||||
Level1 = Abc_NodeSetChoiceLevel_rec( Abc_ObjFanin0(pNode), fMaximum );
|
||||
|
|
@ -1226,9 +1227,9 @@ int Abc_NodeSetChoiceLevel_rec( Abc_Obj_t * pNode, int fMaximum )
|
|||
Level = ABC_MIN( Level, LevelE );
|
||||
// set the level of all equivalent nodes to be the same minimum
|
||||
for ( pTemp = pNode->pData; pTemp; pTemp = pTemp->pData )
|
||||
pTemp->pCopy = (void *)Level;
|
||||
pTemp->pCopy = (void *)(PORT_PTRINT_T)Level;
|
||||
}
|
||||
pNode->pCopy = (void *)Level;
|
||||
pNode->pCopy = (void *)(PORT_PTRINT_T)Level;
|
||||
return Level;
|
||||
}
|
||||
|
||||
|
|
@ -1297,7 +1298,7 @@ Vec_Ptr_t * Abc_AigGetLevelizedOrder( Abc_Ntk_t * pNtk, int fCollectCis )
|
|||
vLevels = Vec_PtrStart( LevelMax + 1 );
|
||||
Abc_NtkForEachNode( pNtk, pNode, i )
|
||||
{
|
||||
ppHead = ((Abc_Obj_t **)vLevels->pArray) + (int)pNode->pCopy;
|
||||
ppHead = ((Abc_Obj_t **)vLevels->pArray) + (int)(PORT_PTRINT_T)pNode->pCopy;
|
||||
pNode->pCopy = *ppHead;
|
||||
*ppHead = pNode;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -90,14 +90,8 @@ void Abc_ObjAddFanin( Abc_Obj_t * pObj, Abc_Obj_t * pFanin )
|
|||
Abc_ObjSetFaninC( pObj, Abc_ObjFaninNum(pObj)-1 );
|
||||
if ( Abc_ObjIsNet(pObj) && Abc_ObjFaninNum(pObj) > 1 )
|
||||
{
|
||||
int x = 0;
|
||||
printf( "Abc_ObjAddFanin(): Error! Creating net with two fanins.\n" );
|
||||
}
|
||||
if ( pObj->Id == 1960 )
|
||||
{
|
||||
int x = 0;
|
||||
}
|
||||
// printf( "Adding fanin of %s ", Abc_ObjName(pObj) );
|
||||
// printf( "to be %s\n", Abc_ObjName(pFanin) );
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -208,7 +208,7 @@ void Abc_NtkInsertLatchValues( Abc_Ntk_t * pNtk, Vec_Int_t * vValues )
|
|||
Abc_Obj_t * pLatch;
|
||||
int i;
|
||||
Abc_NtkForEachLatch( pNtk, pLatch, i )
|
||||
pLatch->pData = (void *)(vValues? (Vec_IntEntry(vValues,i)? ABC_INIT_ONE : ABC_INIT_ZERO) : ABC_INIT_DC);
|
||||
pLatch->pData = (void *)(PORT_PTRINT_T)(vValues? (Vec_IntEntry(vValues,i)? ABC_INIT_ONE : ABC_INIT_ZERO) : ABC_INIT_DC);
|
||||
}
|
||||
|
||||
/**Function*************************************************************
|
||||
|
|
@ -340,7 +340,7 @@ Vec_Ptr_t * Abc_NtkConverLatchNamesIntoNumbers( Abc_Ntk_t * pNtk )
|
|||
return NULL;
|
||||
// set register numbers
|
||||
Abc_NtkForEachLatch( pNtk, pObj, i )
|
||||
pObj->pNext = (Abc_Obj_t *)i;
|
||||
pObj->pNext = (Abc_Obj_t *)(PORT_PTRINT_T)i;
|
||||
// add the numbers
|
||||
vResult = Vec_PtrAlloc( Vec_PtrSize(pNtk->vOnehots) );
|
||||
Vec_PtrForEachEntry( pNtk->vOnehots, vNames, i )
|
||||
|
|
@ -354,7 +354,7 @@ Vec_Ptr_t * Abc_NtkConverLatchNamesIntoNumbers( Abc_Ntk_t * pNtk )
|
|||
pObj = Abc_NtkObj( pNtk, Num );
|
||||
if ( Abc_ObjFaninNum(pObj) != 1 || !Abc_ObjIsLatch(Abc_ObjFanin0(pObj)) )
|
||||
continue;
|
||||
Vec_IntPush( vNumbers, (int)pObj->pNext );
|
||||
Vec_IntPush( vNumbers, (int)(PORT_PTRINT_T)pObj->pNext );
|
||||
}
|
||||
if ( Vec_IntSize( vNumbers ) > 1 )
|
||||
{
|
||||
|
|
|
|||
|
|
@ -932,7 +932,7 @@ void Abc_NtkDelete( Abc_Ntk_t * pNtk )
|
|||
Abc_Obj_t * pObj;
|
||||
void * pAttrMan;
|
||||
int TotalMemory, i;
|
||||
int LargePiece = (4 << ABC_NUM_STEPS);
|
||||
// int LargePiece = (4 << ABC_NUM_STEPS);
|
||||
if ( pNtk == NULL )
|
||||
return;
|
||||
// free the HAIG
|
||||
|
|
|
|||
|
|
@ -70,7 +70,7 @@ Abc_Obj_t * Abc_ObjAlloc( Abc_Ntk_t * pNtk, Abc_ObjType_t Type )
|
|||
void Abc_ObjRecycle( Abc_Obj_t * pObj )
|
||||
{
|
||||
Abc_Ntk_t * pNtk = pObj->pNtk;
|
||||
int LargePiece = (4 << ABC_NUM_STEPS);
|
||||
// int LargePiece = (4 << ABC_NUM_STEPS);
|
||||
// free large fanout arrays
|
||||
// if ( pNtk->pMmStep && pObj->vFanouts.nCap * 4 > LargePiece )
|
||||
// FREE( pObj->vFanouts.pArray );
|
||||
|
|
|
|||
|
|
@ -20,8 +20,11 @@
|
|||
|
||||
#ifdef WIN32
|
||||
#include <process.h>
|
||||
#else
|
||||
#include <unistd.h>
|
||||
#endif
|
||||
|
||||
|
||||
#include "abc.h"
|
||||
#include "main.h"
|
||||
#include "ioAbc.h"
|
||||
|
|
|
|||
|
|
@ -804,7 +804,7 @@ bool Abc_SopCheck( char * pSop, int nFanins )
|
|||
if ( pCubes - pCubesOld != nFanins )
|
||||
{
|
||||
fprintf( stdout, "Abc_SopCheck: SOP has a mismatch between its cover size (%d) and its fanin number (%d).\n",
|
||||
pCubes - pCubesOld, nFanins );
|
||||
(int)(PORT_PTRDIFF_T)(pCubes - pCubesOld), nFanins );
|
||||
return 0;
|
||||
}
|
||||
// check the output values for this cube
|
||||
|
|
|
|||
|
|
@ -1536,9 +1536,9 @@ void Abc_NtkTransferCopy( Abc_Ntk_t * pNtk )
|
|||
static inline int Abc_ObjCrossCutInc( Abc_Obj_t * pObj )
|
||||
{
|
||||
// pObj->pCopy = (void *)(((int)pObj->pCopy)++);
|
||||
int Value = (int)pObj->pCopy;
|
||||
pObj->pCopy = (void *)(Value + 1);
|
||||
return (int)pObj->pCopy == Abc_ObjFanoutNum(pObj);
|
||||
int Value = (int)(PORT_PTRINT_T)pObj->pCopy;
|
||||
pObj->pCopy = (void *)(PORT_PTRINT_T)(Value + 1);
|
||||
return (int)(PORT_PTRINT_T)pObj->pCopy == Abc_ObjFanoutNum(pObj);
|
||||
}
|
||||
|
||||
/**Function*************************************************************
|
||||
|
|
|
|||
|
|
@ -506,7 +506,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
|
|||
Dar_LibStart();
|
||||
}
|
||||
{
|
||||
extern Bdc_ManDecomposeTest( unsigned uTruth, int nVars );
|
||||
extern void Bdc_ManDecomposeTest( unsigned uTruth, int nVars );
|
||||
// Bdc_ManDecomposeTest( 0x0f0f0f0f, 3 );
|
||||
}
|
||||
|
||||
|
|
@ -3710,7 +3710,6 @@ int Abc_CommandTrace( Abc_Frame_t * pAbc, int argc, char ** argv )
|
|||
{
|
||||
FILE * pOut, * pErr;
|
||||
Abc_Ntk_t * pNtk;
|
||||
Mfs_Par_t Pars, * pPars = &Pars;
|
||||
int c;
|
||||
int fUseLutLib;
|
||||
int fVerbose;
|
||||
|
|
@ -3780,7 +3779,6 @@ int Abc_CommandSpeedup( Abc_Frame_t * pAbc, int argc, char ** argv )
|
|||
{
|
||||
FILE * pOut, * pErr;
|
||||
Abc_Ntk_t * pNtk, * pNtkRes;
|
||||
Mfs_Par_t Pars, * pPars = &Pars;
|
||||
int c;
|
||||
int fUseLutLib;
|
||||
int Percentage;
|
||||
|
|
@ -6568,7 +6566,7 @@ int Abc_CommandExdcSet( Abc_Frame_t * pAbc, int argc, char ** argv )
|
|||
if ( (pFile = fopen( FileName, "r" )) == NULL )
|
||||
{
|
||||
fprintf( pAbc->Err, "Cannot open input file \"%s\". ", FileName );
|
||||
if ( FileName = Extra_FileGetSimilarName( FileName, ".mv", ".blif", ".pla", ".eqn", ".bench" ) )
|
||||
if ( (FileName = Extra_FileGetSimilarName( FileName, ".mv", ".blif", ".pla", ".eqn", ".bench" )) )
|
||||
fprintf( pAbc->Err, "Did you mean \"%s\"?", FileName );
|
||||
fprintf( pAbc->Err, "\n" );
|
||||
return 1;
|
||||
|
|
@ -6655,7 +6653,7 @@ int Abc_CommandCareSet( Abc_Frame_t * pAbc, int argc, char ** argv )
|
|||
if ( (pFile = fopen( FileName, "r" )) == NULL )
|
||||
{
|
||||
fprintf( pAbc->Err, "Cannot open input file \"%s\". ", FileName );
|
||||
if ( FileName = Extra_FileGetSimilarName( FileName, ".mv", ".blif", ".pla", ".eqn", ".bench" ) )
|
||||
if ( (FileName = Extra_FileGetSimilarName( FileName, ".mv", ".blif", ".pla", ".eqn", ".bench" )) )
|
||||
fprintf( pAbc->Err, "Did you mean \"%s\"?", FileName );
|
||||
fprintf( pAbc->Err, "\n" );
|
||||
return 1;
|
||||
|
|
@ -6706,7 +6704,7 @@ int Abc_CommandCut( Abc_Frame_t * pAbc, int argc, char ** argv )
|
|||
{
|
||||
Cut_Params_t Params, * pParams = &Params;
|
||||
Cut_Man_t * pCutMan;
|
||||
Cut_Oracle_t * pCutOracle;
|
||||
Cut_Oracle_t * pCutOracle = NULL;
|
||||
FILE * pOut, * pErr;
|
||||
Abc_Ntk_t * pNtk;
|
||||
int c;
|
||||
|
|
@ -6829,6 +6827,7 @@ int Abc_CommandCut( Abc_Frame_t * pAbc, int argc, char ** argv )
|
|||
Cut_ManStop( pCutMan );
|
||||
if ( fOracle )
|
||||
{
|
||||
assert(pCutOracle);
|
||||
Abc_NtkCutsOracle( pNtk, pCutOracle );
|
||||
Cut_OracleStop( pCutOracle );
|
||||
}
|
||||
|
|
@ -15673,7 +15672,7 @@ int Abc_CommandAbc8Read( Abc_Frame_t * pAbc, int argc, char ** argv )
|
|||
if ( (pFile = fopen( pFileName, "r" )) == NULL )
|
||||
{
|
||||
fprintf( stdout, "Cannot open input file \"%s\". ", pFileName );
|
||||
if ( pFileName = Extra_FileGetSimilarName( pFileName, ".blif", NULL, NULL, NULL, NULL ) )
|
||||
if ( (pFileName = Extra_FileGetSimilarName( pFileName, ".blif", NULL, NULL, NULL, NULL )) )
|
||||
fprintf( stdout, "Did you mean \"%s\"?", pFileName );
|
||||
fprintf( stdout, "\n" );
|
||||
return 1;
|
||||
|
|
@ -15763,7 +15762,7 @@ int Abc_CommandAbc8ReadLogic( Abc_Frame_t * pAbc, int argc, char ** argv )
|
|||
if ( (pFile = fopen( pFileName, "r" )) == NULL )
|
||||
{
|
||||
fprintf( stdout, "Cannot open input file \"%s\". ", pFileName );
|
||||
if ( pFileName = Extra_FileGetSimilarName( pFileName, ".blif", NULL, NULL, NULL, NULL ) )
|
||||
if ( (pFileName = Extra_FileGetSimilarName( pFileName, ".blif", NULL, NULL, NULL, NULL )) )
|
||||
fprintf( stdout, "Did you mean \"%s\"?", pFileName );
|
||||
fprintf( stdout, "\n" );
|
||||
return 1;
|
||||
|
|
@ -16032,7 +16031,7 @@ int Abc_CommandAbc8ReadLut( Abc_Frame_t * pAbc, int argc, char **argv )
|
|||
if ( (pFile = fopen( FileName, "r" )) == NULL )
|
||||
{
|
||||
fprintf( stdout, "Cannot open input file \"%s\". ", FileName );
|
||||
if ( FileName = Extra_FileGetSimilarName( FileName, ".lut", NULL, NULL, NULL, NULL ) )
|
||||
if ( (FileName = Extra_FileGetSimilarName( FileName, ".lut", NULL, NULL, NULL, NULL )) )
|
||||
fprintf( stdout, "Did you mean \"%s\"?", FileName );
|
||||
fprintf( stdout, "\n" );
|
||||
return 1;
|
||||
|
|
@ -17041,11 +17040,11 @@ int Abc_CommandAbc8Speedup( Abc_Frame_t * pAbc, int argc, char ** argv )
|
|||
{
|
||||
Aig_Man_t * pAigNew;
|
||||
int c;
|
||||
int fUseLutLib;
|
||||
int Percentage;
|
||||
int Degree;
|
||||
int fVerbose;
|
||||
int fVeryVerbose;
|
||||
int fUseLutLib = 0;
|
||||
int Percentage = 100;
|
||||
int Degree = 5;
|
||||
int fVerbose = 0;
|
||||
int fVeryVerbose = 0;
|
||||
extern Aig_Man_t * Nwk_ManSpeedup( void * pNtk, int fUseLutLib, int Percentage, int Degree, int fVerbose, int fVeryVerbose );
|
||||
|
||||
// set defaults
|
||||
|
|
|
|||
|
|
@ -253,7 +253,6 @@ Abc_Ntk_t * Abc_NtkNtkTest( Abc_Ntk_t * pNtk, If_Lib_t * pLutLib )
|
|||
extern Vec_Ptr_t * Nwk_ManRetimeCutForward( Nwk_Man_t * pMan, int nLatches, int fVerbose );
|
||||
extern Vec_Ptr_t * Nwk_ManRetimeCutBackward( Nwk_Man_t * pMan, int nLatches, int fVerbose );
|
||||
|
||||
Mfx_Par_t Pars, * pPars = &Pars;
|
||||
Abc_Ntk_t * pNtkNew;
|
||||
Nwk_Man_t * pMan;
|
||||
pMan = Abc_NtkToNtkNew( pNtk );
|
||||
|
|
|
|||
|
|
@ -96,7 +96,6 @@ Abc_Ntk_t * Abc_NtkBalance( Abc_Ntk_t * pNtk, bool fDuplicate, bool fSelective,
|
|||
***********************************************************************/
|
||||
void Abc_NtkBalancePerform( Abc_Ntk_t * pNtk, Abc_Ntk_t * pNtkAig, bool fDuplicate, bool fSelective, bool fUpdateLevel )
|
||||
{
|
||||
int fCheck = 1;
|
||||
ProgressBar * pProgress;
|
||||
Vec_Vec_t * vStorage;
|
||||
Abc_Obj_t * pNode, * pDriver;
|
||||
|
|
|
|||
|
|
@ -84,7 +84,7 @@ printf( "Fraig has %6d nodes.\n", Ivy_ManNodeNum(pFraig) );
|
|||
***********************************************************************/
|
||||
void Abc_NtkBmcReport( Ivy_Man_t * pMan, Ivy_Man_t * pFrames, Ivy_Man_t * pFraig, Vec_Ptr_t * vMapping, int nFrames )
|
||||
{
|
||||
Ivy_Obj_t * pFirst1, * pFirst2, * pFirst3;
|
||||
Ivy_Obj_t * pFirst1, * pFirst2 = NULL, * pFirst3 = NULL;
|
||||
int i, f, nIdMax, Prev2, Prev3;
|
||||
nIdMax = Ivy_ManObjIdMax(pMan);
|
||||
// check what is the number of nodes in each frame
|
||||
|
|
@ -101,6 +101,8 @@ void Abc_NtkBmcReport( Ivy_Man_t * pMan, Ivy_Man_t * pFrames, Ivy_Man_t * pFraig
|
|||
continue;
|
||||
break;
|
||||
}
|
||||
assert(pFirst2);
|
||||
assert(pFirst3);
|
||||
if ( f )
|
||||
printf( "Frame %3d : Strash = %5d Fraig = %5d\n", f, pFirst2->Id - Prev2, pFirst3->Id - Prev3 );
|
||||
Prev2 = pFirst2->Id;
|
||||
|
|
|
|||
|
|
@ -144,7 +144,7 @@ void Abc_NtkCutsOracle( Abc_Ntk_t * pNtk, Cut_Oracle_t * p )
|
|||
{
|
||||
Abc_Obj_t * pObj;
|
||||
Vec_Ptr_t * vNodes;
|
||||
int i, clk = clock();
|
||||
int i; //, clk = clock();
|
||||
int fDrop = Cut_OracleReadDrop(p);
|
||||
|
||||
assert( Abc_NtkIsStrash(pNtk) );
|
||||
|
|
@ -327,7 +327,7 @@ int Abc_NtkComputeArea( Abc_Ntk_t * pNtk, Cut_Man_t * p )
|
|||
void * Abc_NodeGetCutsRecursive( void * p, Abc_Obj_t * pObj, int fDag, int fTree )
|
||||
{
|
||||
void * pList;
|
||||
if ( pList = Abc_NodeReadCuts( p, pObj ) )
|
||||
if ( (pList = Abc_NodeReadCuts( p, pObj )) )
|
||||
return pList;
|
||||
Abc_NodeGetCutsRecursive( p, Abc_ObjFanin0(pObj), fDag, fTree );
|
||||
Abc_NodeGetCutsRecursive( p, Abc_ObjFanin1(pObj), fDag, fTree );
|
||||
|
|
@ -459,7 +459,6 @@ void Abc_NodeFreeCuts( void * p, Abc_Obj_t * pObj )
|
|||
***********************************************************************/
|
||||
void Abc_NtkPrintCuts( void * p, Abc_Ntk_t * pNtk, int fSeq )
|
||||
{
|
||||
Cut_Man_t * pMan = p;
|
||||
Cut_Cut_t * pList;
|
||||
Abc_Obj_t * pObj;
|
||||
int i;
|
||||
|
|
@ -485,7 +484,6 @@ void Abc_NtkPrintCuts( void * p, Abc_Ntk_t * pNtk, int fSeq )
|
|||
***********************************************************************/
|
||||
void Abc_NtkPrintCuts_( void * p, Abc_Ntk_t * pNtk, int fSeq )
|
||||
{
|
||||
Cut_Man_t * pMan = p;
|
||||
Cut_Cut_t * pList;
|
||||
Abc_Obj_t * pObj;
|
||||
pObj = Abc_NtkObj( pNtk, 2 * Abc_NtkObjNum(pNtk) / 3 );
|
||||
|
|
|
|||
|
|
@ -99,10 +99,11 @@ Aig_Man_t * Abc_NtkToDar( Abc_Ntk_t * pNtk, int fExors, int fRegisters )
|
|||
Abc_NtkForEachCi( pNtk, pObj, i )
|
||||
pObj->pCopy = (Abc_Obj_t *)Aig_ObjCreatePi(pMan);
|
||||
// complement the 1-values registers
|
||||
if ( fRegisters )
|
||||
if ( fRegisters ) {
|
||||
Abc_NtkForEachLatch( pNtk, pObj, i )
|
||||
if ( Abc_LatchIsInit1(pObj) )
|
||||
Abc_ObjFanout0(pObj)->pCopy = Abc_ObjNot(Abc_ObjFanout0(pObj)->pCopy);
|
||||
}
|
||||
// perform the conversion of the internal nodes (assumes DFS ordering)
|
||||
// pMan->fAddStrash = 1;
|
||||
Abc_NtkForEachNode( pNtk, pObj, i )
|
||||
|
|
@ -1894,7 +1895,7 @@ Abc_Ntk_t * Abc_NtkInter( Abc_Ntk_t * pNtkOn, Abc_Ntk_t * pNtkOff, int fRelation
|
|||
{
|
||||
Abc_Ntk_t * pNtkOn1, * pNtkOff1, * pNtkInter1, * pNtkInter;
|
||||
Abc_Obj_t * pObj;
|
||||
int i, clk = clock();
|
||||
int i; //, clk = clock();
|
||||
if ( Abc_NtkCoNum(pNtkOn) != Abc_NtkCoNum(pNtkOff) )
|
||||
{
|
||||
printf( "Currently works only for networks with equal number of POs.\n" );
|
||||
|
|
|
|||
|
|
@ -526,8 +526,8 @@ Abc_Ntk_t * Abc_NtkSpeedup( Abc_Ntk_t * pNtk, int fUseLutLib, int Percentage, in
|
|||
printf( "\n" );
|
||||
}
|
||||
// mark the timing critical nodes and edges
|
||||
puTCEdges = ALLOC( int, Abc_NtkObjNumMax(pNtk) );
|
||||
memset( puTCEdges, 0, sizeof(int) * Abc_NtkObjNumMax(pNtk) );
|
||||
puTCEdges = ALLOC( unsigned, Abc_NtkObjNumMax(pNtk) );
|
||||
memset( puTCEdges, 0, sizeof(unsigned) * Abc_NtkObjNumMax(pNtk) );
|
||||
Abc_NtkForEachNode( pNtk, pNode, i )
|
||||
{
|
||||
if ( Abc_ObjSlack(pNode) >= tDelta )
|
||||
|
|
|
|||
|
|
@ -161,11 +161,11 @@ void Abc_NtkDsdConstruct( Dsd_Manager_t * pManDsd, Abc_Ntk_t * pNtk, Abc_Ntk_t *
|
|||
int i, nNodesDsd;
|
||||
|
||||
// save the CI nodes in the DSD nodes
|
||||
Dsd_NodeSetMark( Dsd_ManagerReadConst1(pManDsd), (int)Abc_NtkCreateNodeConst1(pNtkNew) );
|
||||
Dsd_NodeSetMark( Dsd_ManagerReadConst1(pManDsd), (int)(PORT_PTRINT_T)Abc_NtkCreateNodeConst1(pNtkNew) );
|
||||
Abc_NtkForEachCi( pNtk, pNode, i )
|
||||
{
|
||||
pNodeDsd = Dsd_ManagerReadInput( pManDsd, i );
|
||||
Dsd_NodeSetMark( pNodeDsd, (int)pNode->pCopy );
|
||||
Dsd_NodeSetMark( pNodeDsd, (int)(PORT_PTRINT_T)pNode->pCopy );
|
||||
}
|
||||
|
||||
// collect DSD nodes in DFS order (leaves and const1 are not collected)
|
||||
|
|
@ -183,7 +183,7 @@ void Abc_NtkDsdConstruct( Dsd_Manager_t * pManDsd, Abc_Ntk_t * pNtk, Abc_Ntk_t *
|
|||
if ( !Abc_AigNodeIsAnd(pDriver) )
|
||||
continue;
|
||||
pNodeDsd = Dsd_ManagerReadRoot( pManDsd, i );
|
||||
pNodeNew = (Abc_Obj_t *)Dsd_NodeReadMark( Dsd_Regular(pNodeDsd) );
|
||||
pNodeNew = (Abc_Obj_t *)(PORT_PTRINT_T)Dsd_NodeReadMark( Dsd_Regular(pNodeDsd) );
|
||||
assert( !Abc_ObjIsComplement(pNodeNew) );
|
||||
pDriver->pCopy = Abc_ObjNotCond( pNodeNew, Dsd_IsComplement(pNodeDsd) );
|
||||
}
|
||||
|
|
@ -219,7 +219,7 @@ Abc_Obj_t * Abc_NtkDsdConstructNode( Dsd_Manager_t * pManDsd, Dsd_Node_t * pNode
|
|||
for ( i = 0; i < nDecs; i++ )
|
||||
{
|
||||
pFaninDsd = Dsd_NodeReadDec( pNodeDsd, i );
|
||||
pFanin = (Abc_Obj_t *)Dsd_NodeReadMark(Dsd_Regular(pFaninDsd));
|
||||
pFanin = (Abc_Obj_t *)(PORT_PTRINT_T)Dsd_NodeReadMark(Dsd_Regular(pFaninDsd));
|
||||
Abc_ObjAddFanin( pNodeNew, pFanin );
|
||||
assert( Type == DSD_NODE_OR || !Dsd_IsComplement(pFaninDsd) );
|
||||
}
|
||||
|
|
@ -284,7 +284,7 @@ printf( "\n" );
|
|||
}
|
||||
}
|
||||
pNodeNew->pData = bLocal;
|
||||
Dsd_NodeSetMark( pNodeDsd, (int)pNodeNew );
|
||||
Dsd_NodeSetMark( pNodeDsd, (int)(PORT_PTRINT_T)pNodeNew );
|
||||
return pNodeNew;
|
||||
}
|
||||
|
||||
|
|
@ -383,7 +383,7 @@ Vec_Ptr_t * Abc_NtkCollectNodesForDsd( Abc_Ntk_t * pNtk )
|
|||
void Abc_NodeDecompDsdAndMux( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Dsd_Manager_t * pManDsd, bool fRecursive, int * pCounters )
|
||||
{
|
||||
DdManager * dd = pNode->pNtk->pManFunc;
|
||||
Abc_Obj_t * pRoot, * pFanin, * pNode1, * pNode2, * pNodeC;
|
||||
Abc_Obj_t * pRoot = NULL, * pFanin, * pNode1, * pNode2, * pNodeC;
|
||||
Dsd_Node_t ** ppNodesDsd, * pNodeDsd, * pFaninDsd;
|
||||
int i, nNodesDsd, iVar, fCompl;
|
||||
|
||||
|
|
@ -400,7 +400,7 @@ void Abc_NodeDecompDsdAndMux( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Dsd_Manager
|
|||
Abc_ObjForEachFanin( pNode, pFanin, i )
|
||||
{
|
||||
pFaninDsd = Dsd_ManagerReadInput( pManDsd, i );
|
||||
Dsd_NodeSetMark( pFaninDsd, (int)pFanin );
|
||||
Dsd_NodeSetMark( pFaninDsd, (int)(PORT_PTRINT_T)pFanin );
|
||||
}
|
||||
|
||||
// construct the intermediate nodes
|
||||
|
|
@ -412,6 +412,7 @@ void Abc_NodeDecompDsdAndMux( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Dsd_Manager
|
|||
Vec_PtrPush( vNodes, pRoot );
|
||||
}
|
||||
free( ppNodesDsd );
|
||||
assert(pRoot);
|
||||
|
||||
// remove the current fanins
|
||||
Abc_ObjRemoveFanins( pNode );
|
||||
|
|
@ -466,7 +467,7 @@ void Abc_NodeDecompDsdAndMux( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Dsd_Manager
|
|||
***********************************************************************/
|
||||
bool Abc_NodeIsForDsd( Abc_Obj_t * pNode )
|
||||
{
|
||||
DdManager * dd = pNode->pNtk->pManFunc;
|
||||
// DdManager * dd = pNode->pNtk->pManFunc;
|
||||
// DdNode * bFunc, * bFunc0, * bFunc1;
|
||||
assert( Abc_ObjIsNode(pNode) );
|
||||
// if ( Cudd_DagSize(pNode->pData)-1 > Abc_ObjFaninNum(pNode) )
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@ Abc_Ntk_t * Abc_NtkFpga( Abc_Ntk_t * pNtk, float DelayTarget, int fRecovery, int
|
|||
int fShowSwitching = 1;
|
||||
Abc_Ntk_t * pNtkNew;
|
||||
Fpga_Man_t * pMan;
|
||||
Vec_Int_t * vSwitching;
|
||||
Vec_Int_t * vSwitching = NULL;
|
||||
float * pSwitching = NULL;
|
||||
int Num;
|
||||
|
||||
|
|
@ -70,7 +70,7 @@ Abc_Ntk_t * Abc_NtkFpga( Abc_Ntk_t * pNtk, float DelayTarget, int fRecovery, int
|
|||
|
||||
// perform FPGA mapping
|
||||
pMan = Abc_NtkToFpga( pNtk, fRecovery, pSwitching, fLatchPaths, fVerbose );
|
||||
if ( pSwitching ) Vec_IntFree( vSwitching );
|
||||
if ( pSwitching ) { assert(vSwitching); Vec_IntFree( vSwitching ); }
|
||||
if ( pMan == NULL )
|
||||
return NULL;
|
||||
Fpga_ManSetSwitching( pMan, fSwitching );
|
||||
|
|
|
|||
|
|
@ -101,7 +101,7 @@ void * Abc_NtkToFraig( Abc_Ntk_t * pNtk, void * pParams, int fAllNodes, int fExd
|
|||
{
|
||||
int fInternal = ((Fraig_Params_t *)pParams)->fInternal;
|
||||
Fraig_Man_t * pMan;
|
||||
ProgressBar * pProgress;
|
||||
ProgressBar * pProgress = NULL;
|
||||
Vec_Ptr_t * vNodes;
|
||||
Abc_Obj_t * pNode;
|
||||
int i;
|
||||
|
|
@ -126,14 +126,18 @@ void * Abc_NtkToFraig( Abc_Ntk_t * pNtk, void * pParams, int fAllNodes, int fExd
|
|||
{
|
||||
if ( Abc_ObjFaninNum(pNode) == 0 )
|
||||
continue;
|
||||
if ( !fInternal )
|
||||
if ( !fInternal ) {
|
||||
assert(pProgress);
|
||||
Extra_ProgressBarUpdate( pProgress, i, NULL );
|
||||
}
|
||||
pNode->pCopy = (Abc_Obj_t *)Fraig_NodeAnd( pMan,
|
||||
Fraig_NotCond( Abc_ObjFanin0(pNode)->pCopy, Abc_ObjFaninC0(pNode) ),
|
||||
Fraig_NotCond( Abc_ObjFanin1(pNode)->pCopy, Abc_ObjFaninC1(pNode) ) );
|
||||
}
|
||||
if ( !fInternal )
|
||||
if ( !fInternal ) {
|
||||
assert(pProgress);
|
||||
Extra_ProgressBarStop( pProgress );
|
||||
}
|
||||
Vec_PtrFree( vNodes );
|
||||
|
||||
// use EXDC to change the mapping of nodes into FRAIG nodes
|
||||
|
|
@ -316,7 +320,7 @@ Abc_Obj_t * Abc_NodeFromFraig_rec( Abc_Ntk_t * pNtkNew, Fraig_Node_t * pNodeFrai
|
|||
Fraig_Node_t * pNodeTemp, * pNodeFraigR = Fraig_Regular(pNodeFraig);
|
||||
void ** ppTail;
|
||||
// check if the node was already considered
|
||||
if ( pRes = (Abc_Obj_t *)Fraig_NodeReadData1(pNodeFraigR) )
|
||||
if ( (pRes = (Abc_Obj_t *)Fraig_NodeReadData1(pNodeFraigR)) )
|
||||
return Abc_ObjNotCond( pRes, Fraig_IsComplement(pNodeFraig) );
|
||||
// solve the children
|
||||
pRes0 = Abc_NodeFromFraig_rec( pNtkNew, Fraig_NodeReadOne(pNodeFraigR) );
|
||||
|
|
@ -455,7 +459,7 @@ void Abc_NtkFromFraig2_rec( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode, Vec_Ptr_t *
|
|||
Abc_NodeSetTravIdCurrent( pNode );
|
||||
assert( Abc_ObjIsNode( pNode ) );
|
||||
// get the node's representative
|
||||
if ( pRepr = Vec_PtrEntry(vNodeReprs, pNode->Id) )
|
||||
if ( (pRepr = Vec_PtrEntry(vNodeReprs, pNode->Id)) )
|
||||
{
|
||||
Abc_NtkFromFraig2_rec( pNtkNew, pRepr, vNodeReprs );
|
||||
pNode->pCopy = Abc_ObjNotCond( pRepr->pCopy, pRepr->fPhase ^ pNode->fPhase );
|
||||
|
|
@ -695,7 +699,7 @@ Abc_Ntk_t * Abc_NtkFraigRestore()
|
|||
Vec_Ptr_t * vStore;
|
||||
Abc_Ntk_t * pNtk, * pFraig;
|
||||
int nWords1, nWords2, nWordsMin;
|
||||
int clk = clock();
|
||||
// int clk = clock();
|
||||
|
||||
// get the stored network
|
||||
vStore = Abc_FrameReadStore();
|
||||
|
|
@ -732,6 +736,7 @@ Abc_Ntk_t * Abc_NtkFraigRestore()
|
|||
Params.fDoSparse = 1; // performs equiv tests for sparse functions
|
||||
Params.fChoicing = 1; // enables recording structural choices
|
||||
Params.fTryProve = 0; // tries to solve the final miter
|
||||
Params.fInternal = 1; // does not show progress bar
|
||||
Params.fVerbose = 0; // the verbosiness flag
|
||||
|
||||
// perform partitioned computation of structural choices
|
||||
|
|
|
|||
|
|
@ -453,8 +453,8 @@ Hop_Obj_t * Abc_NodeIfToHop( Hop_Man_t * pHopMan, If_Man_t * pIfMan, If_Obj_t *
|
|||
***********************************************************************/
|
||||
int Abc_ObjCompareFlow( Abc_Obj_t ** ppNode0, Abc_Obj_t ** ppNode1 )
|
||||
{
|
||||
float Flow0 = Abc_Int2Float((int)(*ppNode0)->pCopy);
|
||||
float Flow1 = Abc_Int2Float((int)(*ppNode1)->pCopy);
|
||||
float Flow0 = Abc_Int2Float((int)(PORT_PTRINT_T)(*ppNode0)->pCopy);
|
||||
float Flow1 = Abc_Int2Float((int)(PORT_PTRINT_T)(*ppNode1)->pCopy);
|
||||
if ( Flow0 > Flow1 )
|
||||
return -1;
|
||||
if ( Flow0 < Flow1 )
|
||||
|
|
@ -517,9 +517,9 @@ Vec_Ptr_t * Abc_NtkFindGoodOrder( Abc_Ntk_t * pNtk )
|
|||
{
|
||||
pFanin0 = Abc_ObjFanin0(pNode);
|
||||
pFanin1 = Abc_ObjFanin1(pNode);
|
||||
Flow0 = Abc_Int2Float((int)pFanin0->pCopy)/Abc_ObjFanoutNum(pFanin0);
|
||||
Flow1 = Abc_Int2Float((int)pFanin1->pCopy)/Abc_ObjFanoutNum(pFanin1);
|
||||
pNode->pCopy = (Abc_Obj_t *)Abc_Float2Int(Flow0 + Flow1+(float)1.0);
|
||||
Flow0 = Abc_Int2Float((int)(PORT_PTRINT_T)pFanin0->pCopy)/Abc_ObjFanoutNum(pFanin0);
|
||||
Flow1 = Abc_Int2Float((int)(PORT_PTRINT_T)pFanin1->pCopy)/Abc_ObjFanoutNum(pFanin1);
|
||||
pNode->pCopy = (Abc_Obj_t *)(PORT_PTRINT_T)Abc_Float2Int(Flow0 + Flow1+(float)1.0);
|
||||
}
|
||||
// find the flow of the COs
|
||||
vCos = Vec_PtrAlloc( Abc_NtkCoNum(pNtk) );
|
||||
|
|
@ -536,7 +536,7 @@ Vec_Ptr_t * Abc_NtkFindGoodOrder( Abc_Ntk_t * pNtk )
|
|||
// verify sorting
|
||||
pFanin0 = Vec_PtrEntry(vCos, 0);
|
||||
pFanin1 = Vec_PtrEntryLast(vCos);
|
||||
assert( Abc_Int2Float((int)pFanin0->pCopy) >= Abc_Int2Float((int)pFanin1->pCopy) );
|
||||
assert( Abc_Int2Float((int)(PORT_PTRINT_T)pFanin0->pCopy) >= Abc_Int2Float((int)(PORT_PTRINT_T)pFanin1->pCopy) );
|
||||
|
||||
// collect the nodes in the topological order from the new array
|
||||
Abc_NtkIncrementTravId( pNtk );
|
||||
|
|
|
|||
|
|
@ -73,7 +73,6 @@ extern int timeRetime;
|
|||
Ivy_Man_t * Abc_NtkIvyBefore( Abc_Ntk_t * pNtk, int fSeq, int fUseDc )
|
||||
{
|
||||
Ivy_Man_t * pMan;
|
||||
int fCleanup = 1;
|
||||
//timeRetime = clock();
|
||||
assert( !Abc_NtkIsNetlist(pNtk) );
|
||||
if ( Abc_NtkIsBddLogic(pNtk) )
|
||||
|
|
@ -588,9 +587,9 @@ Abc_Ntk_t * Abc_NtkIvy( Abc_Ntk_t * pNtk )
|
|||
{
|
||||
// Abc_Ntk_t * pNtkAig;
|
||||
Ivy_Man_t * pMan;//, * pTemp;
|
||||
int fCleanup = 1;
|
||||
// int fCleanup = 1;
|
||||
// int nNodes;
|
||||
int nLatches = Abc_NtkLatchNum(pNtk);
|
||||
// int nLatches = Abc_NtkLatchNum(pNtk);
|
||||
Vec_Int_t * vInit = Abc_NtkCollectLatchValuesIvy( pNtk, 0 );
|
||||
|
||||
assert( !Abc_NtkIsNetlist(pNtk) );
|
||||
|
|
|
|||
|
|
@ -21,6 +21,8 @@
|
|||
#include "abc.h"
|
||||
#include "cut.h"
|
||||
|
||||
#define LARGE_LEVEL 1000000
|
||||
|
||||
////////////////////////////////////////////////////////////////////////
|
||||
/// DECLARATIONS ///
|
||||
////////////////////////////////////////////////////////////////////////
|
||||
|
|
@ -212,7 +214,7 @@ void Abc_NodeLutMap( Cut_Man_t * pManCuts, Abc_Obj_t * pObj )
|
|||
assert( pCut != NULL );
|
||||
assert( pObj->Level == 0 );
|
||||
// go through the cuts
|
||||
pObj->Level = ABC_INFINITY;
|
||||
pObj->Level = LARGE_LEVEL;
|
||||
for ( pCut = pCut->pNext; pCut; pCut = pCut->pNext )
|
||||
{
|
||||
DelayMax = 0;
|
||||
|
|
@ -226,7 +228,7 @@ void Abc_NodeLutMap( Cut_Man_t * pManCuts, Abc_Obj_t * pObj )
|
|||
if ( (int)pObj->Level > DelayMax )
|
||||
pObj->Level = DelayMax;
|
||||
}
|
||||
assert( pObj->Level < ABC_INFINITY );
|
||||
assert( pObj->Level < LARGE_LEVEL );
|
||||
pObj->Level++;
|
||||
// printf( "%d(%d) ", pObj->Id, pObj->Level );
|
||||
}
|
||||
|
|
@ -340,7 +342,7 @@ void Abc_ManSclStop( Abc_ManScl_t * p )
|
|||
unsigned * Abc_NodeSuperChoiceTruth( Abc_ManScl_t * pManScl )
|
||||
{
|
||||
Abc_Obj_t * pObj;
|
||||
unsigned * puData0, * puData1, * puData;
|
||||
unsigned * puData0, * puData1, * puData = NULL;
|
||||
char * pSop;
|
||||
int i, k;
|
||||
// set elementary truth tables
|
||||
|
|
@ -635,7 +637,7 @@ void Abc_NodeDecomposeSort( Abc_Obj_t ** pLeaves, int nVars, int * pBSet, int nL
|
|||
for ( i = 0; i < nLutSize; i++ )
|
||||
{
|
||||
kBest = -1;
|
||||
LevelMin = ABC_INFINITY;
|
||||
LevelMin = LARGE_LEVEL;
|
||||
for ( k = 0; k < nVars; k++ )
|
||||
if ( pTemp[k] && LevelMin > (int)pTemp[k]->Level )
|
||||
{
|
||||
|
|
@ -704,7 +706,7 @@ int Abc_NodeDecomposeStep( Abc_ManScl_t * p )
|
|||
pTruthClass = p->uCofs[ nCofs + pCofClasses[k][0] ];
|
||||
if ( Extra_TruthIsEqual( pTruthCof, pTruthClass, nVars ) )
|
||||
{
|
||||
pCofClasses[k][ nCofClasses[k]++ ] = i;
|
||||
pCofClasses[k][(int)nCofClasses[k]++ ] = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -59,7 +59,7 @@ Abc_Ntk_t * Abc_NtkMap( Abc_Ntk_t * pNtk, double DelayTarget, int fRecovery, int
|
|||
int fShowSwitching = 1;
|
||||
Abc_Ntk_t * pNtkNew;
|
||||
Map_Man_t * pMan;
|
||||
Vec_Int_t * vSwitching;
|
||||
Vec_Int_t * vSwitching = NULL;
|
||||
float * pSwitching = NULL;
|
||||
int clk;
|
||||
|
||||
|
|
|
|||
|
|
@ -258,7 +258,7 @@ DdManager * Abc_NtkBuildGlobalBdds( Abc_Ntk_t * pNtk, int nBddSizeMax, int fDrop
|
|||
// start the manager
|
||||
assert( Abc_NtkGlobalBdd(pNtk) == NULL );
|
||||
dd = Cudd_Init( Abc_NtkCiNum(pNtk), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
|
||||
pAttMan = Vec_AttAlloc( 0, Abc_NtkObjNumMax(pNtk) + 1, dd, Extra_StopManager, NULL, Cudd_RecursiveDeref );
|
||||
pAttMan = Vec_AttAlloc( Abc_NtkObjNumMax(pNtk) + 1, dd, (void (*)(void*))Extra_StopManager, NULL, (void (*)(void*,void*))Cudd_RecursiveDeref );
|
||||
Vec_PtrWriteEntry( pNtk->vAttrs, VEC_ATTR_GLOBAL_BDD, pAttMan );
|
||||
|
||||
// set reordering
|
||||
|
|
|
|||
|
|
@ -662,10 +662,10 @@ void * Abc_NtkDontCareTransfer_rec( Odc_Man_t * p, Abc_Obj_t * pNode, Abc_Obj_t
|
|||
assert( Abc_ObjIsNode(pNode) );
|
||||
// consider the case when the node is the pivot
|
||||
if ( pNode == pPivot )
|
||||
return pNode->pCopy = (void *)((Odc_Const1() << 16) | Odc_Const0());
|
||||
return pNode->pCopy = (void *)(PORT_PTRUINT_T)((Odc_Const1() << 16) | Odc_Const0());
|
||||
// compute the cofactors
|
||||
uData0 = (unsigned)Abc_NtkDontCareTransfer_rec( p, Abc_ObjFanin0(pNode), pPivot );
|
||||
uData1 = (unsigned)Abc_NtkDontCareTransfer_rec( p, Abc_ObjFanin1(pNode), pPivot );
|
||||
uData0 = (unsigned)(PORT_PTRUINT_T)Abc_NtkDontCareTransfer_rec( p, Abc_ObjFanin0(pNode), pPivot );
|
||||
uData1 = (unsigned)(PORT_PTRUINT_T)Abc_NtkDontCareTransfer_rec( p, Abc_ObjFanin1(pNode), pPivot );
|
||||
// find the 0-cofactor
|
||||
uLit0 = Odc_NotCond( (Odc_Lit_t)(uData0 & 0xffff), Abc_ObjFaninC0(pNode) );
|
||||
uLit1 = Odc_NotCond( (Odc_Lit_t)(uData1 & 0xffff), Abc_ObjFaninC1(pNode) );
|
||||
|
|
@ -675,7 +675,7 @@ void * Abc_NtkDontCareTransfer_rec( Odc_Man_t * p, Abc_Obj_t * pNode, Abc_Obj_t
|
|||
uLit1 = Odc_NotCond( (Odc_Lit_t)(uData1 >> 16), Abc_ObjFaninC1(pNode) );
|
||||
uRes1 = Odc_And( p, uLit0, uLit1 );
|
||||
// find the result
|
||||
return pNode->pCopy = (void *)((uRes1 << 16) | uRes0);
|
||||
return pNode->pCopy = (void *)(PORT_PTRUINT_T)((uRes1 << 16) | uRes0);
|
||||
}
|
||||
|
||||
/**Function*************************************************************
|
||||
|
|
@ -701,21 +701,21 @@ int Abc_NtkDontCareTransfer( Odc_Man_t * p )
|
|||
Vec_PtrForEachEntry( p->vLeaves, pObj, i )
|
||||
{
|
||||
uLit = Odc_Var( p, i );
|
||||
pObj->pCopy = (void *)((uLit << 16) | uLit);
|
||||
pObj->pCopy = (void *)(PORT_PTRUINT_T)((uLit << 16) | uLit);
|
||||
Abc_NodeSetTravIdCurrent(pObj);
|
||||
}
|
||||
// set elementary variables at the branched
|
||||
Vec_PtrForEachEntry( p->vBranches, pObj, i )
|
||||
{
|
||||
uLit = Odc_Var( p, i+p->nVarsMax );
|
||||
pObj->pCopy = (void *)((uLit << 16) | uLit);
|
||||
pObj->pCopy = (void *)(PORT_PTRUINT_T)((uLit << 16) | uLit);
|
||||
Abc_NodeSetTravIdCurrent(pObj);
|
||||
}
|
||||
// compute the AIG for the window
|
||||
p->iRoot = Odc_Const0();
|
||||
Vec_PtrForEachEntry( p->vRoots, pObj, i )
|
||||
{
|
||||
uData = (unsigned)Abc_NtkDontCareTransfer_rec( p, pObj, p->pNode );
|
||||
uData = (unsigned)(PORT_PTRUINT_T)Abc_NtkDontCareTransfer_rec( p, pObj, p->pNode );
|
||||
// get the cofactors
|
||||
uRes0 = uData & 0xffff;
|
||||
uRes1 = uData >> 16;
|
||||
|
|
|
|||
|
|
@ -115,7 +115,7 @@ char * Supp_ManFetch( Supp_Man_t * p, int nSize )
|
|||
assert( nSize > 0 );
|
||||
Type = Supp_SizeType( nSize, p->nStepSize );
|
||||
Vec_PtrFillExtra( p->vFree, Type + 1, NULL );
|
||||
if ( pMemory = Vec_PtrEntry( p->vFree, Type ) )
|
||||
if ( (pMemory = Vec_PtrEntry( p->vFree, Type )) )
|
||||
{
|
||||
Vec_PtrWriteEntry( p->vFree, Type, Supp_OneNext(pMemory) );
|
||||
return pMemory;
|
||||
|
|
@ -321,9 +321,9 @@ Vec_Ptr_t * Abc_NtkComputeSupportsSmart( Abc_Ntk_t * pNtk )
|
|||
int i;
|
||||
// set the number of PIs/POs
|
||||
Abc_NtkForEachCi( pNtk, pObj, i )
|
||||
pObj->pNext = (Abc_Obj_t *)i;
|
||||
pObj->pNext = (Abc_Obj_t *)(PORT_PTRINT_T)i;
|
||||
Abc_NtkForEachCo( pNtk, pObj, i )
|
||||
pObj->pNext = (Abc_Obj_t *)i;
|
||||
pObj->pNext = (Abc_Obj_t *)(PORT_PTRINT_T)i;
|
||||
// start the support computation manager
|
||||
p = Supp_ManStart( 1 << 20, 1 << 6 );
|
||||
// consider objects in the topological order
|
||||
|
|
@ -353,7 +353,7 @@ Vec_Ptr_t * Abc_NtkComputeSupportsSmart( Abc_Ntk_t * pNtk )
|
|||
if ( Abc_ObjIsNode(Abc_ObjFanin0(pObj)) )
|
||||
{
|
||||
vSupp = Supp_ManTransferEntry(pPart0);
|
||||
Vec_IntPush( vSupp, (int)pObj->pNext );
|
||||
Vec_IntPush( vSupp, (int)(PORT_PTRINT_T)pObj->pNext );
|
||||
Vec_PtrPush( vSupports, vSupp );
|
||||
}
|
||||
assert( pPart0->nRefs > 0 );
|
||||
|
|
@ -366,7 +366,7 @@ Vec_Ptr_t * Abc_NtkComputeSupportsSmart( Abc_Ntk_t * pNtk )
|
|||
if ( Abc_ObjFanoutNum(pObj) )
|
||||
{
|
||||
pPart0 = (Supp_One_t *)Supp_ManFetchEntry( p, 1, Abc_ObjFanoutNum(pObj) );
|
||||
pPart0->pOuts[ pPart0->nOuts++ ] = (int)pObj->pNext;
|
||||
pPart0->pOuts[ pPart0->nOuts++ ] = (int)(PORT_PTRINT_T)pObj->pNext;
|
||||
pObj->pCopy = (Abc_Obj_t *)pPart0;
|
||||
}
|
||||
continue;
|
||||
|
|
@ -417,7 +417,7 @@ Vec_Ptr_t * Abc_NtkComputeSupportsNaive( Abc_Ntk_t * pNtk )
|
|||
int i, k;
|
||||
// set the PI numbers
|
||||
Abc_NtkForEachCi( pNtk, pObj, i )
|
||||
pObj->pNext = (void *)i;
|
||||
pObj->pNext = (void *)(PORT_PTRINT_T)i;
|
||||
// save the CI numbers
|
||||
vSupports = Vec_PtrAlloc( Abc_NtkCoNum(pNtk) );
|
||||
Abc_NtkForEachCo( pNtk, pObj, i )
|
||||
|
|
@ -427,7 +427,7 @@ Vec_Ptr_t * Abc_NtkComputeSupportsNaive( Abc_Ntk_t * pNtk )
|
|||
vSupp = Abc_NtkNodeSupport( pNtk, &pObj, 1 );
|
||||
vSuppI = (Vec_Int_t *)vSupp;
|
||||
Vec_PtrForEachEntry( vSupp, pTemp, k )
|
||||
Vec_IntWriteEntry( vSuppI, k, (int)pTemp->pNext );
|
||||
Vec_IntWriteEntry( vSuppI, k, (int)(PORT_PTRINT_T)pTemp->pNext );
|
||||
Vec_IntSort( vSuppI, 0 );
|
||||
// append the number of this output
|
||||
Vec_IntPush( vSuppI, i );
|
||||
|
|
|
|||
|
|
@ -80,11 +80,11 @@ int Abc_NtkCompareAndSaveBest( Abc_Ntk_t * pNtk )
|
|||
ParsNew.nPis = Abc_NtkPiNum( pNtk );
|
||||
ParsNew.nPos = Abc_NtkPoNum( pNtk );
|
||||
// reset the parameters if the network has the same name
|
||||
if ( ParsBest.pName == NULL ||
|
||||
strcmp(ParsBest.pName, pNtk->pName) ||
|
||||
ParsBest.Depth > ParsNew.Depth ||
|
||||
ParsBest.Depth == ParsNew.Depth && ParsBest.Flops > ParsNew.Flops ||
|
||||
ParsBest.Depth == ParsNew.Depth && ParsBest.Flops == ParsNew.Flops && ParsBest.Nodes > ParsNew.Nodes )
|
||||
if ( ParsBest.pName == NULL ||
|
||||
strcmp(ParsBest.pName, pNtk->pName) ||
|
||||
ParsBest.Depth > ParsNew.Depth ||
|
||||
(ParsBest.Depth == ParsNew.Depth && ParsBest.Flops > ParsNew.Flops) ||
|
||||
(ParsBest.Depth == ParsNew.Depth && ParsBest.Flops == ParsNew.Flops && ParsBest.Nodes > ParsNew.Nodes) )
|
||||
{
|
||||
FREE( ParsBest.pName );
|
||||
ParsBest.pName = Extra_UtilStrsav( pNtk->pName );
|
||||
|
|
@ -145,9 +145,9 @@ void Abc_NtkPrintStats( FILE * pFile, Abc_Ntk_t * pNtk, int fFactored, int fSave
|
|||
else if ( Abc_NtkIsStrash(pNtk) )
|
||||
{
|
||||
fprintf( pFile, " and = %5d", Abc_NtkNodeNum(pNtk) );
|
||||
if ( Num = Abc_NtkGetChoiceNum(pNtk) )
|
||||
if ( (Num = Abc_NtkGetChoiceNum(pNtk)) )
|
||||
fprintf( pFile, " (choice = %d)", Num );
|
||||
if ( Num = Abc_NtkGetExorNum(pNtk) )
|
||||
if ( (Num = Abc_NtkGetExorNum(pNtk)) )
|
||||
fprintf( pFile, " (exor = %d)", Num );
|
||||
// if ( Num2 = Abc_NtkGetMuxNum(pNtk) )
|
||||
// fprintf( pFile, " (mux = %d)", Num2-Num );
|
||||
|
|
@ -930,7 +930,7 @@ void Abc_NtkPrintGates( Abc_Ntk_t * pNtk, int fUseLibrary )
|
|||
return;
|
||||
|
||||
// transform logic functions from BDD to SOP
|
||||
if ( fHasBdds = Abc_NtkIsBddLogic(pNtk) )
|
||||
if ( (fHasBdds = Abc_NtkIsBddLogic(pNtk)) )
|
||||
{
|
||||
if ( !Abc_NtkBddToSop(pNtk, 0) )
|
||||
{
|
||||
|
|
@ -955,9 +955,11 @@ void Abc_NtkPrintGates( Abc_Ntk_t * pNtk, int fUseLibrary )
|
|||
CountBuf++;
|
||||
else if ( Abc_SopIsInv(pSop) )
|
||||
CountInv++;
|
||||
else if ( !Abc_SopIsComplement(pSop) && Abc_SopIsAndType(pSop) || Abc_SopIsComplement(pSop) && Abc_SopIsOrType(pSop) )
|
||||
else if ( (!Abc_SopIsComplement(pSop) && Abc_SopIsAndType(pSop)) ||
|
||||
( Abc_SopIsComplement(pSop) && Abc_SopIsOrType(pSop)) )
|
||||
CountAnd++;
|
||||
else if ( Abc_SopIsComplement(pSop) && Abc_SopIsAndType(pSop) || !Abc_SopIsComplement(pSop) && Abc_SopIsOrType(pSop) )
|
||||
else if ( ( Abc_SopIsComplement(pSop) && Abc_SopIsAndType(pSop)) ||
|
||||
(!Abc_SopIsComplement(pSop) && Abc_SopIsOrType(pSop)) )
|
||||
CountOr++;
|
||||
else
|
||||
CountOther++;
|
||||
|
|
@ -1127,7 +1129,7 @@ void Abc_ObjPrint( FILE * pFile, Abc_Obj_t * pObj )
|
|||
*/
|
||||
// print the logic function
|
||||
if ( Abc_ObjIsNode(pObj) && Abc_NtkIsSopLogic(pObj->pNtk) )
|
||||
fprintf( pFile, " %s", pObj->pData );
|
||||
fprintf( pFile, " %s", (char*)pObj->pData );
|
||||
else
|
||||
fprintf( pFile, "\n" );
|
||||
}
|
||||
|
|
|
|||
|
|
@ -55,7 +55,7 @@ int Abc_NtkMiterProve( Abc_Ntk_t ** ppNtk, void * pPars )
|
|||
{
|
||||
Prove_Params_t * pParams = pPars;
|
||||
Abc_Ntk_t * pNtk, * pNtkTemp;
|
||||
int RetValue, nIter, nSatFails, Counter, clk, timeStart = clock();
|
||||
int RetValue = -1, nIter, nSatFails, Counter, clk; //, timeStart = clock();
|
||||
sint64 nSatConfs, nSatInspects, nInspectLimit;
|
||||
|
||||
// get the starting network
|
||||
|
|
|
|||
|
|
@ -132,10 +132,10 @@ DdNode ** Abc_NtkCreatePartitions( DdManager * dd, Abc_Ntk_t * pNtk, int fReorde
|
|||
DdNode * Abc_NtkComputeReachable( DdManager * dd, Abc_Ntk_t * pNtk, DdNode ** pbParts, DdNode * bInitial, DdNode * bOutput, int nBddMax, int nIterMax, int fPartition, int fReorder, int fVerbose )
|
||||
{
|
||||
int fInternalReorder = 0;
|
||||
Extra_ImageTree_t * pTree;
|
||||
Extra_ImageTree2_t * pTree2;
|
||||
Extra_ImageTree_t * pTree = NULL;
|
||||
Extra_ImageTree2_t * pTree2 = NULL;
|
||||
DdNode * bReached, * bCubeCs;
|
||||
DdNode * bCurrent, * bNext, * bTemp;
|
||||
DdNode * bCurrent, * bNext = NULL, * bTemp;
|
||||
DdNode ** pbVarsY;
|
||||
Abc_Obj_t * pLatch;
|
||||
int i, nIters, nBddSize;
|
||||
|
|
@ -159,6 +159,7 @@ DdNode * Abc_NtkComputeReachable( DdManager * dd, Abc_Ntk_t * pNtk, DdNode ** pb
|
|||
// perform reachability analisys
|
||||
bCurrent = bInitial; Cudd_Ref( bCurrent );
|
||||
bReached = bInitial; Cudd_Ref( bReached );
|
||||
assert( nIterMax > 1 ); // required to not deref uninitialized bNext
|
||||
for ( nIters = 1; nIters <= nIterMax; nIters++ )
|
||||
{
|
||||
// compute the next states
|
||||
|
|
|
|||
|
|
@ -232,11 +232,6 @@ p->timeTruth += clock() - clk;
|
|||
pObj = Abc_ObjFanin0(pObj);
|
||||
pTruth = Vec_PtrEntry( p->vTtNodes, pObj->Id );
|
||||
|
||||
if ( pTruth[0] == 1128481603 )
|
||||
{
|
||||
int x = 0;
|
||||
}
|
||||
|
||||
// add the resulting truth table to the hash table
|
||||
ppSpot = Abc_NtkRecTableLookup( p, pTruth, p->nVars );
|
||||
assert( pObj->pEquiv == NULL );
|
||||
|
|
@ -777,7 +772,7 @@ int Abc_NtkRecAddCut( If_Man_t * pIfMan, If_Obj_t * pRoot, If_Cut_t * pCut )
|
|||
static int s_MaxSize[16] = { 0 };
|
||||
char Buffer[40], Name[20], Truth[20];
|
||||
char pCanonPerm[16];
|
||||
Abc_Obj_t * pObj, * pFanin0, * pFanin1, ** ppSpot, * pObjPo;
|
||||
Abc_Obj_t * pObj = NULL, * pFanin0, * pFanin1, ** ppSpot, * pObjPo;
|
||||
Abc_Ntk_t * pAig = s_pMan->pNtk;
|
||||
If_Obj_t * pIfObj;
|
||||
Vec_Ptr_t * vNodes = s_pMan->vNodes;
|
||||
|
|
@ -788,11 +783,6 @@ int Abc_NtkRecAddCut( If_Man_t * pIfMan, If_Obj_t * pRoot, If_Cut_t * pCut )
|
|||
unsigned uCanonPhase;
|
||||
int clk;
|
||||
|
||||
if ( pRoot->Id == 2639 )
|
||||
{
|
||||
int y = 0;
|
||||
}
|
||||
|
||||
assert( nInputs <= 16 );
|
||||
assert( nInputs == (int)pCut->nLimit );
|
||||
s_pMan->nTried++;
|
||||
|
|
@ -848,7 +838,7 @@ s_pMan->timeCanon += clock() - clk;
|
|||
for ( i = 0; i < nLeaves; i++ )
|
||||
{
|
||||
// get hold of the corresponding leaf
|
||||
pIfObj = If_ManObj( pIfMan, pCut->pLeaves[pCanonPerm[i]] );
|
||||
pIfObj = If_ManObj( pIfMan, pCut->pLeaves[(int)pCanonPerm[i]] );
|
||||
// get hold of the corresponding new node
|
||||
pObj = Abc_NtkPi( pAig, i );
|
||||
pObj = Abc_ObjNotCond( pObj, (uCanonPhase & (1 << i)) );
|
||||
|
|
@ -897,6 +887,7 @@ s_pMan->timeCanon += clock() - clk;
|
|||
}
|
||||
}
|
||||
|
||||
assert(pObj);
|
||||
pTruth = Vec_PtrEntry( s_pMan->vTtNodes, pObj->Id );
|
||||
if ( Kit_TruthSupport(pTruth, nInputs) != Kit_BitMask(nLeaves) )
|
||||
{
|
||||
|
|
|
|||
|
|
@ -384,8 +384,8 @@ int Abc_NodeBuildCutLevelOne_int( Vec_Ptr_t * vVisited, Vec_Ptr_t * vLeaves, int
|
|||
***********************************************************************/
|
||||
int Abc_NodeBuildCutLevelTwo_int( Vec_Ptr_t * vVisited, Vec_Ptr_t * vLeaves, int nFaninLimit )
|
||||
{
|
||||
Abc_Obj_t * pNode, * pLeafToAdd, * pNodeToMark1, * pNodeToMark2;
|
||||
int CostCur, i;
|
||||
Abc_Obj_t * pNode = NULL, * pLeafToAdd, * pNodeToMark1, * pNodeToMark2;
|
||||
int CostCur = 0, i;
|
||||
// find the best fanin
|
||||
Vec_PtrForEachEntry( vLeaves, pNode, i )
|
||||
{
|
||||
|
|
@ -494,7 +494,7 @@ void Abc_NodeConeMarkCollect_rec( Abc_Obj_t * pNode, Vec_Ptr_t * vVisited )
|
|||
DdNode * Abc_NodeConeBdd( DdManager * dd, DdNode ** pbVars, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vVisited )
|
||||
{
|
||||
Abc_Obj_t * pNode;
|
||||
DdNode * bFunc0, * bFunc1, * bFunc;
|
||||
DdNode * bFunc0, * bFunc1, * bFunc = NULL;
|
||||
int i;
|
||||
// get the nodes in the cut without fanins in the DFS order
|
||||
Abc_NodeConeCollect( &pRoot, 1, vLeaves, vVisited, 0 );
|
||||
|
|
@ -510,6 +510,7 @@ DdNode * Abc_NodeConeBdd( DdManager * dd, DdNode ** pbVars, Abc_Obj_t * pRoot, V
|
|||
bFunc = Cudd_bddAnd( dd, bFunc0, bFunc1 ); Cudd_Ref( bFunc );
|
||||
pNode->pCopy = (Abc_Obj_t *)bFunc;
|
||||
}
|
||||
assert(bFunc);
|
||||
Cudd_Ref( bFunc );
|
||||
// dereference the intermediate ones
|
||||
Vec_PtrForEachEntry( vVisited, pNode, i )
|
||||
|
|
|
|||
|
|
@ -267,7 +267,7 @@ clk = clock();
|
|||
nNodesAdded = Dec_GraphToNetworkCount( pNode, pFForm, nNodesSaved, Required );
|
||||
p->timeEval += clock() - clk;
|
||||
// quit if there is no improvement
|
||||
if ( nNodesAdded == -1 || nNodesAdded == nNodesSaved && !fUseZeros )
|
||||
if ( nNodesAdded == -1 || (nNodesAdded == nNodesSaved && !fUseZeros) )
|
||||
{
|
||||
Cudd_RecursiveDeref( p->dd, bNodeFunc );
|
||||
Dec_GraphFree( pFForm );
|
||||
|
|
|
|||
|
|
@ -295,7 +295,7 @@ Dec_Graph_t * Abc_NodeRestructure( Abc_ManRst_t * p, Abc_Obj_t * pNode, Cut_Cut_
|
|||
{
|
||||
if ( pCut->nLeaves < 4 )
|
||||
continue;
|
||||
if ( pGraph = Abc_NodeRestructureCut( p, pNode, pCut ) )
|
||||
if ( (pGraph = Abc_NodeRestructureCut( p, pNode, pCut )) )
|
||||
return pGraph;
|
||||
}
|
||||
return NULL;
|
||||
|
|
@ -337,11 +337,6 @@ Dec_Graph_t * Abc_NodeRestructureCut( Abc_ManRst_t * p, Abc_Obj_t * pRoot, Cut_C
|
|||
Vec_PtrPush( p->vLeaves, pLeaf );
|
||||
}
|
||||
|
||||
if ( pRoot->Id == 29 )
|
||||
{
|
||||
int x = 0;
|
||||
}
|
||||
|
||||
clk = clock();
|
||||
// collect the internal nodes of the cut
|
||||
// Abc_NodeConeCollect( &pRoot, 1, p->vLeaves, p->vVisited, 0 );
|
||||
|
|
@ -430,7 +425,7 @@ clk = clock();
|
|||
p->timeEval += clock() - clk;
|
||||
|
||||
// quit if there is no improvement
|
||||
if ( pGraph == NULL || nNodesAdded == -1 || nNodesAdded == nNodesSaved && !p->fUseZeros )
|
||||
if ( pGraph == NULL || nNodesAdded == -1 || (nNodesAdded == nNodesSaved && !p->fUseZeros) )
|
||||
{
|
||||
Cudd_RecursiveDeref( p->dd, bFunc );
|
||||
if ( pGraph ) Dec_GraphFree( pGraph );
|
||||
|
|
@ -1206,16 +1201,16 @@ void Abc_NodeMffcSimulate( Vec_Ptr_t * vDecs, int nLeaves, Vec_Int_t * vRands, V
|
|||
Vec_PtrForEachEntryStop( vDecs, pObj, i, nLeaves )
|
||||
{
|
||||
uData = (unsigned)Vec_IntEntry( vRands, i );
|
||||
pObj->pData = (void *)uData;
|
||||
pObj->pData = (void *)(PORT_PTRUINT_T)uData;
|
||||
Vec_IntPush( vSims, uData );
|
||||
}
|
||||
// simulate
|
||||
Vec_PtrForEachEntryStart( vDecs, pObj, i, nLeaves )
|
||||
{
|
||||
uData0 = (unsigned)Abc_ObjFanin0(pObj)->pData;
|
||||
uData1 = (unsigned)Abc_ObjFanin1(pObj)->pData;
|
||||
uData0 = (unsigned)(PORT_PTRUINT_T)Abc_ObjFanin0(pObj)->pData;
|
||||
uData1 = (unsigned)(PORT_PTRUINT_T)Abc_ObjFanin1(pObj)->pData;
|
||||
uData = (Abc_ObjFaninC0(pObj)? ~uData0 : uData0) & (Abc_ObjFaninC1(pObj)? ~uData1 : uData1);
|
||||
pObj->pData = (void *)uData;
|
||||
pObj->pData = (void *)(PORT_PTRUINT_T)uData;
|
||||
Vec_IntPush( vSims, uData );
|
||||
}
|
||||
}
|
||||
|
|
@ -1248,7 +1243,7 @@ int Abc_NodeCheckFull( Abc_ManRst_t * p, Dec_Graph_t * pGraph )
|
|||
***********************************************************************/
|
||||
Dec_Graph_t * Abc_NodeMffcConstants( Abc_ManRst_t * p, Vec_Int_t * vSims )
|
||||
{
|
||||
Dec_Graph_t * pGraph;
|
||||
Dec_Graph_t * pGraph = NULL;
|
||||
unsigned uRoot;
|
||||
// get the root node
|
||||
uRoot = (unsigned)Vec_IntEntryLast( vSims );
|
||||
|
|
@ -1258,6 +1253,7 @@ Dec_Graph_t * Abc_NodeMffcConstants( Abc_ManRst_t * p, Vec_Int_t * vSims )
|
|||
else if ( uRoot == ~(unsigned)0 )
|
||||
pGraph = Dec_GraphCreateConst1();
|
||||
// check the graph
|
||||
assert(pGraph);
|
||||
if ( Abc_NodeCheckFull( p, pGraph ) )
|
||||
return pGraph;
|
||||
Dec_GraphFree( pGraph );
|
||||
|
|
|
|||
|
|
@ -164,9 +164,10 @@ int Abc_NtkResubstitute( Abc_Ntk_t * pNtk, int nCutMax, int nStepsMax, int nLeve
|
|||
if ( fUpdateLevel )
|
||||
Abc_NtkStartReverseLevels( pNtk, 0 );
|
||||
|
||||
if ( Abc_NtkLatchNum(pNtk) )
|
||||
if ( Abc_NtkLatchNum(pNtk) ) {
|
||||
Abc_NtkForEachLatch(pNtk, pNode, i)
|
||||
pNode->pNext = pNode->pData;
|
||||
}
|
||||
|
||||
// resynthesize each node once
|
||||
pManRes->nNodesBeg = Abc_NtkNodeNum(pNtk);
|
||||
|
|
@ -249,9 +250,10 @@ pManRes->timeTotal = clock() - clkStart;
|
|||
Abc_NtkForEachObj( pNtk, pNode, i )
|
||||
pNode->pData = NULL;
|
||||
|
||||
if ( Abc_NtkLatchNum(pNtk) )
|
||||
if ( Abc_NtkLatchNum(pNtk) ) {
|
||||
Abc_NtkForEachLatch(pNtk, pNode, i)
|
||||
pNode->pData = pNode->pNext, pNode->pNext = NULL;
|
||||
}
|
||||
|
||||
// put the nodes into the DFS order and reassign their IDs
|
||||
Abc_NtkReassignIds( pNtk );
|
||||
|
|
@ -1131,7 +1133,7 @@ Dec_Graph_t * Abc_ManResubDivs1( Abc_ManRes_t * p, int Required )
|
|||
***********************************************************************/
|
||||
Dec_Graph_t * Abc_ManResubDivs12( Abc_ManRes_t * p, int Required )
|
||||
{
|
||||
Abc_Obj_t * pObj0, * pObj1, * pObj2, * pObjMax, * pObjMin0, * pObjMin1;
|
||||
Abc_Obj_t * pObj0, * pObj1, * pObj2, * pObjMax, * pObjMin0 = NULL, * pObjMin1 = NULL;
|
||||
unsigned * puData0, * puData1, * puData2, * puDataR;
|
||||
int i, k, j, w, LevelMax;
|
||||
puDataR = p->pRoot->pData;
|
||||
|
|
@ -1169,6 +1171,8 @@ Dec_Graph_t * Abc_ManResubDivs12( Abc_ManRes_t * p, int Required )
|
|||
}
|
||||
|
||||
p->nUsedNode2Or++;
|
||||
assert(pObjMin0);
|
||||
assert(pObjMin1);
|
||||
return Abc_ManResubQuit21( p->pRoot, pObjMin0, pObjMin1, pObjMax, 1 );
|
||||
}
|
||||
}
|
||||
|
|
@ -1208,6 +1212,8 @@ Dec_Graph_t * Abc_ManResubDivs12( Abc_ManRes_t * p, int Required )
|
|||
}
|
||||
|
||||
p->nUsedNode2And++;
|
||||
assert(pObjMin0);
|
||||
assert(pObjMin1);
|
||||
return Abc_ManResubQuit21( p->pRoot, pObjMin0, pObjMin1, pObjMax, 0 );
|
||||
}
|
||||
}
|
||||
|
|
@ -1341,7 +1347,7 @@ Dec_Graph_t * Abc_ManResubDivs3( Abc_ManRes_t * p, int Required )
|
|||
{
|
||||
Abc_Obj_t * pObj0, * pObj1, * pObj2, * pObj3;
|
||||
unsigned * puData0, * puData1, * puData2, * puData3, * puDataR;
|
||||
int i, k, w, Flag;
|
||||
int i, k, w = 0, Flag;
|
||||
puDataR = p->pRoot->pData;
|
||||
// check positive unate divisors
|
||||
Vec_PtrForEachEntry( p->vDivs2UP0, pObj0, i )
|
||||
|
|
@ -1653,7 +1659,7 @@ p->timeSim += clock() - clk;
|
|||
|
||||
clk = clock();
|
||||
// consider constants
|
||||
if ( pGraph = Abc_ManResubQuit( p ) )
|
||||
if ( (pGraph = Abc_ManResubQuit( p )) )
|
||||
{
|
||||
p->nUsedNodeC++;
|
||||
p->nLastGain = p->nMffc;
|
||||
|
|
@ -1661,7 +1667,7 @@ clk = clock();
|
|||
}
|
||||
|
||||
// consider equal nodes
|
||||
if ( pGraph = Abc_ManResubDivs0( p ) )
|
||||
if ( (pGraph = Abc_ManResubDivs0( p )) )
|
||||
{
|
||||
p->timeRes1 += clock() - clk;
|
||||
p->nUsedNode0++;
|
||||
|
|
@ -1678,7 +1684,7 @@ p->timeRes1 += clock() - clk;
|
|||
Abc_ManResubDivsS( p, Required );
|
||||
|
||||
// consider one node
|
||||
if ( pGraph = Abc_ManResubDivs1( p, Required ) )
|
||||
if ( (pGraph = Abc_ManResubDivs1( p, Required )) )
|
||||
{
|
||||
p->timeRes1 += clock() - clk;
|
||||
p->nLastGain = p->nMffc - 1;
|
||||
|
|
@ -1690,7 +1696,7 @@ p->timeRes1 += clock() - clk;
|
|||
|
||||
clk = clock();
|
||||
// consider triples
|
||||
if ( pGraph = Abc_ManResubDivs12( p, Required ) )
|
||||
if ( (pGraph = Abc_ManResubDivs12( p, Required )) )
|
||||
{
|
||||
p->timeRes2 += clock() - clk;
|
||||
p->nLastGain = p->nMffc - 2;
|
||||
|
|
@ -1705,7 +1711,7 @@ p->timeResD += clock() - clk;
|
|||
|
||||
// consider two nodes
|
||||
clk = clock();
|
||||
if ( pGraph = Abc_ManResubDivs2( p, Required ) )
|
||||
if ( (pGraph = Abc_ManResubDivs2( p, Required )) )
|
||||
{
|
||||
p->timeRes2 += clock() - clk;
|
||||
p->nLastGain = p->nMffc - 2;
|
||||
|
|
@ -1717,7 +1723,7 @@ p->timeRes2 += clock() - clk;
|
|||
|
||||
// consider two nodes
|
||||
clk = clock();
|
||||
if ( pGraph = Abc_ManResubDivs3( p, Required ) )
|
||||
if ( (pGraph = Abc_ManResubDivs3( p, Required )) )
|
||||
{
|
||||
p->timeRes3 += clock() - clk;
|
||||
p->nLastGain = p->nMffc - 3;
|
||||
|
|
@ -1880,7 +1886,7 @@ Vec_Ptr_t * Abc_CutFactorLarge( Abc_Obj_t * pNode, int nLeavesMax )
|
|||
vFeasible = Vec_IntAlloc( nLeavesMax );
|
||||
while ( 1 )
|
||||
{
|
||||
BestCut = -1;
|
||||
BestCut = -1, BestShare = -1;
|
||||
// find the next feasible cut to add
|
||||
Vec_IntClear( vFeasible );
|
||||
Vec_PtrForEachEntry( vFactors, vFact, i )
|
||||
|
|
|
|||
|
|
@ -62,7 +62,7 @@ int Abc_NtkRewrite( Abc_Ntk_t * pNtk, int fUpdateLevel, int fUseZeros, int fVerb
|
|||
Cut_Man_t * pManCut;
|
||||
Rwr_Man_t * pManRwr;
|
||||
Abc_Obj_t * pNode;
|
||||
Vec_Ptr_t * vAddedCells = NULL, * vUpdatedNets = NULL;
|
||||
// Vec_Ptr_t * vAddedCells = NULL, * vUpdatedNets = NULL;
|
||||
Dec_Graph_t * pGraph;
|
||||
int i, nNodes, nGain, fCompl;
|
||||
int clk, clkStart = clock();
|
||||
|
|
@ -120,7 +120,7 @@ Rwr_ManAddTimeCuts( pManRwr, clock() - clk );
|
|||
|
||||
// for each cut, try to resynthesize it
|
||||
nGain = Rwr_NodeRewrite( pManRwr, pManCut, pNode, fUpdateLevel, fUseZeros, fPlaceEnable );
|
||||
if ( !(nGain > 0 || nGain == 0 && fUseZeros) )
|
||||
if ( !(nGain > 0 || (nGain == 0 && fUseZeros)) )
|
||||
continue;
|
||||
// if we end up here, a rewriting step is accepted
|
||||
|
||||
|
|
|
|||
|
|
@ -729,16 +729,16 @@ void Abc_NtkRRSimulateStart( Abc_Ntk_t * pNtk )
|
|||
int i;
|
||||
Abc_AigConst1(pNtk)->pData = (void *)~((unsigned)0);
|
||||
Abc_NtkForEachCi( pNtk, pObj, i )
|
||||
pObj->pData = (void *)SIM_RANDOM_UNSIGNED;
|
||||
pObj->pData = (void *)(PORT_PTRUINT_T)SIM_RANDOM_UNSIGNED;
|
||||
Abc_NtkForEachNode( pNtk, pObj, i )
|
||||
{
|
||||
if ( i == 0 ) continue;
|
||||
uData0 = (unsigned)Abc_ObjFanin0(pObj)->pData;
|
||||
uData1 = (unsigned)Abc_ObjFanin1(pObj)->pData;
|
||||
uData0 = (unsigned)(PORT_PTRUINT_T)Abc_ObjFanin0(pObj)->pData;
|
||||
uData1 = (unsigned)(PORT_PTRUINT_T)Abc_ObjFanin1(pObj)->pData;
|
||||
uData = Abc_ObjFaninC0(pObj)? ~uData0 : uData0;
|
||||
uData &= Abc_ObjFaninC1(pObj)? ~uData1 : uData1;
|
||||
assert( pObj->pData == NULL );
|
||||
pObj->pData = (void *)uData;
|
||||
pObj->pData = (void *)(PORT_PTRUINT_T)uData;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -802,24 +802,24 @@ Vec_Str_t * Abc_NtkRRSimulate( Abc_Ntk_t * pNtk )
|
|||
// simulate patters and store them in copy
|
||||
Abc_AigConst1(pNtk)->pCopy = (Abc_Obj_t *)~((unsigned)0);
|
||||
Abc_NtkForEachCi( pNtk, pObj, i )
|
||||
pObj->pCopy = (Abc_Obj_t *)SIM_RANDOM_UNSIGNED;
|
||||
pObj->pCopy = (Abc_Obj_t *)(PORT_PTRUINT_T)SIM_RANDOM_UNSIGNED;
|
||||
Abc_NtkForEachNode( pNtk, pObj, i )
|
||||
{
|
||||
if ( i == 0 ) continue;
|
||||
uData0 = (unsigned)Abc_ObjFanin0(pObj)->pData;
|
||||
uData1 = (unsigned)Abc_ObjFanin1(pObj)->pData;
|
||||
uData0 = (unsigned)(PORT_PTRUINT_T)Abc_ObjFanin0(pObj)->pData;
|
||||
uData1 = (unsigned)(PORT_PTRUINT_T)Abc_ObjFanin1(pObj)->pData;
|
||||
uData = Abc_ObjFaninC0(pObj)? ~uData0 : uData0;
|
||||
uData &= Abc_ObjFaninC1(pObj)? ~uData1 : uData1;
|
||||
pObj->pCopy = (Abc_Obj_t *)uData;
|
||||
pObj->pCopy = (Abc_Obj_t *)(PORT_PTRUINT_T)uData;
|
||||
}
|
||||
// store the result in data
|
||||
Abc_NtkForEachCo( pNtk, pObj, i )
|
||||
{
|
||||
uData0 = (unsigned)Abc_ObjFanin0(pObj)->pData;
|
||||
uData0 = (unsigned)(PORT_PTRUINT_T)Abc_ObjFanin0(pObj)->pData;
|
||||
if ( Abc_ObjFaninC0(pObj) )
|
||||
pObj->pData = (void *)~uData0;
|
||||
pObj->pData = (void *)(PORT_PTRUINT_T)~uData0;
|
||||
else
|
||||
pObj->pData = (void *)uData0;
|
||||
pObj->pData = (void *)(PORT_PTRUINT_T)uData0;
|
||||
}
|
||||
|
||||
// refine the candidates
|
||||
|
|
@ -904,7 +904,7 @@ void Sim_CollectNodes_rec( Abc_Obj_t * pRoot, Vec_Ptr_t * vField )
|
|||
Abc_ObjForEachFanin( pRoot, pFanin, i )
|
||||
Sim_CollectNodes_rec( pFanin, vField );
|
||||
if ( !Abc_ObjIsCo(pRoot) )
|
||||
pRoot->pData = (void *)Vec_PtrSize(vField);
|
||||
pRoot->pData = (void *)(PORT_PTRUINT_T)Vec_PtrSize(vField);
|
||||
Vec_PtrPush( vField, pRoot );
|
||||
}
|
||||
|
||||
|
|
@ -934,13 +934,13 @@ void Sim_SimulateCollected( Vec_Str_t * vTargets, Vec_Ptr_t * vNodes, Vec_Ptr_t
|
|||
{
|
||||
pUnsigned = Vec_PtrEntry( vSims, i );
|
||||
for ( k = 0; k < Vec_PtrSize(vNodes); k++ )
|
||||
pUnsigned[k] = (unsigned)pObj->pCopy;
|
||||
pUnsigned[k] = (unsigned)(PORT_PTRUINT_T)pObj->pCopy;
|
||||
continue;
|
||||
}
|
||||
if ( Abc_ObjIsCo(pObj) )
|
||||
{
|
||||
pUnsigned = Vec_PtrEntry( vSims, i );
|
||||
pUnsignedF = Vec_PtrEntry( vSims, (int)Abc_ObjFanin0(pObj)->pData );
|
||||
pUnsignedF = Vec_PtrEntry( vSims, (int)(PORT_PTRUINT_T)Abc_ObjFanin0(pObj)->pData );
|
||||
if ( Abc_ObjFaninC0(pObj) )
|
||||
for ( k = 0; k < Vec_PtrSize(vNodes); k++ )
|
||||
pUnsigned[k] = ~pUnsignedF[k];
|
||||
|
|
@ -950,7 +950,7 @@ void Sim_SimulateCollected( Vec_Str_t * vTargets, Vec_Ptr_t * vNodes, Vec_Ptr_t
|
|||
// update targets
|
||||
for ( k = 0; k < Vec_PtrSize(vNodes); k++ )
|
||||
{
|
||||
if ( pUnsigned[k] == (unsigned)pObj->pData )
|
||||
if ( pUnsigned[k] == (unsigned)(PORT_PTRUINT_T)pObj->pData )
|
||||
continue;
|
||||
pDisproved = Vec_PtrEntry( vNodes, k );
|
||||
fCompl = Abc_ObjIsComplement(pDisproved);
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue