mirror of https://github.com/YosysHQ/abc.git
Corner-case bug fix in SAT-based sim info generation.
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71fd9165e3
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2dfadb9607
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@ -221,20 +221,22 @@ int Gia_ManSimBitPackOne( int nWords, Vec_Wrd_t * vSimsIn, Vec_Wrd_t * vSimsCare
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}
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return (int)(i == iPat);
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}
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Vec_Wrd_t * Gia_ManSimBitPacking( Gia_Man_t * p, Vec_Int_t * vCexStore, int nCexes )
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Vec_Wrd_t * Gia_ManSimBitPacking( Gia_Man_t * p, Vec_Int_t * vCexStore, int nCexes, int nUnDecs )
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{
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int c, iCur = 0, iPat = 0;
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int nWordsMax = Abc_Bit6WordNum( nCexes );
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Vec_Wrd_t * vSimsIn = Vec_WrdStartRandom( Gia_ManCiNum(p) * nWordsMax );
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Vec_Wrd_t * vSimsCare = Vec_WrdStart( Gia_ManCiNum(p) * nWordsMax );
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Vec_Wrd_t * vSimsRes = NULL;
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for ( c = 0; c < nCexes; c++ )
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for ( c = 0; c < nCexes + nUnDecs; c++ )
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{
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int Out = Vec_IntEntry( vCexStore, iCur++ );
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int Size = Vec_IntEntry( vCexStore, iCur++ );
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if ( Size == -1 )
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continue;
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iPat += Gia_ManSimBitPackOne( nWordsMax, vSimsIn, vSimsCare, iPat, Vec_IntEntryP(vCexStore, iCur), Size );
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iCur += Size;
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assert( iPat <= nCexes );
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assert( iPat <= nCexes + nUnDecs );
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Out = 0;
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}
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printf( "Compressed %d CEXes into %d test patterns.\n", nCexes, iPat );
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@ -430,7 +432,7 @@ void Gia_ManSimPat( Gia_Man_t * p, int nWords0, int fVerbose )
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printf( "There are no counter-examples. No need for more simulation.\n" );
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else
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{
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vSimsIn = Gia_ManSimBitPacking( p, vCexStore, Counts[1] );
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vSimsIn = Gia_ManSimBitPacking( p, vCexStore, Counts[1], Counts[0] );
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Vec_WrdFreeP( &p->vSimsPi );
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p->vSimsPi = vSimsIn;
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Gia_ManSimProfile( p );
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