mirror of https://github.com/YosysHQ/abc.git
Added sharing of counter-examples across multiple failed properties in 'bmc3 -a'.
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@ -1348,6 +1348,26 @@ Abc_Cex_t * Saig_ManGenerateCex( Gia_ManBmc_t * p, int f, int i )
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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int Saig_ManCallSolver( Gia_ManBmc_t * p, int Lit )
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{
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if ( Lit == 0 )
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return l_False;
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if ( Lit == 1 )
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return l_True;
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return sat_solver_solve( p->pSat, &Lit, &Lit + 1, (ABC_INT64_T)p->pPars->nConfLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
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}
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/**Function*************************************************************
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Synopsis [Bounded model checking engine.]
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@ -1363,7 +1383,7 @@ int Saig_ManBmcScalable( Aig_Man_t * pAig, Saig_ParBmc_t * pPars )
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{
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Gia_ManBmc_t * p;
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Aig_Obj_t * pObj;
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Abc_Cex_t * pCexNew;
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Abc_Cex_t * pCexNew, * pCexNew0;
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unsigned * pInfo;
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int RetValue = -1, fFirst = 1, nJumpFrame = 0, fUnfinished = 0;
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int nOutDigits = Abc_Base10Log( Saig_ManPoNum(pAig) );
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@ -1446,6 +1466,37 @@ int Saig_ManBmcScalable( Aig_Man_t * pAig, Saig_ParBmc_t * pPars )
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}
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if ( (pPars->nStart && f < pPars->nStart) || (nJumpFrame && f < nJumpFrame) )
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continue;
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// create CNF upfront
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if ( pPars->fSolveAll )
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{
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Saig_ManForEachPo( pAig, pObj, i )
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{
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if ( i >= Saig_ManPoNum(pAig) )
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break;
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// check for timeout
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if ( pPars->nTimeOutGap && pPars->timeLastSolved && Abc_Clock() > pPars->timeLastSolved + pPars->nTimeOutGap * CLOCKS_PER_SEC )
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{
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Abc_Print( 1, "Reached gap timeout (%d seconds).\n", pPars->nTimeOutGap );
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goto finish;
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}
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if ( nTimeToStop && Abc_Clock() > nTimeToStop )
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{
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if ( !pPars->fSilent )
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Abc_Print( 1, "Reached timeout (%d seconds).\n", pPars->nTimeOut );
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goto finish;
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}
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// skip solved outputs
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if ( p->vCexes && Vec_PtrEntry(p->vCexes, i) )
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continue;
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// skip output whose time has run out
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if ( p->pTime4Outs && p->pTime4Outs[i] == 0 )
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continue;
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// add constraints for this output
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clk2 = Abc_Clock();
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Saig_ManBmcCreateCnf( p, pObj, f );
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clkOther += Abc_Clock() - clk2;
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}
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}
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// solve SAT
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clk = Abc_Clock();
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Saig_ManForEachPo( pAig, pObj, i )
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@ -1474,45 +1525,6 @@ int Saig_ManBmcScalable( Aig_Man_t * pAig, Saig_ParBmc_t * pPars )
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clk2 = Abc_Clock();
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Lit = Saig_ManBmcCreateCnf( p, pObj, f );
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clkOther += Abc_Clock() - clk2;
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if ( Lit == 0 )
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continue;
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if ( Lit == 1 )
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{
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RetValue = 0;
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if ( !pPars->fSolveAll )
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{
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Abc_Cex_t * pCex = Abc_CexMakeTriv( Aig_ManRegNum(pAig), Saig_ManPiNum(pAig), Saig_ManPoNum(pAig), f*Saig_ManPoNum(pAig)+i );
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Abc_Print( 1, "Output %d is trivially SAT in frame %d.\n", i, f );
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ABC_FREE( pAig->pSeqModel );
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pAig->pSeqModel = pCex;
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goto finish;
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}
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pPars->nFailOuts++;
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if ( !pPars->fNotVerbose )
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Abc_Print( 1, "Output %*d was asserted in frame %2d (solved %*d out of %*d outputs).\n",
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nOutDigits, i, f, nOutDigits, pPars->nFailOuts, nOutDigits, Saig_ManPoNum(pAig) );
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if ( p->vCexes == NULL )
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p->vCexes = Vec_PtrStart( Saig_ManPoNum(pAig) );
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pCexNew = (p->pPars->fUseBridge || pPars->fStoreCex) ? Abc_CexMakeTriv( Aig_ManRegNum(pAig), Saig_ManPiNum(pAig), Saig_ManPoNum(pAig), f*Saig_ManPoNum(pAig)+i ) : (Abc_Cex_t *)(ABC_PTRINT_T)1;
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if ( p->pPars->fUseBridge )
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{
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Gia_ManToBridgeResult( stdout, 0, pCexNew, pCexNew->iPo );
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Abc_CexFree( pCexNew );
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pCexNew = (Abc_Cex_t *)(ABC_PTRINT_T)1;
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}
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Vec_PtrWriteEntry( p->vCexes, i, pCexNew );
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if ( pPars->pFuncOnFail && pPars->pFuncOnFail(i, pPars->fStoreCex ? (Abc_Cex_t *)Vec_PtrEntry(p->vCexes, i) : NULL) )
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{
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Abc_Print( 1, "Quitting due to callback on fail.\n" );
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goto finish;
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}
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// reset the timeout
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pPars->timeLastSolved = Abc_Clock();
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nTimeToStop = Saig_ManBmcTimeToStop( pPars, nTimeToStopNG );
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if ( nTimeToStop )
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sat_solver_set_runtime_limit( p->pSat, nTimeToStop );
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continue;
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}
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// solve this output
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fUnfinished = 0;
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sat_solver_compress( p->pSat );
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@ -1523,7 +1535,8 @@ clk2 = Abc_Clock();
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clkOne = Abc_Clock();
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sat_solver_set_runtime_limit( p->pSat, p->pTime4Outs[i] + Abc_Clock() );
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}
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status = sat_solver_solve( p->pSat, &Lit, &Lit + 1, (ABC_INT64_T)pPars->nConfLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
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// status = sat_solver_solve( p->pSat, &Lit, &Lit + 1, (ABC_INT64_T)pPars->nConfLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
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status = Saig_ManCallSolver( p, Lit );
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if ( p->pTime4Outs )
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{
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abctime timeSince = Abc_Clock() - clkOne;
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@ -1535,7 +1548,7 @@ clk2 = Abc_Clock();
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if ( status == l_False )
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{
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nTimeUnsat += Abc_Clock() - clk2;
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if ( 1 )
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if ( Lit != 0 )
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{
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// add final unit clause
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Lit = lit_neg( Lit );
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@ -1591,15 +1604,18 @@ nTimeSat += Abc_Clock() - clk2;
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if ( p->vCexes == NULL )
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p->vCexes = Vec_PtrStart( Saig_ManPoNum(pAig) );
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pCexNew = (p->pPars->fUseBridge || pPars->fStoreCex) ? Saig_ManGenerateCex( p, f, i ) : (Abc_Cex_t *)(ABC_PTRINT_T)1;
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pCexNew0 = NULL;
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if ( p->pPars->fUseBridge )
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{
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Gia_ManToBridgeResult( stdout, 0, pCexNew, pCexNew->iPo );
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Abc_CexFree( pCexNew );
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//Abc_CexFree( pCexNew );
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pCexNew0 = pCexNew;
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pCexNew = (Abc_Cex_t *)(ABC_PTRINT_T)1;
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}
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Vec_PtrWriteEntry( p->vCexes, i, pCexNew );
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if ( pPars->pFuncOnFail && pPars->pFuncOnFail(i, pPars->fStoreCex ? (Abc_Cex_t *)Vec_PtrEntry(p->vCexes, i) : NULL) )
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{
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Abc_CexFreeP( &pCexNew0 );
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Abc_Print( 1, "Quitting due to callback on fail.\n" );
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goto finish;
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}
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@ -1608,6 +1624,31 @@ nTimeSat += Abc_Clock() - clk2;
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nTimeToStop = Saig_ManBmcTimeToStop( pPars, nTimeToStopNG );
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if ( nTimeToStop )
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sat_solver_set_runtime_limit( p->pSat, nTimeToStop );
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// check if other outputs failed under the same counter-example
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Saig_ManForEachPo( pAig, pObj, k )
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{
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if ( k >= Saig_ManPoNum(pAig) )
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break;
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// skip solved outputs
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if ( p->vCexes && Vec_PtrEntry(p->vCexes, k) )
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continue;
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// check if this output is solved
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Lit = Saig_ManBmcCreateCnf( p, pObj, f );
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if ( sat_solver_var_value(p->pSat, lit_var(Lit)) == Abc_LitIsCompl(Lit) )
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continue;
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// write entry
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pPars->nFailOuts++;
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if ( !pPars->fNotVerbose )
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Abc_Print( 1, "Output %*d was asserted in frame %2d (solved %*d out of %*d outputs).\n",
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nOutDigits, k, f, nOutDigits, pPars->nFailOuts, nOutDigits, Saig_ManPoNum(pAig) );
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// report to the bridge
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if ( p->pPars->fUseBridge )
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Gia_ManToBridgeResult( stdout, 0, pCexNew0, pCexNew0->iPo );
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// remember solved output
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Vec_PtrWriteEntry( p->vCexes, k, pCexNew );
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}
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Abc_CexFreeP( &pCexNew0 );
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}
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else
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{
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