mirror of https://github.com/YosysHQ/abc.git
Experimental code for polynomial construction.
This commit is contained in:
Alan Mishchenko
parent
478066f7a5
commit
198fe99416
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@ -5351,6 +5351,10 @@ SOURCE=.\src\proof\acec\acec.h
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# End Source File
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# Begin Source File
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SOURCE=.\src\proof\acec\acecCo.c
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# End Source File
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# Begin Source File
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SOURCE=.\src\proof\acec\acecCore.c
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# End Source File
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# Begin Source File
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@ -476,6 +476,7 @@ static int Abc_CommandAbc9PoXsim ( Abc_Frame_t * pAbc, int argc, cha
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static int Abc_CommandAbc9Demiter ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9Fadds ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9Polyn ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9ATree ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9Acec ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9Esop ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9Exorcism ( Abc_Frame_t * pAbc, int argc, char ** argv );
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@ -1116,6 +1117,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
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Cmd_CommandAdd( pAbc, "ABC9", "&demiter", Abc_CommandAbc9Demiter, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&fadds", Abc_CommandAbc9Fadds, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&polyn", Abc_CommandAbc9Polyn, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&atree", Abc_CommandAbc9ATree, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&acec", Abc_CommandAbc9Acec, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&esop", Abc_CommandAbc9Esop, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&exorcism", Abc_CommandAbc9Exorcism, 0 );
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@ -40175,6 +40177,57 @@ usage:
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return 1;
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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int Abc_CommandAbc9ATree( Abc_Frame_t * pAbc, int argc, char ** argv )
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{
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extern Gia_Man_t * Gia_PolynCoreDetectTest( Gia_Man_t * pGia );
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Gia_Man_t * pTemp = NULL;
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int c, fVerbose = 0, fVeryVerbose = 0;
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Extra_UtilGetoptReset();
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while ( ( c = Extra_UtilGetopt( argc, argv, "vwh" ) ) != EOF )
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{
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switch ( c )
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{
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case 'v':
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fVerbose ^= 1;
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break;
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case 'w':
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fVeryVerbose ^= 1;
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break;
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case 'h':
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goto usage;
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default:
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goto usage;
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}
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}
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if ( pAbc->pGia == NULL )
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{
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Abc_Print( -1, "Abc_CommandAbc9Esop(): There is no AIG.\n" );
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return 0;
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}
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pTemp = Gia_PolynCoreDetectTest( pAbc->pGia );
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Abc_FrameUpdateGia( pAbc, pTemp );
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return 0;
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usage:
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Abc_Print( -2, "usage: &atree [-vwh]\n" );
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Abc_Print( -2, "\t extracts adder tree rooting in primary outputs\n" );
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Abc_Print( -2, "\t-v : toggles printing verbose information [default = %s]\n", fVerbose? "yes": "no" );
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Abc_Print( -2, "\t-w : toggles printing very verbose information [default = %s]\n", fVeryVerbose? "yes": "no" );
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Abc_Print( -2, "\t-h : print the command usage\n");
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return 1;
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}
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/**Function*************************************************************
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Synopsis []
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@ -0,0 +1,317 @@
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/**CFile****************************************************************
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FileName [acecCo.c]
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SystemName [ABC: Logic synthesis and verification system.]
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PackageName [CEC for arithmetic circuits.]
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Synopsis [Core procedures.]
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Author [Alan Mishchenko]
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Affiliation [UC Berkeley]
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Date [Ver. 1.0. Started - June 20, 2005.]
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Revision [$Id: acecCo.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
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***********************************************************************/
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#include "acecInt.h"
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#include "misc/vec/vecWec.h"
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ABC_NAMESPACE_IMPL_START
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////////////////////////////////////////////////////////////////////////
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/// DECLARATIONS ///
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////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////
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/// FUNCTION DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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/**Function*************************************************************
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Synopsis [Collect non-XOR inputs.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Gia_PolynCoreNonXors_rec( Gia_Man_t * pGia, Gia_Obj_t * pObj, Vec_Int_t * vXorPairs )
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{
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Gia_Obj_t * pFan0, * pFan1;
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if ( !Gia_ObjRecognizeExor(pObj, &pFan0, &pFan1) )
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return;
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Gia_PolynCoreNonXors_rec( pGia, Gia_Regular(pFan0), vXorPairs );
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Gia_PolynCoreNonXors_rec( pGia, Gia_Regular(pFan1), vXorPairs );
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Vec_IntPushTwo( vXorPairs, Gia_ObjId(pGia, Gia_Regular(pFan0)), Gia_ObjId(pGia, Gia_Regular(pFan1)) );
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}
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Vec_Int_t * Gia_PolynAddHaRoots( Gia_Man_t * pGia )
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{
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int i, iFan0, iFan1;
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Vec_Int_t * vNewOuts = Vec_IntAlloc( 100 );
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Vec_Int_t * vXorPairs = Vec_IntAlloc( 100 );
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Gia_Obj_t * pObj = Gia_ManCo( pGia, Gia_ManCoNum(pGia)-1 );
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Gia_PolynCoreNonXors_rec( pGia, Gia_ObjFanin0(pObj), vXorPairs );
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// add new outputs
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Gia_ManSetPhase( pGia );
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Vec_IntForEachEntryDouble( vXorPairs, iFan0, iFan1, i )
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{
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Gia_Obj_t * pFan0 = Gia_ManObj( pGia, iFan0 );
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Gia_Obj_t * pFan1 = Gia_ManObj( pGia, iFan1 );
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int iLit0 = Abc_Var2Lit( iFan0, pFan0->fPhase );
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int iLit1 = Abc_Var2Lit( iFan1, pFan1->fPhase );
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int iRoot = Gia_ManAppendAnd( pGia, iLit0, iLit1 );
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Vec_IntPush( vNewOuts, Abc_Lit2Var(iRoot) );
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}
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Vec_IntFree( vXorPairs );
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printf( "On top of %d COs, created %d new adder outputs.\n", Gia_ManCoNum(pGia), Vec_IntSize(vNewOuts) );
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return vNewOuts;
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}
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/**Function*************************************************************
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Synopsis [Detects the order of adders.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Vec_Int_t * Gia_PolynCoreOrder( Gia_Man_t * pGia, Vec_Int_t * vAdds, Vec_Int_t * vAddCos, Vec_Int_t ** pvIns, Vec_Int_t ** pvOuts )
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{
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Vec_Int_t * vOrder = Vec_IntAlloc( 1000 );
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Vec_Bit_t * vIsRoot = Vec_BitStart( Gia_ManObjNum(pGia) );
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Vec_Int_t * vRoots = Vec_IntAlloc( 5 * Gia_ManCoNum(pGia) );
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Vec_Int_t * vLeaves = Vec_IntAlloc( 2 * Gia_ManCiNum(pGia) );
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Vec_Wec_t * vMap = Vec_WecStart( Gia_ManObjNum(pGia) );
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int i, k, Index, Driver, Entry1, Entry2;
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// nodes driven by adders into adder indexes
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for ( i = 0; 5*i < Vec_IntSize(vAdds); i++ )
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{
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Entry1 = Vec_IntEntry( vAdds, 5*i + 3 );
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Entry2 = Vec_IntEntry( vAdds, 5*i + 4 );
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Vec_WecPush( vMap, Entry1, i );
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Vec_WecPush( vMap, Entry1, Entry2 );
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Vec_WecPush( vMap, Entry2, i );
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Vec_WecPush( vMap, Entry2, Entry1 );
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}
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// collect roots
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Gia_ManForEachCoDriverId( pGia, Driver, i )
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{
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Vec_IntPush( vRoots, Driver );
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Vec_BitWriteEntry( vIsRoot, Driver, 1 );
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}
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// collect additional outputs
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Vec_IntForEachEntry( vAddCos, Driver, i )
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{
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Vec_IntPush( vRoots, Driver );
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Vec_BitWriteEntry( vIsRoot, Driver, 1 );
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}
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// detect full adder tree
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*pvOuts = Vec_IntDup( vRoots );
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while ( 1 )
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{
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// iterate through boxes driving this one
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Vec_IntForEachEntry( vRoots, Entry1, i )
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{
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Vec_Int_t * vLevel = Vec_WecEntry( vMap, Entry1 );
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Vec_IntForEachEntryDouble( vLevel, Index, Entry2, k )
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if ( Vec_BitEntry(vIsRoot, Entry2) )
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break;
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if ( k == Vec_IntSize(vLevel) )
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continue;
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assert( Vec_BitEntry(vIsRoot, Entry1) );
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assert( Vec_BitEntry(vIsRoot, Entry2) );
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// collect adder
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Vec_IntPush( vOrder, Index );
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// clean marks
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Vec_BitWriteEntry( vIsRoot, Entry1, 0 );
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Vec_BitWriteEntry( vIsRoot, Entry2, 0 );
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Vec_IntRemove( vRoots, Entry1 );
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Vec_IntRemove( vRoots, Entry2 );
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// set new marks
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Entry1 = Vec_IntEntry( vAdds, 5*Index + 0 );
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Entry2 = Vec_IntEntry( vAdds, 5*Index + 1 );
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Driver = Vec_IntEntry( vAdds, 5*Index + 2 );
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Vec_BitWriteEntry( vIsRoot, Entry1, 1 );
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Vec_BitWriteEntry( vIsRoot, Entry2, 1 );
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Vec_BitWriteEntry( vIsRoot, Driver, 1 );
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Vec_IntPushUnique( vRoots, Entry1 );
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Vec_IntPushUnique( vRoots, Entry2 );
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Vec_IntPushUnique( vRoots, Driver );
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break;
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}
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if ( i == Vec_IntSize(vRoots) )
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break;
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}
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// collect remaining leaves
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Vec_BitForEachEntryStart( vIsRoot, Driver, i, 1 )
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if ( Driver )
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Vec_IntPush( vLeaves, i );
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*pvIns = vLeaves;
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// cleanup
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Vec_BitFree( vIsRoot );
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Vec_IntFree( vRoots );
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Vec_WecFree( vMap );
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return vOrder;
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}
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/**Function*************************************************************
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Synopsis [Collect internal node order.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Gia_PolynCoreCollect_rec( Gia_Man_t * pGia, int iObj, Vec_Int_t * vNodes, Vec_Bit_t * vVisited )
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{
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if ( Vec_BitEntry(vVisited, iObj) )
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return;
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Vec_BitSetEntry( vVisited, iObj, 1 );
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Gia_PolynCoreCollect_rec( pGia, Gia_ObjFaninId0p(pGia, Gia_ManObj(pGia, iObj)), vNodes, vVisited );
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Gia_PolynCoreCollect_rec( pGia, Gia_ObjFaninId1p(pGia, Gia_ManObj(pGia, iObj)), vNodes, vVisited );
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Vec_IntPush( vNodes, iObj );
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}
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Vec_Int_t * Gia_PolynCoreCollect( Gia_Man_t * pGia, Vec_Int_t * vAdds, Vec_Int_t * vOrder )
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{
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Vec_Int_t * vNodes = Vec_IntAlloc( 1000 );
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Vec_Bit_t * vVisited = Vec_BitStart( Gia_ManObjNum(pGia) );
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int i, Index, Entry1, Entry2, Entry3;
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Vec_IntForEachEntryReverse( vOrder, Index, i )
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{
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// mark inputs
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Entry1 = Vec_IntEntry( vAdds, 5*Index + 0 );
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Entry2 = Vec_IntEntry( vAdds, 5*Index + 1 );
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Entry3 = Vec_IntEntry( vAdds, 5*Index + 2 );
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Vec_BitWriteEntry( vVisited, Entry1, 1 );
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Vec_BitWriteEntry( vVisited, Entry2, 1 );
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Vec_BitWriteEntry( vVisited, Entry3, 1 );
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// traverse from outputs
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Entry1 = Vec_IntEntry( vAdds, 5*Index + 3 );
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Entry2 = Vec_IntEntry( vAdds, 5*Index + 4 );
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Gia_PolynCoreCollect_rec( pGia, Entry1, vNodes, vVisited );
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Gia_PolynCoreCollect_rec( pGia, Entry2, vNodes, vVisited );
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}
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Vec_BitFree( vVisited );
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return vNodes;
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Gia_PolynCorePrintCones( Gia_Man_t * pGia, Vec_Int_t * vLeaves )
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{
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int i, iObj;
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Vec_IntForEachEntry( vLeaves, iObj, i )
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{
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printf( "%4d : ", i );
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printf( "Supp = %3d ", Gia_ManSuppSize(pGia, &iObj, 1) );
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printf( "Cone = %3d ", Gia_ManConeSize(pGia, &iObj, 1) );
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printf( "\n" );
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}
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Gia_Man_t * Gia_PolynCoreDupTree( Gia_Man_t * p, Vec_Int_t * vAddCos, Vec_Int_t * vLeaves, Vec_Int_t * vNodes )
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{
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Gia_Man_t * pNew;
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Gia_Obj_t * pObj;
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int i;
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assert( Gia_ManRegNum(p) == 0 );
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Gia_ManFillValue( p );
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pNew = Gia_ManStart( Gia_ManObjNum(p) );
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pNew->pName = Abc_UtilStrsav( p->pName );
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pNew->pSpec = Abc_UtilStrsav( p->pSpec );
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Gia_ManConst0(p)->Value = 0;
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Gia_ManForEachObjVec( vLeaves, p, pObj, i )
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pObj->Value = Gia_ManAppendCi(pNew);
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Gia_ManForEachObjVec( vNodes, p, pObj, i )
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pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
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Gia_ManForEachCo( p, pObj, i )
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Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
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Gia_ManForEachObjVec( vAddCos, p, pObj, i )
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Gia_ManAppendCo( pNew, pObj->Value );
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return pNew;
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Gia_Man_t * Gia_PolynCoreDetectTest_int( Gia_Man_t * pGia, Vec_Int_t * vAddCos )
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{
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extern Vec_Int_t * Ree_ManComputeCuts( Gia_Man_t * p, int fVerbose );
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abctime clk = Abc_Clock();
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Gia_Man_t * pNew;
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Vec_Int_t * vAdds = Ree_ManComputeCuts( pGia, 1 );
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Vec_Int_t * vLeaves, * vRoots, * vOrder = Gia_PolynCoreOrder( pGia, vAdds, vAddCos, &vLeaves, &vRoots );
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Vec_Int_t * vNodes = Gia_PolynCoreCollect( pGia, vAdds, vOrder );
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printf( "Detected %d FAs/HAs. Roots = %d. Leaves = %d. Nodes = %d. Adds = %d. ",
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Vec_IntSize(vAdds), Vec_IntSize(vLeaves), Vec_IntSize(vRoots), Vec_IntSize(vNodes), Vec_IntSize(vOrder) );
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Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
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Gia_PolynCorePrintCones( pGia, vLeaves );
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pNew = Gia_PolynCoreDupTree( pGia, vAddCos, vLeaves, vNodes );
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Vec_IntFree( vAdds );
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Vec_IntFree( vLeaves );
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Vec_IntFree( vRoots );
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Vec_IntFree( vOrder );
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Vec_IntFree( vNodes );
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return pNew;
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}
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Gia_Man_t * Gia_PolynCoreDetectTest( Gia_Man_t * pGia )
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{
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Vec_Int_t * vAddCos = Gia_PolynAddHaRoots( pGia );
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Gia_Man_t * pNew = Gia_PolynCoreDetectTest_int( pGia, vAddCos );
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Vec_IntFree( vAddCos );
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return pNew;
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}
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////////////////////////////////////////////////////////////////////////
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/// END OF FILE ///
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////////////////////////////////////////////////////////////////////////
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ABC_NAMESPACE_IMPL_END
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@ -1,4 +1,7 @@
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SRC += src/proof/acec/acecCore.c \
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src/proof/acec/acecCo.c \
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src/proof/acec/acecRe.c \
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src/proof/acec/acecPo.c \
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src/proof/acec/acecCover.c \
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src/proof/acec/acecFadds.c \
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src/proof/acec/acecOrder.c \
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