mirror of https://github.com/YosysHQ/abc.git
Improvements to 'bmc3' (start frame; stop when all POs are SAT; stop when 2^nRegs frames are completed).
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@ -1098,6 +1098,7 @@ int Saig_ManBmcScalable( Aig_Man_t * pAig, Saig_ParBmc_t * pPars )
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Gia_ManBmc_t * p;
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Gia_ManBmc_t * p;
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Aig_Obj_t * pObj;
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Aig_Obj_t * pObj;
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int RetValue = -1, fFirst = 1;
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int RetValue = -1, fFirst = 1;
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int nOutDigits = Aig_Base10Log( Saig_ManPoNum(pAig) - Saig_ManConstrNum(pAig) );
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int i, f, Lit, status, clk, clk2, clkOther = 0, clkTotal = clock();
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int i, f, Lit, status, clk, clk2, clkOther = 0, clkTotal = clock();
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if ( pPars->fVerbose && Aig_ManConstrNum(pAig) > 0 )
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if ( pPars->fVerbose && Aig_ManConstrNum(pAig) > 0 )
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printf( "Performing BMC with constraints...\n" );
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printf( "Performing BMC with constraints...\n" );
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@ -1119,6 +1120,19 @@ int Saig_ManBmcScalable( Aig_Man_t * pAig, Saig_ParBmc_t * pPars )
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Saig_ManBmcMarkPis( pAig, pPars->nPisAbstract );
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Saig_ManBmcMarkPis( pAig, pPars->nPisAbstract );
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for ( f = 0; f < pPars->nFramesMax; f++ )
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for ( f = 0; f < pPars->nFramesMax; f++ )
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{
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{
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// stop BMC after exploring all reachable states
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if ( Aig_ManRegNum(pAig) < 30 && f == (1 << Aig_ManRegNum(pAig)) )
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{
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Saig_Bmc3ManStop( p );
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return pPars->nFailOuts ? 0 : 1;
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}
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// stop BMC if all targets are solved
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if ( pPars->fSolveAll && pPars->nFailOuts == Saig_ManPoNum(pAig) - Saig_ManConstrNum(pAig) )
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{
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Saig_Bmc3ManStop( p );
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return 0;
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}
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// consider the next timeframe
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pPars->iFrame = f;
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pPars->iFrame = f;
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// resize the array
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// resize the array
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Vec_IntFillExtra( p->vPiVars, (f+1)*Saig_ManPiNum(p->pAig), 0 );
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Vec_IntFillExtra( p->vPiVars, (f+1)*Saig_ManPiNum(p->pAig), 0 );
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@ -1158,8 +1172,10 @@ clkOther += clock() - clk2;
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return 1;
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return 1;
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}
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}
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}
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}
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if ( pPars->nStart && f < pPars->nStart )
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continue;
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// solve SAT
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// solve SAT
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clk = clock();
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clk = clock();
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Saig_ManForEachPo( pAig, pObj, i )
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Saig_ManForEachPo( pAig, pObj, i )
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{
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{
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if ( i >= Saig_ManPoNum(pAig) - Saig_ManConstrNum(pAig) )
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if ( i >= Saig_ManPoNum(pAig) - Saig_ManConstrNum(pAig) )
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@ -1176,15 +1192,17 @@ clkOther += clock() - clk2;
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if ( Lit == 1 )
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if ( Lit == 1 )
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{
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{
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Abc_Cex_t * pCex = Abc_CexMakeTriv( Aig_ManRegNum(pAig), Saig_ManPiNum(pAig), Saig_ManPoNum(pAig), f*Saig_ManPoNum(pAig)+i );
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Abc_Cex_t * pCex = Abc_CexMakeTriv( Aig_ManRegNum(pAig), Saig_ManPiNum(pAig), Saig_ManPoNum(pAig), f*Saig_ManPoNum(pAig)+i );
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printf( "Output %d is trivially SAT in frame %d.\n", i, f );
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if ( !pPars->fSolveAll )
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if ( !pPars->fSolveAll )
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{
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{
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printf( "Output %d is trivially SAT in frame %d.\n", i, f );
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ABC_FREE( pAig->pSeqModel );
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ABC_FREE( pAig->pSeqModel );
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pAig->pSeqModel = pCex;
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pAig->pSeqModel = pCex;
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Saig_Bmc3ManStop( p );
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Saig_Bmc3ManStop( p );
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return 0;
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return 0;
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}
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}
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pPars->nFailOuts++;
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pPars->nFailOuts++;
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printf( "Output %*d was asserted in frame %2d (solved %*d out of %*d outputs).\n",
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nOutDigits, i, f, nOutDigits, pPars->nFailOuts, nOutDigits, Saig_ManPoNum(pAig) - Saig_ManConstrNum(pAig) );
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if ( p->vCexes == NULL )
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if ( p->vCexes == NULL )
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p->vCexes = Vec_PtrStart( Saig_ManPoNum(pAig) );
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p->vCexes = Vec_PtrStart( Saig_ManPoNum(pAig) );
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Vec_PtrWriteEntry( p->vCexes, i, pCex );
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Vec_PtrWriteEntry( p->vCexes, i, pCex );
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@ -1231,7 +1249,8 @@ clkOther += clock() - clk2;
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return 0;
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return 0;
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}
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}
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pPars->nFailOuts++;
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pPars->nFailOuts++;
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printf( "Output %d was asserted in frame %d (use \"write_counter\" to dump a witness).\n", i, f );
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printf( "Output %*d was asserted in frame %2d (solved %*d out of %*d outputs).\n",
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nOutDigits, i, f, nOutDigits, pPars->nFailOuts, nOutDigits, Saig_ManPoNum(pAig) - Saig_ManConstrNum(pAig) );
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if ( p->vCexes == NULL )
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if ( p->vCexes == NULL )
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p->vCexes = Vec_PtrStart( Saig_ManPoNum(pAig) );
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p->vCexes = Vec_PtrStart( Saig_ManPoNum(pAig) );
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Vec_PtrWriteEntry( p->vCexes, i, pCex );
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Vec_PtrWriteEntry( p->vCexes, i, pCex );
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@ -1805,8 +1805,7 @@ int Abc_NtkDarBmc3( Abc_Ntk_t * pNtk, Saig_ParBmc_t * pPars )
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pNtk->pSeqModel = pMan->pSeqModel; pMan->pSeqModel = NULL;
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pNtk->pSeqModel = pMan->pSeqModel; pMan->pSeqModel = NULL;
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if ( RetValue == 1 )
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if ( RetValue == 1 )
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{
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{
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// printf( "No output asserted in %d frames. ", pPars->iFrame );
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printf( "Explored all reachable states after completing %d frames. ", 1<<Aig_ManRegNum(pMan) );
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printf( "Incorrect return value. " );
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}
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}
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else if ( RetValue == -1 )
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else if ( RetValue == -1 )
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{
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{
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@ -1839,8 +1838,7 @@ int Abc_NtkDarBmc3( Abc_Ntk_t * pNtk, Saig_ParBmc_t * pPars )
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}
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}
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else
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else
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{
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{
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printf( "Incorrect return value. " );
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printf( "All %d outputs are proved SAT. ", Saig_ManPoNum(pMan) - pMan->nConstrs );
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// printf( "At least one output asserted (out=%d, frame=%d). ", pCex->iPo, pCex->iFrame );
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}
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}
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}
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}
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ABC_PRT( "Time", clock() - clk );
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ABC_PRT( "Time", clock() - clk );
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@ -3044,8 +3042,8 @@ int Abc_NtkDarSeqSim3( Abc_Ntk_t * pNtk, int nFrames, int nWords, int nBinSize,
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}
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}
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else
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else
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{
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{
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printf( "Simulation of %d frames with %d words did not assert the outputs. ",
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// printf( "Simulation of %d frames with %d words did not assert the outputs. ",
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nFrames, nWords );
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// nFrames, nWords );
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}
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}
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ABC_PRT( "Time", clock() - clk );
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ABC_PRT( "Time", clock() - clk );
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Aig_ManStop( pMan );
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Aig_ManStop( pMan );
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