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Version abc90215

This commit is contained in:
Alan Mishchenko 2009-02-15 08:01:00 -08:00
parent f936cc0680
commit 0871bffae3
614 changed files with 23705 additions and 10798 deletions
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2
Makefile
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@ -26,7 +26,7 @@ MODULES := \
src/aig/bdc src/aig/bar src/aig/ntl src/aig/nwk \
src/aig/mfx src/aig/tim src/aig/saig src/aig/bbr \
src/aig/int src/aig/dch src/aig/ssw src/aig/cgt \
src/aig/cec src/aig/fsim
src/aig/cec src/aig/gia
default: $(PROG)

3695
abc.dsp
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29
abc.dsw
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@ -1,29 +0,0 @@
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5
abc.rc
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@ -2,8 +2,8 @@
#set check # checks intermediate networks
#set checkfio # prints warnings when fanins/fanouts are duplicated
set checkread # checks new networks after reading from file
set backup # saves backup networks retrived by "undo" and "recall"
set savesteps 1 # sets the maximum number of backup networks to save
#set backup # saves backup networks retrived by "undo" and "recall"
#set savesteps 1 # sets the maximum number of backup networks to save
set progressbar # display the progress bar
# program names for internal calls
@ -45,6 +45,7 @@ alias pl print_level
alias plat print_latch
alias pio print_io
alias pk print_kmap
alias pm print_miter
alias ps print_stats
alias psb print_stats -b
alias psu print_supp

102
abcexe.dsp Normal file
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@ -0,0 +1,102 @@
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1274
abclib.dsp
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15
abclib.dsw → abcspace.dsw
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102
abctestlib.dsp
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@ -1,102 +0,0 @@
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29
abctestlib.dsw
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@ -1,29 +0,0 @@
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39
src/aig/aig/aig.h
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@ -21,10 +21,6 @@
#ifndef __AIG_H__
#define __AIG_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@ -41,6 +37,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
@ -196,17 +196,6 @@ struct Aig_ManCut_t_
unsigned * puTemp[4]; // used for the truth table computation
};
#ifdef WIN32
#define ABC_DLLEXPORT __declspec(dllexport)
#define ABC_DLLIMPORT __declspec(dllimport)
#else /* defined(WIN32) */
#define ABC_DLLIMPORT
#endif /* defined(WIN32) */
#ifndef ABC_DLL
#define ABC_DLL ABC_DLLIMPORT
#endif
static inline Aig_Cut_t * Aig_ObjCuts( Aig_ManCut_t * p, Aig_Obj_t * pObj ) { return p->pCuts[pObj->Id]; }
static inline void Aig_ObjSetCuts( Aig_ManCut_t * p, Aig_Obj_t * pObj, Aig_Cut_t * pCuts ) { p->pCuts[pObj->Id] = pCuts; }
@ -231,16 +220,12 @@ static inline Aig_Cut_t * Aig_CutNext( Aig_Cut_t * pCut ) { return
#define AIG_ABS(a) (((a) >= 0)? (a) :-(a))
#define AIG_INFINITY (100000000)
#ifndef PRT
#define PRT(a,t) printf("%s = ", (a)); printf("%6.2f sec\n", (float)(t)/(float)(CLOCKS_PER_SEC))
#endif
static inline int Aig_IntAbs( int n ) { return (n < 0)? -n : n; }
static inline int Aig_Float2Int( float Val ) { return *((int *)&Val); }
static inline float Aig_Int2Float( int Num ) { return *((float *)&Num); }
static inline int Aig_Base2Log( unsigned n ) { int r; assert( n >= 0 ); if ( n < 2 ) return n; for ( r = 0, n--; n; n >>= 1, r++ ); return r; }
static inline int Aig_Base10Log( unsigned n ) { int r; assert( n >= 0 ); if ( n < 2 ) return n; for ( r = 0, n--; n; n /= 10, r++ ); return r; }
static inline char * Aig_UtilStrsav( char * s ) { return s ? strcpy(ALLOC(char, strlen(s)+1), s) : NULL; }
static inline char * Aig_UtilStrsav( char * s ) { return s ? strcpy(ABC_ALLOC(char, strlen(s)+1), s) : NULL; }
static inline int Aig_BitWordNum( int nBits ) { return (nBits>>5) + ((nBits&31) > 0); }
static inline int Aig_TruthWordNum( int nVars ) { return nVars <= 5 ? 1 : (1 << (nVars - 5)); }
static inline int Aig_InfoHasBit( unsigned * p, int i ) { return (p[(i)>>5] & (1<<((i) & 31))) > 0; }
@ -265,10 +250,10 @@ static inline int Aig_WordFindFirstBit( unsigned uWord )
return -1;
}
static inline Aig_Obj_t * Aig_Regular( Aig_Obj_t * p ) { return (Aig_Obj_t *)((PORT_PTRUINT_T)(p) & ~01); }
static inline Aig_Obj_t * Aig_Not( Aig_Obj_t * p ) { return (Aig_Obj_t *)((PORT_PTRUINT_T)(p) ^ 01); }
static inline Aig_Obj_t * Aig_NotCond( Aig_Obj_t * p, int c ) { return (Aig_Obj_t *)((PORT_PTRUINT_T)(p) ^ (c)); }
static inline int Aig_IsComplement( Aig_Obj_t * p ) { return (int)((PORT_PTRUINT_T)(p) & 01); }
static inline Aig_Obj_t * Aig_Regular( Aig_Obj_t * p ) { return (Aig_Obj_t *)((ABC_PTRUINT_T)(p) & ~01); }
static inline Aig_Obj_t * Aig_Not( Aig_Obj_t * p ) { return (Aig_Obj_t *)((ABC_PTRUINT_T)(p) ^ 01); }
static inline Aig_Obj_t * Aig_NotCond( Aig_Obj_t * p, int c ) { return (Aig_Obj_t *)((ABC_PTRUINT_T)(p) ^ (c)); }
static inline int Aig_IsComplement( Aig_Obj_t * p ) { return (int)((ABC_PTRUINT_T)(p) & 01); }
static inline int Aig_ManPiNum( Aig_Man_t * p ) { return p->nObjs[AIG_OBJ_PI]; }
static inline int Aig_ManPoNum( Aig_Man_t * p ) { return p->nObjs[AIG_OBJ_PO]; }
@ -344,7 +329,7 @@ static inline void Aig_ObjSetEquiv( Aig_Man_t * p, Aig_Obj_t * pObj, Aig
static inline Aig_Obj_t * Aig_ObjRepr( Aig_Man_t * p, Aig_Obj_t * pObj ) { return p->pReprs? p->pReprs[pObj->Id] : NULL; }
static inline void Aig_ObjSetRepr( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pRepr ) { assert(p->pReprs); p->pReprs[pObj->Id] = pRepr; }
static inline Aig_Obj_t * Aig_ObjHaig( Aig_Obj_t * pObj ) { assert( Aig_Regular(pObj)->pHaig ); return Aig_NotCond( Aig_Regular(pObj)->pHaig, Aig_IsComplement(pObj) ); }
static inline int Aig_ObjPioNum( Aig_Obj_t * pObj ) { assert( !Aig_ObjIsNode(pObj) ); return (int)(PORT_PTRINT_T)pObj->pNext; }
static inline int Aig_ObjPioNum( Aig_Obj_t * pObj ) { assert( !Aig_ObjIsNode(pObj) ); return (int)(ABC_PTRINT_T)pObj->pNext; }
static inline int Aig_ObjWhatFanin( Aig_Obj_t * pObj, Aig_Obj_t * pFanin )
{
if ( Aig_ObjFanin0(pObj) == pFanin ) return 0;
@ -635,6 +620,7 @@ extern Aig_Man_t * Aig_ManConstReduce( Aig_Man_t * p, int fVerbose );
/*=== aigUtil.c =========================================================*/
extern unsigned Aig_PrimeCudd( unsigned p );
extern void Aig_ManIncrementTravId( Aig_Man_t * p );
extern int Aig_ManHasNoGaps( Aig_Man_t * p );
extern int Aig_ManLevels( Aig_Man_t * p );
extern void Aig_ManResetRefs( Aig_Man_t * p );
extern void Aig_ManCleanMarkA( Aig_Man_t * p );
@ -658,9 +644,10 @@ extern void Aig_ManDumpBlif( Aig_Man_t * p, char * pFileName, Vec_Ptr
extern void Aig_ManDumpVerilog( Aig_Man_t * p, char * pFileName );
extern void Aig_ManSetPioNumbers( Aig_Man_t * p );
extern void Aig_ManCleanPioNumbers( Aig_Man_t * p );
extern int Aig_ManCountChoices( Aig_Man_t * p );
extern int Aig_ManChoiceNum( Aig_Man_t * p );
extern char * Aig_FileNameGenericAppend( char * pBase, char * pSuffix );
extern unsigned Aig_ManRandom( int fReset );
extern void Aig_ManRandomInfo( Vec_Ptr_t * vInfo, int iWordStart, int iWordStop );
extern void Aig_NodeUnionLists( Vec_Ptr_t * vArr1, Vec_Ptr_t * vArr2, Vec_Ptr_t * vArr );
extern void Aig_NodeIntersectLists( Vec_Ptr_t * vArr1, Vec_Ptr_t * vArr2, Vec_Ptr_t * vArr );

14
src/aig/aig/aigCanon.c
View File

@ -96,14 +96,14 @@ Aig_RMan_t * Aig_RManStart()
{
static Bdc_Par_t Pars = {0}, * pPars = &Pars;
Aig_RMan_t * p;
p = ALLOC( Aig_RMan_t, 1 );
p = ABC_ALLOC( Aig_RMan_t, 1 );
memset( p, 0, sizeof(Aig_RMan_t) );
p->nVars = RMAN_MAXVARS;
p->pAig = Aig_ManStart( 1000000 );
Aig_IthVar( p->pAig, p->nVars-1 );
// create hash table
p->nBins = Aig_PrimeCudd(5000);
p->pBins = CALLOC( Aig_Tru_t *, p->nBins );
p->pBins = ABC_CALLOC( Aig_Tru_t *, p->nBins );
p->pMemTrus = Aig_MmFlexStart();
// bi-decomposition manager
pPars->nVarsMax = p->nVars;
@ -179,7 +179,7 @@ clk = clock();
nBinsOld = p->nBins;
// get the new Bins
p->nBins = Aig_PrimeCudd( 3 * nBinsOld );
p->pBins = CALLOC( Aig_Tru_t *, p->nBins );
p->pBins = ABC_CALLOC( Aig_Tru_t *, p->nBins );
// rehash the entries from the old table
Counter = 0;
for ( i = 0; i < nBinsOld; i++ )
@ -195,8 +195,8 @@ clk = clock();
Counter++;
}
assert( Counter == p->nEntries );
// PRT( "Time", clock() - clk );
free( pBinsOld );
// ABC_PRT( "Time", clock() - clk );
ABC_FREE( pBinsOld );
}
/**Function*************************************************************
@ -259,8 +259,8 @@ void Aig_RManStop( Aig_RMan_t * p )
Aig_MmFlexStop( p->pMemTrus, 0 );
Aig_ManStop( p->pAig );
Bdc_ManFree( p->pBidec );
free( p->pBins );
free( p );
ABC_FREE( p->pBins );
ABC_FREE( p );
}

16
src/aig/aig/aigCuts.c
View File

@ -46,7 +46,7 @@ Aig_ManCut_t * Aig_ManCutStart( Aig_Man_t * pMan, int nCutsMax, int nLeafMax, in
assert( nCutsMax >= 2 );
assert( nLeafMax <= 16 );
// allocate the fraiging manager
p = ALLOC( Aig_ManCut_t, 1 );
p = ABC_ALLOC( Aig_ManCut_t, 1 );
memset( p, 0, sizeof(Aig_ManCut_t) );
p->nCutsMax = nCutsMax;
p->nLeafMax = nLeafMax;
@ -54,7 +54,7 @@ Aig_ManCut_t * Aig_ManCutStart( Aig_Man_t * pMan, int nCutsMax, int nLeafMax, in
p->fVerbose = fVerbose;
p->pAig = pMan;
// allocate room for cuts and equivalent nodes
p->pCuts = ALLOC( Aig_Cut_t *, Aig_ManObjNumMax(pMan) );
p->pCuts = ABC_ALLOC( Aig_Cut_t *, Aig_ManObjNumMax(pMan) );
memset( p->pCuts, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(pMan) );
// allocate memory manager
p->nTruthWords = Aig_TruthWordNum(nLeafMax);
@ -63,7 +63,7 @@ Aig_ManCut_t * Aig_ManCutStart( Aig_Man_t * pMan, int nCutsMax, int nLeafMax, in
// room for temporary truth tables
if ( fTruth )
{
p->puTemp[0] = ALLOC( unsigned, 4 * p->nTruthWords );
p->puTemp[0] = ABC_ALLOC( unsigned, 4 * p->nTruthWords );
p->puTemp[1] = p->puTemp[0] + p->nTruthWords;
p->puTemp[2] = p->puTemp[1] + p->nTruthWords;
p->puTemp[3] = p->puTemp[2] + p->nTruthWords;
@ -85,9 +85,9 @@ Aig_ManCut_t * Aig_ManCutStart( Aig_Man_t * pMan, int nCutsMax, int nLeafMax, in
void Aig_ManCutStop( Aig_ManCut_t * p )
{
Aig_MmFixedStop( p->pMemCuts, 0 );
FREE( p->puTemp[0] );
free( p->pCuts );
free( p );
ABC_FREE( p->puTemp[0] );
ABC_FREE( p->pCuts );
ABC_FREE( p );
}
/**Function*************************************************************
@ -207,7 +207,7 @@ static inline float Aig_CutFindCost2( Aig_ManCut_t * p, Aig_Cut_t * pCut )
/**Function*************************************************************
Synopsis [Returns the next free cut to use.]
Synopsis [Returns the next ABC_FREE cut to use.]
Description []
@ -650,7 +650,7 @@ Aig_ManCut_t * Aig_ComputeCuts( Aig_Man_t * pAig, int nCutsMax, int nLeafMax, in
Aig_ManObjNum(pAig), nCuts, nLeafMax, nCutsK );
printf( "Cut size = %2d. Truth size = %2d. Total mem = %5.2f Mb ",
p->nCutSize, 4*p->nTruthWords, 1.0*Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20) );
PRT( "Runtime", clock() - clk );
ABC_PRT( "Runtime", clock() - clk );
/*
Aig_ManForEachNode( pAig, pObj, i )
if ( i % 300 == 0 )

12
src/aig/aig/aigDup.c
View File

@ -431,12 +431,12 @@ Aig_Man_t * Aig_ManDupDfs( Aig_Man_t * p )
// duplicate representation of choice nodes
if ( p->pEquivs )
{
pNew->pEquivs = ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
pNew->pEquivs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
memset( pNew->pEquivs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
}
if ( p->pReprs )
{
pNew->pReprs = ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
pNew->pReprs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
memset( pNew->pReprs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
}
// create the PIs
@ -578,12 +578,12 @@ Aig_Man_t * Aig_ManDupDfsGuided( Aig_Man_t * p, Aig_Man_t * pGuide )
// duplicate representation of choice nodes
if ( p->pEquivs )
{
pNew->pEquivs = ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
pNew->pEquivs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
memset( pNew->pEquivs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
}
if ( p->pReprs )
{
pNew->pReprs = ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
pNew->pReprs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
memset( pNew->pReprs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
}
// create the PIs
@ -651,12 +651,12 @@ Aig_Man_t * Aig_ManDupLevelized( Aig_Man_t * p )
// duplicate representation of choice nodes
if ( p->pEquivs )
{
pNew->pEquivs = ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
pNew->pEquivs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
memset( pNew->pEquivs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
}
if ( p->pReprs )
{
pNew->pReprs = ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
pNew->pReprs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
memset( pNew->pReprs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
}
// create the PIs

6
src/aig/aig/aigFanout.c
View File

@ -60,7 +60,7 @@ void Aig_ManFanoutStart( Aig_Man_t * p )
p->nFansAlloc = 2 * Aig_ManObjNumMax(p);
if ( p->nFansAlloc < (1<<12) )
p->nFansAlloc = (1<<12);
p->pFanData = ALLOC( int, 5 * p->nFansAlloc );
p->pFanData = ABC_ALLOC( int, 5 * p->nFansAlloc );
memset( p->pFanData, 0, sizeof(int) * 5 * p->nFansAlloc );
// add fanouts for all objects
Aig_ManForEachObj( p, pObj, i )
@ -86,7 +86,7 @@ void Aig_ManFanoutStart( Aig_Man_t * p )
void Aig_ManFanoutStop( Aig_Man_t * p )
{
assert( p->pFanData != NULL );
FREE( p->pFanData );
ABC_FREE( p->pFanData );
p->nFansAlloc = 0;
}
@ -110,7 +110,7 @@ void Aig_ObjAddFanout( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pFanout )
if ( pObj->Id >= p->nFansAlloc || pFanout->Id >= p->nFansAlloc )
{
int nFansAlloc = 2 * AIG_MAX( pObj->Id, pFanout->Id );
p->pFanData = REALLOC( int, p->pFanData, 5 * nFansAlloc );
p->pFanData = ABC_REALLOC( int, p->pFanData, 5 * nFansAlloc );
memset( p->pFanData + 5 * p->nFansAlloc, 0, sizeof(int) * 5 * (nFansAlloc - p->nFansAlloc) );
p->nFansAlloc = nFansAlloc;
}

4
src/aig/aig/aigFrames.c
View File

@ -53,7 +53,7 @@ Aig_Man_t * Aig_ManFrames( Aig_Man_t * pAig, int nFs, int fInit, int fOuts, int
int i, f;
// create mapping for the frames nodes
pObjMap = ALLOC( Aig_Obj_t *, nFs * Aig_ManObjNumMax(pAig) );
pObjMap = ABC_ALLOC( Aig_Obj_t *, nFs * Aig_ManObjNumMax(pAig) );
memset( pObjMap, 0, sizeof(Aig_Obj_t *) * nFs * Aig_ManObjNumMax(pAig) );
// start the fraig package
@ -124,7 +124,7 @@ Aig_Man_t * Aig_ManFrames( Aig_Man_t * pAig, int nFs, int fInit, int fOuts, int
if ( ppObjMap )
*ppObjMap = pObjMap;
else
free( pObjMap );
ABC_FREE( pObjMap );
return pFrames;
}

6
src/aig/aig/aigInter.c
View File

@ -122,14 +122,14 @@ void Aig_ManInterFast( Aig_Man_t * pManOn, Aig_Man_t * pManOff, int fVerbose )
Lits[0] = toLitCond( pCnfOn->pVarNums[pObj->Id], 0 );
Lits[1] = toLitCond( pCnfOff->pVarNums[pObj2->Id], 0 );
status = sat_solver_solve( pSat, Lits, Lits+2, (sint64)0, (sint64)0, (sint64)0, (sint64)0 );
status = sat_solver_solve( pSat, Lits, Lits+2, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
if ( status != l_False )
printf( "The incremental SAT problem is not UNSAT.\n" );
}
Cnf_DataFree( pCnfOn );
Cnf_DataFree( pCnfOff );
sat_solver_delete( pSat );
// PRT( "Fast interpolation time", clock() - clk );
// ABC_PRT( "Fast interpolation time", clock() - clk );
}
/**Function*************************************************************
@ -242,7 +242,7 @@ clk = clock();
*/
// solve the problem
status = sat_solver_solve( pSat, NULL, NULL, (sint64)0, (sint64)0, (sint64)0, (sint64)0 );
status = sat_solver_solve( pSat, NULL, NULL, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
timeSat += clock() - clk;
if ( status == l_False )
{

30
src/aig/aig/aigMan.c
View File

@ -47,7 +47,7 @@ Aig_Man_t * Aig_ManStart( int nNodesMax )
if ( nNodesMax <= 0 )
nNodesMax = 10007;
// start the manager
p = ALLOC( Aig_Man_t, 1 );
p = ABC_ALLOC( Aig_Man_t, 1 );
memset( p, 0, sizeof(Aig_Man_t) );
// perform initializations
p->nTravIds = 1;
@ -66,7 +66,7 @@ Aig_Man_t * Aig_ManStart( int nNodesMax )
p->nObjs[AIG_OBJ_CONST1]++;
// start the table
p->nTableSize = Aig_PrimeCudd( nNodesMax );
p->pTable = ALLOC( Aig_Obj_t *, p->nTableSize );
p->pTable = ABC_ALLOC( Aig_Obj_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize );
return p;
}
@ -186,8 +186,8 @@ void Aig_ManStop( Aig_Man_t * p )
if ( p->vMapped )
Vec_PtrFree( p->vMapped );
// print time
if ( p->time1 ) { PRT( "time1", p->time1 ); }
if ( p->time2 ) { PRT( "time2", p->time2 ); }
if ( p->time1 ) { ABC_PRT( "time1", p->time1 ); }
if ( p->time2 ) { ABC_PRT( "time2", p->time2 ); }
// delete timing
if ( p->pManTime )
Tim_ManStop( p->pManTime );
@ -211,16 +211,16 @@ void Aig_ManStop( Aig_Man_t * p )
if ( p->vOnehots ) Vec_VecFree( (Vec_Vec_t *)p->vOnehots );
if ( p->vClockDoms) Vec_VecFree( p->vClockDoms );
if ( p->vProbs ) Vec_IntFree( p->vProbs );
FREE( p->pFastSim );
FREE( p->pData );
FREE( p->pSeqModel );
FREE( p->pName );
FREE( p->pSpec );
FREE( p->pObjCopies );
FREE( p->pReprs );
FREE( p->pEquivs );
free( p->pTable );
free( p );
ABC_FREE( p->pFastSim );
ABC_FREE( p->pData );
ABC_FREE( p->pSeqModel );
ABC_FREE( p->pName );
ABC_FREE( p->pSpec );
ABC_FREE( p->pObjCopies );
ABC_FREE( p->pReprs );
ABC_FREE( p->pEquivs );
ABC_FREE( p->pTable );
ABC_FREE( p );
}
/**Function*************************************************************
@ -371,7 +371,7 @@ int Aig_ManHaigCounter( Aig_Man_t * pAig )
***********************************************************************/
void Aig_ManPrintStats( Aig_Man_t * p )
{
int nChoices = Aig_ManCountChoices(p);
int nChoices = Aig_ManChoiceNum(p);
printf( "%-15s : ", p->pName );
printf( "pi = %5d ", Aig_ManPiNum(p) );
printf( "po = %5d ", Aig_ManPoNum(p) );

80
src/aig/aig/aigMem.c
View File

@ -31,7 +31,7 @@ struct Aig_MmFixed_t_
int nEntriesAlloc; // the total number of entries allocated
int nEntriesUsed; // the number of entries in use
int nEntriesMax; // the max number of entries in use
char * pEntriesFree; // the linked list of free entries
char * pEntriesFree; // the linked list of ABC_FREE entries
// this is where the memory is stored
int nChunkSize; // the size of one chunk
@ -48,8 +48,8 @@ struct Aig_MmFlex_t_
{
// information about individual entries
int nEntriesUsed; // the number of entries allocated
char * pCurrent; // the current pointer to free memory
char * pEnd; // the first entry outside the free memory
char * pCurrent; // the current pointer to ABC_FREE memory
char * pEnd; // the first entry outside the ABC_FREE memory
// this is where the memory is stored
int nChunkSize; // the size of one chunk
@ -74,12 +74,6 @@ struct Aig_MmStep_t_
char ** pChunks; // the allocated memory
};
#define ALLOC(type, num) ((type *) malloc(sizeof(type) * (num)))
#define FREE(obj) ((obj) ? (free((char *) (obj)), (obj) = 0) : 0)
#define REALLOC(type, obj, num) \
((obj) ? ((type *) realloc((char *)(obj), sizeof(type) * (num))) : \
((type *) malloc(sizeof(type) * (num))))
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
@ -100,7 +94,7 @@ Aig_MmFixed_t * Aig_MmFixedStart( int nEntrySize, int nEntriesMax )
{
Aig_MmFixed_t * p;
p = ALLOC( Aig_MmFixed_t, 1 );
p = ABC_ALLOC( Aig_MmFixed_t, 1 );
memset( p, 0, sizeof(Aig_MmFixed_t) );
p->nEntrySize = nEntrySize;
@ -114,7 +108,7 @@ Aig_MmFixed_t * Aig_MmFixedStart( int nEntrySize, int nEntriesMax )
p->nChunksAlloc = 64;
p->nChunks = 0;
p->pChunks = ALLOC( char *, p->nChunksAlloc );
p->pChunks = ABC_ALLOC( char *, p->nChunksAlloc );
p->nMemoryUsed = 0;
p->nMemoryAlloc = 0;
@ -145,9 +139,9 @@ void Aig_MmFixedStop( Aig_MmFixed_t * p, int fVerbose )
p->nEntriesUsed, p->nEntriesMax, p->nEntrySize * p->nEntriesUsed, p->nMemoryAlloc );
}
for ( i = 0; i < p->nChunks; i++ )
free( p->pChunks[i] );
free( p->pChunks );
free( p );
ABC_FREE( p->pChunks[i] );
ABC_FREE( p->pChunks );
ABC_FREE( p );
}
/**Function*************************************************************
@ -166,16 +160,16 @@ char * Aig_MmFixedEntryFetch( Aig_MmFixed_t * p )
char * pTemp;
int i;
// check if there are still free entries
// check if there are still ABC_FREE entries
if ( p->nEntriesUsed == p->nEntriesAlloc )
{ // need to allocate more entries
assert( p->pEntriesFree == NULL );
if ( p->nChunks == p->nChunksAlloc )
{
p->nChunksAlloc *= 2;
p->pChunks = REALLOC( char *, p->pChunks, p->nChunksAlloc );
p->pChunks = ABC_REALLOC( char *, p->pChunks, p->nChunksAlloc );
}
p->pEntriesFree = ALLOC( char, p->nEntrySize * p->nChunkSize );
p->pEntriesFree = ABC_ALLOC( char, p->nEntrySize * p->nChunkSize );
p->nMemoryAlloc += p->nEntrySize * p->nChunkSize;
// transform these entries into a linked list
pTemp = p->pEntriesFree;
@ -195,7 +189,7 @@ char * Aig_MmFixedEntryFetch( Aig_MmFixed_t * p )
p->nEntriesUsed++;
if ( p->nEntriesMax < p->nEntriesUsed )
p->nEntriesMax = p->nEntriesUsed;
// return the first entry in the free entry list
// return the first entry in the ABC_FREE entry list
pTemp = p->pEntriesFree;
p->pEntriesFree = *((char **)pTemp);
return pTemp;
@ -216,7 +210,7 @@ void Aig_MmFixedEntryRecycle( Aig_MmFixed_t * p, char * pEntry )
{
// decrement the counter of used entries
p->nEntriesUsed--;
// add the entry to the linked list of free entries
// add the entry to the linked list of ABC_FREE entries
*((char **)pEntry) = p->pEntriesFree;
p->pEntriesFree = pEntry;
}
@ -240,7 +234,7 @@ void Aig_MmFixedRestart( Aig_MmFixed_t * p )
return;
// deallocate all chunks except the first one
for ( i = 1; i < p->nChunks; i++ )
free( p->pChunks[i] );
ABC_FREE( p->pChunks[i] );
p->nChunks = 1;
// transform these entries into a linked list
pTemp = p->pChunks[0];
@ -251,7 +245,7 @@ void Aig_MmFixedRestart( Aig_MmFixed_t * p )
}
// set the last link
*((char **)pTemp) = NULL;
// set the free entry list
// set the ABC_FREE entry list
p->pEntriesFree = p->pChunks[0];
// set the correct statistics
p->nMemoryAlloc = p->nEntrySize * p->nChunkSize;
@ -309,7 +303,7 @@ Aig_MmFlex_t * Aig_MmFlexStart()
{
Aig_MmFlex_t * p;
p = ALLOC( Aig_MmFlex_t, 1 );
p = ABC_ALLOC( Aig_MmFlex_t, 1 );
memset( p, 0, sizeof(Aig_MmFlex_t) );
p->nEntriesUsed = 0;
@ -319,7 +313,7 @@ Aig_MmFlex_t * Aig_MmFlexStart()
p->nChunkSize = (1 << 18);
p->nChunksAlloc = 64;
p->nChunks = 0;
p->pChunks = ALLOC( char *, p->nChunksAlloc );
p->pChunks = ABC_ALLOC( char *, p->nChunksAlloc );
p->nMemoryUsed = 0;
p->nMemoryAlloc = 0;
@ -350,9 +344,9 @@ void Aig_MmFlexStop( Aig_MmFlex_t * p, int fVerbose )
p->nEntriesUsed, p->nMemoryUsed, p->nMemoryAlloc );
}
for ( i = 0; i < p->nChunks; i++ )
free( p->pChunks[i] );
free( p->pChunks );
free( p );
ABC_FREE( p->pChunks[i] );
ABC_FREE( p->pChunks );
ABC_FREE( p );
}
/**Function*************************************************************
@ -369,13 +363,13 @@ void Aig_MmFlexStop( Aig_MmFlex_t * p, int fVerbose )
char * Aig_MmFlexEntryFetch( Aig_MmFlex_t * p, int nBytes )
{
char * pTemp;
// check if there are still free entries
// check if there are still ABC_FREE entries
if ( p->pCurrent == NULL || p->pCurrent + nBytes > p->pEnd )
{ // need to allocate more entries
if ( p->nChunks == p->nChunksAlloc )
{
p->nChunksAlloc *= 2;
p->pChunks = REALLOC( char *, p->pChunks, p->nChunksAlloc );
p->pChunks = ABC_REALLOC( char *, p->pChunks, p->nChunksAlloc );
}
if ( nBytes > p->nChunkSize )
{
@ -383,7 +377,7 @@ char * Aig_MmFlexEntryFetch( Aig_MmFlex_t * p, int nBytes )
// (ideally, this should never happen)
p->nChunkSize = 2 * nBytes;
}
p->pCurrent = ALLOC( char, p->nChunkSize );
p->pCurrent = ABC_ALLOC( char, p->nChunkSize );
p->pEnd = p->pCurrent + p->nChunkSize;
p->nMemoryAlloc += p->nChunkSize;
// add the chunk to the chunk storage
@ -418,7 +412,7 @@ void Aig_MmFlexRestart( Aig_MmFlex_t * p )
return;
// deallocate all chunks except the first one
for ( i = 1; i < p->nChunks; i++ )
free( p->pChunks[i] );
ABC_FREE( p->pChunks[i] );
p->nChunks = 1;
p->nMemoryAlloc = p->nChunkSize;
// transform these entries into a linked list
@ -461,7 +455,7 @@ int Aig_MmFlexReadMemUsage( Aig_MmFlex_t * p )
are employed internally. Calling this procedure with nSteps equal
to 10 results in 10 hierarchically arranged internal memory managers,
which can allocate up to 4096 (1Kb) entries. Requests for larger
entries are handed over to malloc() and then free()ed.]
entries are handed over to malloc() and then ABC_FREE()ed.]
SideEffects []
@ -472,16 +466,16 @@ Aig_MmStep_t * Aig_MmStepStart( int nSteps )
{
Aig_MmStep_t * p;
int i, k;
p = ALLOC( Aig_MmStep_t, 1 );
p = ABC_ALLOC( Aig_MmStep_t, 1 );
memset( p, 0, sizeof(Aig_MmStep_t) );
p->nMems = nSteps;
// start the fixed memory managers
p->pMems = ALLOC( Aig_MmFixed_t *, p->nMems );
p->pMems = ABC_ALLOC( Aig_MmFixed_t *, p->nMems );
for ( i = 0; i < p->nMems; i++ )
p->pMems[i] = Aig_MmFixedStart( (8<<i), (1<<13) );
// set up the mapping of the required memory size into the corresponding manager
p->nMapSize = (4<<p->nMems);
p->pMap = ALLOC( Aig_MmFixed_t *, p->nMapSize+1 );
p->pMap = ABC_ALLOC( Aig_MmFixed_t *, p->nMapSize+1 );
p->pMap[0] = NULL;
for ( k = 1; k <= 4; k++ )
p->pMap[k] = p->pMems[0];
@ -492,7 +486,7 @@ Aig_MmStep_t * Aig_MmStepStart( int nSteps )
//printf( "%10d: size = %10d\n", i, p->pMap[i]->nEntrySize );
p->nChunksAlloc = 64;
p->nChunks = 0;
p->pChunks = ALLOC( char *, p->nChunksAlloc );
p->pChunks = ABC_ALLOC( char *, p->nChunksAlloc );
return p;
}
@ -515,12 +509,12 @@ void Aig_MmStepStop( Aig_MmStep_t * p, int fVerbose )
if ( p->nChunksAlloc )
{
for ( i = 0; i < p->nChunks; i++ )
free( p->pChunks[i] );
free( p->pChunks );
ABC_FREE( p->pChunks[i] );
ABC_FREE( p->pChunks );
}
free( p->pMems );
free( p->pMap );
free( p );
ABC_FREE( p->pMems );
ABC_FREE( p->pMap );
ABC_FREE( p );
}
/**Function*************************************************************
@ -543,9 +537,9 @@ char * Aig_MmStepEntryFetch( Aig_MmStep_t * p, int nBytes )
if ( p->nChunks == p->nChunksAlloc )
{
p->nChunksAlloc *= 2;
p->pChunks = REALLOC( char *, p->pChunks, p->nChunksAlloc );
p->pChunks = ABC_REALLOC( char *, p->pChunks, p->nChunksAlloc );
}
p->pChunks[ p->nChunks++ ] = ALLOC( char, nBytes );
p->pChunks[ p->nChunks++ ] = ABC_ALLOC( char, nBytes );
return p->pChunks[p->nChunks-1];
}
return Aig_MmFixedEntryFetch( p->pMap[nBytes] );
@ -569,7 +563,7 @@ void Aig_MmStepEntryRecycle( Aig_MmStep_t * p, char * pEntry, int nBytes )
return;
if ( nBytes > p->nMapSize )
{
// free( pEntry );
// ABC_FREE( pEntry );
return;
}
Aig_MmFixedEntryRecycle( p->pMap[nBytes], pEntry );

6
src/aig/aig/aigOrder.c
View File

@ -49,7 +49,7 @@ void Aig_ManOrderStart( Aig_Man_t * p )
p->nOrderAlloc = 2 * Aig_ManObjNumMax(p);
if ( p->nOrderAlloc < (1<<12) )
p->nOrderAlloc = (1<<12);
p->pOrderData = ALLOC( unsigned, 2 * p->nOrderAlloc );
p->pOrderData = ABC_ALLOC( unsigned, 2 * p->nOrderAlloc );
memset( p->pOrderData, 0xFF, sizeof(unsigned) * 2 * p->nOrderAlloc );
// add the constant node
p->pOrderData[0] = p->pOrderData[1] = 0;
@ -73,7 +73,7 @@ void Aig_ManOrderStart( Aig_Man_t * p )
void Aig_ManOrderStop( Aig_Man_t * p )
{
assert( p->pOrderData );
FREE( p->pOrderData );
ABC_FREE( p->pOrderData );
p->nOrderAlloc = 0;
p->iPrev = p->iNext = 0;
}
@ -97,7 +97,7 @@ void Aig_ObjOrderInsert( Aig_Man_t * p, int ObjId )
if ( ObjId >= p->nOrderAlloc )
{
int nOrderAlloc = 2 * ObjId;
p->pOrderData = REALLOC( unsigned, p->pOrderData, 2 * nOrderAlloc );
p->pOrderData = ABC_REALLOC( unsigned, p->pOrderData, 2 * nOrderAlloc );
memset( p->pOrderData + 2 * p->nOrderAlloc, 0xFF, sizeof(unsigned) * 2 * (nOrderAlloc - p->nOrderAlloc) );
p->nOrderAlloc = nOrderAlloc;
}

42
src/aig/aig/aigPart.c
View File

@ -30,10 +30,10 @@ struct Part_Man_t_
{
int nChunkSize; // the size of one chunk of memory (~1 Mb)
int nStepSize; // the step size in saving memory (~64 bytes)
char * pFreeBuf; // the pointer to free memory
int nFreeSize; // the size of remaining free memory
char * pFreeBuf; // the pointer to ABC_FREE memory
int nFreeSize; // the size of remaining ABC_FREE memory
Vec_Ptr_t * vMemory; // the memory allocated
Vec_Ptr_t * vFree; // the vector of free pieces of memory
Vec_Ptr_t * vFree; // the vector of ABC_FREE pieces of memory
};
typedef struct Part_One_t_ Part_One_t;
@ -67,7 +67,7 @@ static inline void Part_OneSetNext( char * pPart, char * pNext ) { *((char **)
Part_Man_t * Part_ManStart( int nChunkSize, int nStepSize )
{
Part_Man_t * p;
p = ALLOC( Part_Man_t, 1 );
p = ABC_ALLOC( Part_Man_t, 1 );
memset( p, 0, sizeof(Part_Man_t) );
p->nChunkSize = nChunkSize;
p->nStepSize = nStepSize;
@ -92,10 +92,10 @@ void Part_ManStop( Part_Man_t * p )
void * pMemory;
int i;
Vec_PtrForEachEntry( p->vMemory, pMemory, i )
free( pMemory );
ABC_FREE( pMemory );
Vec_PtrFree( p->vMemory );
Vec_PtrFree( p->vFree );
free( p );
ABC_FREE( p );
}
/**Function*************************************************************
@ -124,7 +124,7 @@ char * Part_ManFetch( Part_Man_t * p, int nSize )
nSizeReal = p->nStepSize * Type;
if ( p->nFreeSize < nSizeReal )
{
p->pFreeBuf = ALLOC( char, p->nChunkSize );
p->pFreeBuf = ABC_ALLOC( char, p->nChunkSize );
p->nFreeSize = p->nChunkSize;
Vec_PtrPush( p->vMemory, p->pFreeBuf );
}
@ -447,7 +447,7 @@ unsigned * Aig_ManSuppCharStart( Vec_Int_t * vOne, int nPis )
unsigned * pBuffer;
int i, Entry;
int nWords = Aig_BitWordNum(nPis);
pBuffer = ALLOC( unsigned, nWords );
pBuffer = ABC_ALLOC( unsigned, nWords );
memset( pBuffer, 0, sizeof(unsigned) * nWords );
Vec_IntForEachEntry( vOne, Entry, i )
{
@ -670,7 +670,7 @@ clk = clock();
vSupports = Aig_ManSupports( p );
if ( fVerbose )
{
PRT( "Supps", clock() - clk );
ABC_PRT( "Supps", clock() - clk );
}
// start char-based support representation
vPartSuppsBit = Vec_PtrAlloc( 1000 );
@ -716,13 +716,13 @@ clk = clock();
// stop char-based support representation
Vec_PtrForEachEntry( vPartSuppsBit, vTemp, i )
free( vTemp );
ABC_FREE( vTemp );
Vec_PtrFree( vPartSuppsBit );
//printf( "\n" );
if ( fVerbose )
{
PRT( "Parts", clock() - clk );
ABC_PRT( "Parts", clock() - clk );
}
clk = clock();
@ -748,7 +748,7 @@ clk = clock();
if ( fVerbose )
{
//PRT( "Comps", clock() - clk );
//ABC_PRT( "Comps", clock() - clk );
}
// cleanup
@ -797,7 +797,7 @@ clk = clock();
Vec_IntPush( vOne, i );
if ( fVerbose )
{
PRT( "Supps", clock() - clk );
ABC_PRT( "Supps", clock() - clk );
}
// start char-based support representation
@ -844,13 +844,13 @@ clk = clock();
// stop char-based support representation
Vec_PtrForEachEntry( vPartSuppsBit, vTemp, i )
free( vTemp );
ABC_FREE( vTemp );
Vec_PtrFree( vPartSuppsBit );
//printf( "\n" );
if ( fVerbose )
{
PRT( "Parts", clock() - clk );
ABC_PRT( "Parts", clock() - clk );
}
clk = clock();
@ -876,7 +876,7 @@ clk = clock();
if ( fVerbose )
{
//PRT( "Comps", clock() - clk );
//ABC_PRT( "Comps", clock() - clk );
}
// cleanup
@ -1281,7 +1281,7 @@ Aig_Man_t * Aig_ManChoicePartitioned( Vec_Ptr_t * vAigs, int nPartSize, int nCon
}
Vec_PtrFree( vOuts );
// store contents of pData pointers
ppData = ALLOC( void *, Aig_ManObjNumMax(pAigPart) );
ppData = ABC_ALLOC( void *, Aig_ManObjNumMax(pAigPart) );
Aig_ManForEachObj( pAigPart, pObj, k )
ppData[k] = pObj->pData;
// report the process
@ -1295,7 +1295,7 @@ Aig_Man_t * Aig_ManChoicePartitioned( Vec_Ptr_t * vAigs, int nPartSize, int nCon
// reset the pData pointers
Aig_ManForEachObj( pAigPart, pObj, k )
pObj->pData = ppData[k];
free( ppData );
ABC_FREE( ppData );
// transfer representatives to the total AIG
if ( pAigPart->pReprs )
Aig_ManTransferRepr( pAigTotal, pAigPart );
@ -1372,7 +1372,7 @@ Aig_Man_t * Aig_ManFraigPartitioned( Aig_Man_t * pAig, int nPartSize, int nConfM
// derive the partition AIG
pAigPart = Aig_ManDupPartAll( pAig, vPart );
// store contents of pData pointers
ppData = ALLOC( void *, Aig_ManObjNumMax(pAigPart) );
ppData = ABC_ALLOC( void *, Aig_ManObjNumMax(pAigPart) );
Aig_ManForEachObj( pAigPart, pObj, k )
ppData[k] = pObj->pData;
// report the process
@ -1386,7 +1386,7 @@ Aig_Man_t * Aig_ManFraigPartitioned( Aig_Man_t * pAig, int nPartSize, int nConfM
// reset the pData pointers
Aig_ManForEachObj( pAigPart, pObj, k )
pObj->pData = ppData[k];
free( ppData );
ABC_FREE( ppData );
// transfer representatives to the total AIG
if ( pAigPart->pReprs )
Aig_ManTransferRepr( pAig, pAigPart );
@ -1549,7 +1549,7 @@ Aig_Man_t * Aig_ManChoiceConstructive( Vec_Ptr_t * vAigs, int fVerbose )
// create room for equivalent nodes and representatives
assert( pNew->pReprs == NULL );
pNew->nReprsAlloc = Vec_PtrSize(vAigs) * Aig_ManObjNumMax(pNew);
pNew->pReprs = ALLOC( Aig_Obj_t *, pNew->nReprsAlloc );
pNew->pReprs = ABC_ALLOC( Aig_Obj_t *, pNew->nReprsAlloc );
memset( pNew->pReprs, 0, sizeof(Aig_Obj_t *) * pNew->nReprsAlloc );
// add other AIGs one by one
Vec_PtrForEachEntryStart( vAigs, pThis, i, 1 )

22
src/aig/aig/aigPartReg.c
View File

@ -39,7 +39,7 @@ struct Aig_ManPre_t_
// info about the current partition
Vec_Int_t * vRegs; // registers of this partition
Vec_Int_t * vUniques; // unique registers of this partition
Vec_Int_t * vFreeVars; // free variables of this partition
Vec_Int_t * vFreeVars; // ABC_FREE variables of this partition
Vec_Flt_t * vPartCost; // costs of adding each variable
char * pfPartVars; // input/output registers of the partition
};
@ -63,7 +63,7 @@ struct Aig_ManPre_t_
Aig_ManPre_t * Aig_ManRegManStart( Aig_Man_t * pAig, int nPartSize )
{
Aig_ManPre_t * p;
p = ALLOC( Aig_ManPre_t, 1 );
p = ABC_ALLOC( Aig_ManPre_t, 1 );
memset( p, 0, sizeof(Aig_ManPre_t) );
p->pAig = pAig;
p->vMatrix = Aig_ManSupportsRegisters( pAig );
@ -73,9 +73,9 @@ Aig_ManPre_t * Aig_ManRegManStart( Aig_Man_t * pAig, int nPartSize )
p->vUniques = Vec_IntAlloc(256);
p->vFreeVars = Vec_IntAlloc(256);
p->vPartCost = Vec_FltAlloc(256);
p->pfUsedRegs = ALLOC( char, Aig_ManRegNum(p->pAig) );
p->pfUsedRegs = ABC_ALLOC( char, Aig_ManRegNum(p->pAig) );
memset( p->pfUsedRegs, 0, sizeof(char) * Aig_ManRegNum(p->pAig) );
p->pfPartVars = ALLOC( char, Aig_ManRegNum(p->pAig) );
p->pfPartVars = ABC_ALLOC( char, Aig_ManRegNum(p->pAig) );
return p;
}
@ -99,9 +99,9 @@ void Aig_ManRegManStop( Aig_ManPre_t * p )
Vec_IntFree( p->vUniques );
Vec_IntFree( p->vFreeVars );
Vec_FltFree( p->vPartCost );
free( p->pfUsedRegs );
free( p->pfPartVars );
free( p );
ABC_FREE( p->pfUsedRegs );
ABC_FREE( p->pfPartVars );
ABC_FREE( p );
}
/**Function*************************************************************
@ -155,7 +155,7 @@ int Aig_ManRegFindBestVar( Aig_ManPre_t * p )
Vec_Int_t * vSupp;
int nNewVars, nNewVarsBest = AIG_INFINITY;
int iVarFree, iVarSupp, iVarBest = -1, i, k;
// go through the free variables
// go through the ABC_FREE variables
Vec_IntForEachEntry( p->vFreeVars, iVarFree, i )
{
// if ( p->pfUsedRegs[iVarFree] )
@ -205,7 +205,7 @@ void Aig_ManRegPartitionAdd( Aig_ManPre_t * p, int iReg )
p->pfUsedRegs[iReg] = 1;
Vec_IntPush( p->vUniques, iReg );
}
// remove it from the free variables
// remove it from the ABC_FREE variables
if ( Vec_IntSize(p->vFreeVars) > 0 )
{
assert( p->pfPartVars[iReg] );
@ -372,7 +372,7 @@ Aig_Man_t * Aig_ManRegCreatePart( Aig_Man_t * pAig, Vec_Int_t * vPart, int * pnC
// create map
if ( ppMapBack )
{
pMapBack = ALLOC( int, Aig_ManObjNumMax(pNew) );
pMapBack = ABC_ALLOC( int, Aig_ManObjNumMax(pNew) );
memset( pMapBack, 0xff, sizeof(int) * Aig_ManObjNumMax(pNew) );
// map constant nodes
pMapBack[0] = 0;
@ -441,7 +441,7 @@ Vec_Ptr_t * Aig_ManRegPartitionSmart( Aig_Man_t * pAig, int nPartSize )
//printf( "Part %3d Reg %3d : Free = %4d. Total = %4d. Ratio = %6.2f. Unique = %4d.\n", i, k,
// Vec_IntSize(p->vFreeVars), Vec_IntSize(p->vRegs),
// 1.0*Vec_IntSize(p->vFreeVars)/Vec_IntSize(p->vRegs), Vec_IntSize(p->vUniques) );
// quit if there are not free variables
// quit if there are not ABC_FREE variables
if ( Vec_IntSize(p->vFreeVars) == 0 )
break;
}

8
src/aig/aig/aigPartSat.c
View File

@ -520,7 +520,7 @@ int Aig_ManPartitionedSat( Aig_Man_t * p, int nAlgo, int nPartSize,
if ( fVerbose )
{
printf( "Partitioning derived %d partitions. ", Vec_IntFindMax(vNode2Part) + 1 );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
// split the original AIG into partition AIGs (vAigs)
@ -532,7 +532,7 @@ int Aig_ManPartitionedSat( Aig_Man_t * p, int nAlgo, int nPartSize,
if ( fVerbose )
{
printf( "Partions were transformed into AIGs. " );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
// synthesize partitions
@ -567,13 +567,13 @@ clk = clock();
break;
}
// call the SAT solver
status = sat_solver_solve( pSat, NULL, NULL, (sint64)nConfRemaining, (sint64)0, (sint64)0, (sint64)0 );
status = sat_solver_solve( pSat, NULL, NULL, (ABC_INT64_T)nConfRemaining, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
if ( fVerbose )
{
printf( "%4d : Aig = %6d. Vs = %7d. RootCs = %7d. LearnCs = %6d. ",
i, nNodes += Aig_ManNodeNum(pAig), sat_solver_nvars(pSat),
(int)pSat->stats.clauses, (int)pSat->stats.learnts );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
// analize the result
if ( status == l_False )

8
src/aig/aig/aigRepr.c
View File

@ -44,7 +44,7 @@ void Aig_ManReprStart( Aig_Man_t * p, int nIdMax )
assert( Aig_ManBufNum(p) == 0 );
assert( p->pReprs == NULL );
p->nReprsAlloc = nIdMax;
p->pReprs = ALLOC( Aig_Obj_t *, p->nReprsAlloc );
p->pReprs = ABC_ALLOC( Aig_Obj_t *, p->nReprsAlloc );
memset( p->pReprs, 0, sizeof(Aig_Obj_t *) * p->nReprsAlloc );
}
@ -62,7 +62,7 @@ void Aig_ManReprStart( Aig_Man_t * p, int nIdMax )
void Aig_ManReprStop( Aig_Man_t * p )
{
assert( p->pReprs != NULL );
FREE( p->pReprs );
ABC_FREE( p->pReprs );
p->nReprsAlloc = 0;
}
@ -214,7 +214,7 @@ void Aig_ManTransferRepr( Aig_Man_t * pNew, Aig_Man_t * pOld )
if ( pNew->nReprsAlloc < Aig_ManObjNumMax(pNew) )
{
int nReprsAllocNew = 2 * Aig_ManObjNumMax(pNew);
pNew->pReprs = REALLOC( Aig_Obj_t *, pNew->pReprs, nReprsAllocNew );
pNew->pReprs = ABC_REALLOC( Aig_Obj_t *, pNew->pReprs, nReprsAllocNew );
memset( pNew->pReprs + pNew->nReprsAlloc, 0, sizeof(Aig_Obj_t *) * (nReprsAllocNew-pNew->nReprsAlloc) );
pNew->nReprsAlloc = nReprsAllocNew;
}
@ -476,7 +476,7 @@ void Aig_ManMarkValidChoices( Aig_Man_t * p )
assert( p->pReprs != NULL );
// create equivalent nodes in the manager
assert( p->pEquivs == NULL );
p->pEquivs = ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
p->pEquivs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p) );
memset( p->pEquivs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p) );
// make the choice nodes
Aig_ManForEachNode( p, pObj, i )

20
src/aig/aig/aigRet.c
View File

@ -174,7 +174,7 @@ void Rtm_ObjTransferToBig( Rtm_Man_t * p, Rtm_Edg_t * pEdge )
if ( p->nExtraCur + 1 > p->nExtraAlloc )
{
int nExtraAllocNew = AIG_MAX( 2 * p->nExtraAlloc, 1024 );
p->pExtra = REALLOC( unsigned, p->pExtra, nExtraAllocNew );
p->pExtra = ABC_REALLOC( unsigned, p->pExtra, nExtraAllocNew );
p->nExtraAlloc = nExtraAllocNew;
}
p->pExtra[p->nExtraCur] = pEdge->LData;
@ -200,7 +200,7 @@ void Rtm_ObjTransferToBigger( Rtm_Man_t * p, Rtm_Edg_t * pEdge )
if ( p->nExtraCur + nWords + 1 > p->nExtraAlloc )
{
int nExtraAllocNew = AIG_MAX( 2 * p->nExtraAlloc, 1024 );
p->pExtra = REALLOC( unsigned, p->pExtra, nExtraAllocNew );
p->pExtra = ABC_REALLOC( unsigned, p->pExtra, nExtraAllocNew );
p->nExtraAlloc = nExtraAllocNew;
}
memcpy( p->pExtra + p->nExtraCur, p->pExtra + pEdge->LData, sizeof(unsigned) * nWords );
@ -300,7 +300,7 @@ Rtm_Man_t * Rtm_ManAlloc( Aig_Man_t * p )
{
Rtm_Man_t * pRtm;
// start the manager
pRtm = ALLOC( Rtm_Man_t, 1 );
pRtm = ABC_ALLOC( Rtm_Man_t, 1 );
memset( pRtm, 0, sizeof(Rtm_Man_t) );
// perform initializations
pRtm->vObjs = Vec_PtrAlloc( Aig_ManObjNum(p) );
@ -327,8 +327,8 @@ void Rtm_ManFree( Rtm_Man_t * p )
Vec_PtrFree( p->vPis );
Vec_PtrFree( p->vPos );
Aig_MmFlexStop( p->pMem, 0 );
FREE( p->pExtra );
free( p );
ABC_FREE( p->pExtra );
ABC_FREE( p );
}
/**Function*************************************************************
@ -767,7 +767,7 @@ Aig_Man_t * Rtm_ManToAig( Rtm_Man_t * pRtm )
Rtm_Edg_t * pEdge;
int i, k, m, Val, nLatches, * pLatches;
// count latches and mark the first latch on each edge
pLatches = ALLOC( int, 2 * Vec_PtrSize(pRtm->vObjs) );
pLatches = ABC_ALLOC( int, 2 * Vec_PtrSize(pRtm->vObjs) );
nLatches = 0;
Rtm_ManForEachObj( pRtm, pObjRtm, i )
Rtm_ObjForEachFaninEdge( pObjRtm, pEdge, k )
@ -808,7 +808,7 @@ Aig_Man_t * Rtm_ManToAig( Rtm_Man_t * pRtm )
}
// assert( Aig_Regular(pObjNew)->nRefs > 0 );
}
free( pLatches );
ABC_FREE( pLatches );
Aig_ManSetRegNum( pNew, nLatches );
// remove useless nodes
Aig_ManCleanup( pNew );
@ -852,7 +852,7 @@ clk = clock();
if ( fVerbose )
{
printf( "Detected %d autonomous objects. ", nAutos );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
// set the current retiming number
@ -943,7 +943,7 @@ clk = clock();
printf( "Performed %d %s latch moves of max depth %d and max latch count %d.\n",
Vec_PtrSize(vQueue), fForward? "fwd":"bwd", DegreeMax, Rtm_ManLatchMax(pRtm) );
printf( "Memory usage = %d. ", pRtm->nExtraCur );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
Vec_PtrFree( vQueue );
@ -957,7 +957,7 @@ clk = clock();
pNew = Aig_ManReduceLaches( pNew, fVerbose );
if ( fVerbose )
{
PRT( "Register sharing time", clock() - clk );
ABC_PRT( "Register sharing time", clock() - clk );
}
return pNew;
}

11
src/aig/aig/aigScl.c
View File

@ -396,7 +396,7 @@ Vec_Ptr_t * Aig_ManReduceLachesOnce( Aig_Man_t * p )
Aig_ManForEachPiSeq( p, pObj, i )
Vec_PtrPush( vMap, pObj );
// create mapping of fanin nodes into the corresponding latch outputs
pMapping = ALLOC( int, 2 * Aig_ManObjNumMax(p) );
pMapping = ABC_ALLOC( int, 2 * Aig_ManObjNumMax(p) );
Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
{
pFanin = Aig_ObjFanin0(pObjLi);
@ -427,7 +427,7 @@ Vec_Ptr_t * Aig_ManReduceLachesOnce( Aig_Man_t * p )
}
}
}
free( pMapping );
ABC_FREE( pMapping );
Aig_ManForEachLiSeq( p, pObj, i )
{
pFanin = Aig_ObjFanin0(pObj);
@ -456,6 +456,7 @@ Aig_Man_t * Aig_ManReduceLaches( Aig_Man_t * p, int fVerbose )
printf( "Performing combinational register sweep:\n" );
for ( nSaved = 0; (nCur = Aig_ManReduceLachesCount(p)); nSaved += nCur )
{
// printf( "Reducible = %d\n", nCur );
vMap = Aig_ManReduceLachesOnce( p );
p = Aig_ManRemap( pTemp = p, vMap );
Vec_PtrFree( vMap );
@ -532,7 +533,7 @@ void Aig_ManComputeSccs( Aig_Man_t * p )
// detect strongly connected components
vComp = Vec_IntAlloc( Aig_ManRegNum(p) );
pVarsTot = ALLOC( char, Aig_ManRegNum(p) );
pVarsTot = ABC_ALLOC( char, Aig_ManRegNum(p) );
memset( pVarsTot, 0, Aig_ManRegNum(p) * sizeof(char) );
for ( nComps = 0; ; nComps++ )
{
@ -571,7 +572,7 @@ void Aig_ManComputeSccs( Aig_Man_t * p )
}
printf( "SCC #%d contains %5d registers.\n", nComps+1, Vec_IntSize(vComp) );
}
free( pVarsTot );
ABC_FREE( pVarsTot );
Vec_IntFree( vComp );
Vec_PtrFree( vMatrix );
Vec_VecFree( (Vec_Vec_t *)vMatrix2 );
@ -622,7 +623,7 @@ Aig_Man_t * Aig_ManSclPart( Aig_Man_t * pAig, int fLatchConst, int fLatchEqual,
Aig_ManStop( pNew );
}
Aig_ManStop( pTemp );
free( pMapBack );
ABC_FREE( pMapBack );
}
pNew = Aig_ManDupRepr( pAig, 0 );
Aig_ManSeqCleanup( pNew );

8
src/aig/aig/aigTable.c
View File

@ -75,7 +75,7 @@ clk = clock();
nTableSizeOld = p->nTableSize;
// get the new table
p->nTableSize = Aig_PrimeCudd( 2 * Aig_ManNodeNum(p) );
p->pTable = ALLOC( Aig_Obj_t *, p->nTableSize );
p->pTable = ABC_ALLOC( Aig_Obj_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize );
// rehash the entries from the old table
Counter = 0;
@ -93,9 +93,9 @@ clk = clock();
}
assert( Counter == Aig_ManNodeNum(p) );
// printf( "Increasing the structural table size from %6d to %6d. ", nTableSizeOld, p->nTableSize );
// PRT( "Time", clock() - clk );
// ABC_PRT( "Time", clock() - clk );
// replace the table and the parameters
free( pTableOld );
ABC_FREE( pTableOld );
}
/**Function*************************************************************
@ -259,7 +259,7 @@ void Aig_TableProfile( Aig_Man_t * p )
******************************************************************************/
void Aig_TableClear( Aig_Man_t * p )
{
FREE( p->pTable );
ABC_FREE( p->pTable );
p->nTableSize = 0;
}

8
src/aig/aig/aigTsim.c
View File

@ -126,14 +126,14 @@ static inline void Aig_TsiSetNext( unsigned * pState, int nWords, unsigned
Aig_Tsi_t * Aig_TsiStart( Aig_Man_t * pAig )
{
Aig_Tsi_t * p;
p = (Aig_Tsi_t *)malloc( sizeof(Aig_Tsi_t) );
p = ABC_ALLOC( Aig_Tsi_t, 1 );
memset( p, 0, sizeof(Aig_Tsi_t) );
p->pAig = pAig;
p->nWords = Aig_BitWordNum( 2*Aig_ManRegNum(pAig) );
p->vStates = Vec_PtrAlloc( 1000 );
p->pMem = Aig_MmFixedStart( sizeof(unsigned) * p->nWords + sizeof(unsigned *), 10000 );
p->nBins = Aig_PrimeCudd(TSI_MAX_ROUNDS/2);
p->pBins = ALLOC( unsigned *, p->nBins );
p->pBins = ABC_ALLOC( unsigned *, p->nBins );
memset( p->pBins, 0, sizeof(unsigned *) * p->nBins );
return p;
}
@ -153,8 +153,8 @@ void Aig_TsiStop( Aig_Tsi_t * p )
{
Aig_MmFixedStop( p->pMem, 0 );
Vec_PtrFree( p->vStates );
free( p->pBins );
free( p );
ABC_FREE( p->pBins );
ABC_FREE( p );
}
/**Function*************************************************************

38
src/aig/aig/aigUtil.c
View File

@ -82,6 +82,22 @@ void Aig_ManIncrementTravId( Aig_Man_t * p )
p->nTravIds++;
}
/**Function*************************************************************
Synopsis [Make sure AIG has not gaps in the numeric order.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Aig_ManHasNoGaps( Aig_Man_t * p )
{
return (int)(Aig_ManObjNum(p) == Aig_ManPiNum(p) + Aig_ManPoNum(p) + Aig_ManNodeNum(p) + 1);
}
/**Function*************************************************************
Synopsis [Collect the latches.]
@ -997,7 +1013,7 @@ void Aig_ManCleanPioNumbers( Aig_Man_t * p )
SeeAlso []
***********************************************************************/
int Aig_ManCountChoices( Aig_Man_t * p )
int Aig_ManChoiceNum( Aig_Man_t * p )
{
Aig_Obj_t * pObj;
int i, Counter = 0;
@ -1160,6 +1176,26 @@ unsigned Aig_ManRandom( int fReset )
}
/**Function*************************************************************
Synopsis [Creates random info for the primary inputs.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Aig_ManRandomInfo( Vec_Ptr_t * vInfo, int iWordStart, int iWordStop )
{
unsigned * pInfo;
int i, w;
Vec_PtrForEachEntry( vInfo, pInfo, i )
for ( w = iWordStart; w < iWordStop; w++ )
pInfo[w] = Aig_ManRandom(0);
}
/**Function*************************************************************
Synopsis [Returns the result of merging the two vectors.]

5
src/aig/bar/bar.c
View File

@ -21,6 +21,7 @@
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "abc_global.h"
#include "bar.h"
////////////////////////////////////////////////////////////////////////
@ -67,7 +68,7 @@ Bar_Progress_t * Bar_ProgressStart( FILE * pFile, int nItemsTotal )
if ( pFrame == NULL )
return NULL;
if ( !Abc_FrameShowProgress(pFrame) ) return NULL;
p = (Bar_Progress_t *) malloc(sizeof(Bar_Progress_t));
p = ABC_ALLOC( Bar_Progress_t, 1 );
memset( p, 0, sizeof(Bar_Progress_t) );
p->pFile = pFile;
p->nItemsTotal = nItemsTotal;
@ -123,7 +124,7 @@ void Bar_ProgressStop( Bar_Progress_t * p )
{
if ( p == NULL ) return;
Bar_ProgressClean( p );
free( p );
ABC_FREE( p );
}
/**Function*************************************************************

8
src/aig/bar/bar.h
View File

@ -21,10 +21,6 @@
#ifndef __BAR_H__
#define __BAR_H__
#ifdef __cplusplus
extern "C" {
#endif
#ifdef _WIN32
#define inline __inline // compatible with MS VS 6.0
#endif
@ -37,6 +33,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
#define BAR_PROGRESS_USE 1
////////////////////////////////////////////////////////////////////////

8
src/aig/bbr/bbr.h
View File

@ -21,10 +21,6 @@
#ifndef __BBR_H__
#define __BBR_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@ -38,6 +34,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////

8
src/aig/bbr/bbrCex.c
View File

@ -73,7 +73,7 @@ Ssw_Cex_t * Aig_ManVerifyUsingBddsCountExample( Aig_Man_t * p, DdManager * dd,
}
// allocate room for the cube
pValues = ALLOC( char, dd->size );
pValues = ABC_ALLOC( char, dd->size );
// get the last cube
RetValue = Cudd_bddPickOneCube( dd, bCubeFirst, pValues );
@ -105,7 +105,7 @@ Ssw_Cex_t * Aig_ManVerifyUsingBddsCountExample( Aig_Man_t * p, DdManager * dd,
if ( !fSilent )
printf( "BDDs blew up during image computation. " );
Bbr_bddImageTreeDelete( pTree );
free( pValues );
ABC_FREE( pValues );
return NULL;
}
Cudd_Ref( bImage );
@ -145,7 +145,7 @@ Ssw_Cex_t * Aig_ManVerifyUsingBddsCountExample( Aig_Man_t * p, DdManager * dd,
}
// cleanup
Bbr_bddImageTreeDelete( pTree );
free( pValues );
ABC_FREE( pValues );
// verify the counter example
if ( Vec_PtrSize(vOnionRings) < 1000 )
{
@ -155,7 +155,7 @@ Ssw_Cex_t * Aig_ManVerifyUsingBddsCountExample( Aig_Man_t * p, DdManager * dd,
}
if ( fVerbose && !fSilent )
{
PRT( "Counter-example generation time", clock() - clk );
ABC_PRT( "Counter-example generation time", clock() - clk );
}
return pCex;
}

78
src/aig/bbr/bbrImage.c
View File

@ -94,8 +94,8 @@ struct Bbr_ImageVar_t_
#define b0 Cudd_Not((dd)->one)
#define b1 (dd)->one
#ifndef PRB
#define PRB(dd,f) printf("%s = ", #f); Bbr_bddPrint(dd,f); printf("\n")
#ifndef ABC_PRB
#define ABC_PRB(dd,f) printf("%s = ", #f); Bbr_bddPrint(dd,f); printf("\n")
#endif
/**AutomaticStart*************************************************************/
@ -191,26 +191,26 @@ Bbr_ImageTree_t * Bbr_bddImageStart(
{
for ( v = 0; v < dd->size; v++ )
if ( pVars[v] )
free( pVars[v] );
free( pVars );
ABC_FREE( pVars[v] );
ABC_FREE( pVars );
for ( v = 0; v <= nParts; v++ )
if ( pNodes[v] )
{
Bbr_DeleteParts_rec( pNodes[v] );
Bbr_bddImageTreeDelete_rec( pNodes[v] );
}
free( pNodes );
free( pParts );
ABC_FREE( pNodes );
ABC_FREE( pParts );
return NULL;
}
// make sure the variables are gone
for ( v = 0; v < dd->size; v++ )
assert( pVars[v] == NULL );
FREE( pVars );
ABC_FREE( pVars );
// create the tree
pTree = ALLOC( Bbr_ImageTree_t, 1 );
pTree = ABC_ALLOC( Bbr_ImageTree_t, 1 );
memset( pTree, 0, sizeof(Bbr_ImageTree_t) );
pTree->pCare = pCare;
pTree->fVerbose = fVerbose;
@ -221,7 +221,7 @@ Bbr_ImageTree_t * Bbr_bddImageStart(
// make sure the nodes are gone
for ( v = 0; v < nParts + 1; v++ )
assert( pNodes[v] == NULL );
FREE( pNodes );
ABC_FREE( pNodes );
// if ( fVerbose )
// Bbr_bddImagePrintTree( pTree );
@ -231,7 +231,7 @@ Bbr_ImageTree_t * Bbr_bddImageStart(
// clean the partitions
Bbr_DeleteParts_rec( pTree->pRoot );
FREE( pParts );
ABC_FREE( pParts );
return pTree;
}
@ -261,9 +261,9 @@ DdNode * Bbr_bddImageCompute( Bbr_ImageTree_t * pTree, DdNode * bCare )
if ( bRem != b1 )
{
printf( "Original care set support: " );
PRB( dd, pTree->bCareSupp );
ABC_PRB( dd, pTree->bCareSupp );
printf( "Current care set support: " );
PRB( dd, bSupp );
ABC_PRB( dd, bSupp );
Cudd_RecursiveDeref( dd, bSupp );
Cudd_RecursiveDeref( dd, bRem );
printf( "The care set depends on some vars that were not in the care set during scheduling.\n" );
@ -305,7 +305,7 @@ void Bbr_bddImageTreeDelete( Bbr_ImageTree_t * pTree )
if ( pTree->bCareSupp )
Cudd_RecursiveDeref( pTree->pRoot->dd, pTree->bCareSupp );
Bbr_bddImageTreeDelete_rec( pTree->pRoot );
FREE( pTree );
ABC_FREE( pTree );
}
/**Function*************************************************************
@ -406,11 +406,11 @@ Bbr_ImagePart_t ** Bbr_CreateParts( DdManager * dd,
int i;
// start the partitions
pParts = ALLOC( Bbr_ImagePart_t *, nParts + 1 );
pParts = ABC_ALLOC( Bbr_ImagePart_t *, nParts + 1 );
// create structures for each variable
for ( i = 0; i < nParts; i++ )
{
pParts[i] = ALLOC( Bbr_ImagePart_t, 1 );
pParts[i] = ABC_ALLOC( Bbr_ImagePart_t, 1 );
pParts[i]->bFunc = pbParts[i]; Cudd_Ref( pParts[i]->bFunc );
pParts[i]->bSupp = Cudd_Support( dd, pParts[i]->bFunc ); Cudd_Ref( pParts[i]->bSupp );
pParts[i]->nSupp = Cudd_SupportSize( dd, pParts[i]->bSupp );
@ -418,7 +418,7 @@ Bbr_ImagePart_t ** Bbr_CreateParts( DdManager * dd,
pParts[i]->iPart = i;
}
// add the care set as the last partition
pParts[nParts] = ALLOC( Bbr_ImagePart_t, 1 );
pParts[nParts] = ABC_ALLOC( Bbr_ImagePart_t, 1 );
pParts[nParts]->bFunc = bCare; Cudd_Ref( pParts[nParts]->bFunc );
pParts[nParts]->bSupp = Cudd_Support( dd, pParts[nParts]->bFunc ); Cudd_Ref( pParts[nParts]->bSupp );
pParts[nParts]->nSupp = Cudd_SupportSize( dd, pParts[nParts]->bSupp );
@ -448,11 +448,11 @@ Bbr_ImageVar_t ** Bbr_CreateVars( DdManager * dd,
int nVarsTotal, iVar, p, Counter;
// put all the functions into one array
pbFuncs = ALLOC( DdNode *, nParts );
pbFuncs = ABC_ALLOC( DdNode *, nParts );
for ( p = 0; p < nParts; p++ )
pbFuncs[p] = pParts[p]->bSupp;
bSupp = Cudd_VectorSupport( dd, pbFuncs, nParts ); Cudd_Ref( bSupp );
FREE( pbFuncs );
ABC_FREE( pbFuncs );
// remove the NS vars
bCubeNs = Cudd_bddComputeCube( dd, pbVars, NULL, nVars ); Cudd_Ref( bCubeNs );
@ -464,13 +464,13 @@ Bbr_ImageVar_t ** Bbr_CreateVars( DdManager * dd,
nVarsTotal = Cudd_SupportSize( dd, bSupp );
// start the variables
pVars = ALLOC( Bbr_ImageVar_t *, dd->size );
pVars = ABC_ALLOC( Bbr_ImageVar_t *, dd->size );
memset( pVars, 0, sizeof(Bbr_ImageVar_t *) * dd->size );
// create structures for each variable
for ( bSuppTemp = bSupp; bSuppTemp != b1; bSuppTemp = cuddT(bSuppTemp) )
{
iVar = bSuppTemp->index;
pVars[iVar] = ALLOC( Bbr_ImageVar_t, 1 );
pVars[iVar] = ABC_ALLOC( Bbr_ImageVar_t, 1 );
pVars[iVar]->iNum = iVar;
// collect all the parts this var belongs to
Counter = 0;
@ -517,11 +517,11 @@ Bbr_ImageNode_t ** Bbr_CreateNodes( DdManager * dd,
Bbr_ImagePart_t * pPart; // the partition (temporary)
*/
// start the partitions
pNodes = ALLOC( Bbr_ImageNode_t *, nParts );
pNodes = ABC_ALLOC( Bbr_ImageNode_t *, nParts );
// create structures for each leaf nodes
for ( i = 0; i < nParts; i++ )
{
pNodes[i] = ALLOC( Bbr_ImageNode_t, 1 );
pNodes[i] = ABC_ALLOC( Bbr_ImageNode_t, 1 );
memset( pNodes[i], 0, sizeof(Bbr_ImageNode_t) );
pNodes[i]->dd = dd;
pNodes[i]->pPart = pParts[i];
@ -548,7 +548,7 @@ Bbr_ImageNode_t ** Bbr_CreateNodes( DdManager * dd,
}
// remove these variables
Cudd_RecursiveDeref( dd, pVars[v]->bParts );
FREE( pVars[v] );
ABC_FREE( pVars[v] );
}
// assign the leaf node images
@ -583,9 +583,9 @@ Bbr_ImageNode_t ** Bbr_CreateNodes( DdManager * dd,
for ( i = 0; i < nParts; i++ )
{
pNode = pNodes[i];
PRB( dd, pNode->bCube );
PRB( dd, pNode->pPart->bFunc );
PRB( dd, pNode->pPart->bSupp );
ABC_PRB( dd, pNode->bCube );
ABC_PRB( dd, pNode->pPart->bFunc );
ABC_PRB( dd, pNode->pPart->bSupp );
printf( "\n" );
}
*/
@ -614,7 +614,7 @@ void Bbr_DeleteParts_rec( Bbr_ImageNode_t * pNode )
pPart = pNode->pPart;
Cudd_RecursiveDeref( pNode->dd, pPart->bFunc );
Cudd_RecursiveDeref( pNode->dd, pPart->bSupp );
FREE( pNode->pPart );
ABC_FREE( pNode->pPart );
}
/**Function*************************************************************
@ -639,7 +639,7 @@ void Bbr_bddImageTreeDelete_rec( Bbr_ImageNode_t * pNode )
if ( pNode->bImage )
Cudd_RecursiveDeref( pNode->dd, pNode->bImage );
assert( pNode->pPart == NULL );
FREE( pNode );
ABC_FREE( pNode );
}
/**Function*************************************************************
@ -757,11 +757,11 @@ int Bbr_BuildTreeNode( DdManager * dd,
Cudd_RecursiveDeref( dd, bTemp );
// clean this var
Cudd_RecursiveDeref( dd, pVars[v]->bParts );
FREE( pVars[v] );
ABC_FREE( pVars[v] );
}
// clean the best var
Cudd_RecursiveDeref( dd, pVars[iVarBest]->bParts );
FREE( pVars[iVarBest] );
ABC_FREE( pVars[iVarBest] );
// combines two nodes
pNode = Bbr_CombineTwoNodes( dd, bCube, pNode1, pNode2 );
@ -884,7 +884,7 @@ Bbr_ImageNode_t * Bbr_CombineTwoNodes( DdManager * dd, DdNode * bCube,
Bbr_ImagePart_t * pPart;
// create a new partition
pPart = ALLOC( Bbr_ImagePart_t, 1 );
pPart = ABC_ALLOC( Bbr_ImagePart_t, 1 );
memset( pPart, 0, sizeof(Bbr_ImagePart_t) );
// create the function
pPart->bFunc = Cudd_bddAndAbstract( dd, pNode1->pPart->bFunc, pNode2->pPart->bFunc, bCube );
@ -897,12 +897,12 @@ Bbr_ImageNode_t * Bbr_CombineTwoNodes( DdManager * dd, DdNode * bCube,
pPart->nNodes = Cudd_DagSize( pPart->bFunc );
pPart->iPart = -1;
/*
PRB( dd, pNode1->pPart->bSupp );
PRB( dd, pNode2->pPart->bSupp );
PRB( dd, pPart->bSupp );
ABC_PRB( dd, pNode1->pPart->bSupp );
ABC_PRB( dd, pNode2->pPart->bSupp );
ABC_PRB( dd, pPart->bSupp );
*/
// create a new node
pNode = ALLOC( Bbr_ImageNode_t, 1 );
pNode = ABC_ALLOC( Bbr_ImageNode_t, 1 );
memset( pNode, 0, sizeof(Bbr_ImageNode_t) );
pNode->dd = dd;
pNode->pPart = pPart;
@ -1114,7 +1114,7 @@ void Bbr_bddImagePrintTree_rec( Bbr_ImageNode_t * pNode, int Offset )
printf( "<%d> ", pNode->pPart->iPart );
if ( Cube != NULL )
{
PRB( pNode->dd, Cube );
ABC_PRB( pNode->dd, Cube );
}
else
printf( "\n" );
@ -1124,7 +1124,7 @@ void Bbr_bddImagePrintTree_rec( Bbr_ImageNode_t * pNode, int Offset )
printf( "<*> " );
if ( Cube != NULL )
{
PRB( pNode->dd, Cube );
ABC_PRB( pNode->dd, Cube );
}
else
printf( "\n" );
@ -1198,7 +1198,7 @@ Bbr_ImageTree2_t * Bbr_bddImageStart2(
DdNode * bCubeAll, * bCubeNot, * bTemp;
int i;
pTree = ALLOC( Bbr_ImageTree2_t, 1 );
pTree = ABC_ALLOC( Bbr_ImageTree2_t, 1 );
pTree->dd = dd;
pTree->bImage = NULL;
@ -1259,7 +1259,7 @@ void Bbr_bddImageTreeDelete2( Bbr_ImageTree2_t * pTree )
Cudd_RecursiveDeref( pTree->dd, pTree->bCube );
if ( pTree->bImage )
Cudd_RecursiveDeref( pTree->dd, pTree->bImage );
FREE( pTree );
ABC_FREE( pTree );
}
/**Function*************************************************************

26
src/aig/bbr/bbrReach.c
View File

@ -101,8 +101,8 @@ DdNode * Aig_ManInitStateVarMap( DdManager * dd, Aig_Man_t * p, int fVerbose )
int i;
// set the variable mapping for Cudd_bddVarMap()
pbVarsX = ALLOC( DdNode *, dd->size );
pbVarsY = ALLOC( DdNode *, dd->size );
pbVarsX = ABC_ALLOC( DdNode *, dd->size );
pbVarsY = ABC_ALLOC( DdNode *, dd->size );
bProd = (dd)->one; Cudd_Ref( bProd );
Saig_ManForEachLo( p, pLatch, i )
{
@ -113,8 +113,8 @@ DdNode * Aig_ManInitStateVarMap( DdManager * dd, Aig_Man_t * p, int fVerbose )
Cudd_RecursiveDeref( dd, bTemp );
}
Cudd_SetVarMap( dd, pbVarsX, pbVarsY, Saig_ManRegNum(p) );
FREE( pbVarsX );
FREE( pbVarsY );
ABC_FREE( pbVarsX );
ABC_FREE( pbVarsY );
Cudd_Deref( bProd );
return bProd;
@ -137,7 +137,7 @@ DdNode ** Aig_ManCreateOutputs( DdManager * dd, Aig_Man_t * p )
Aig_Obj_t * pNode;
int i;
// compute the transition relation
pbOutputs = ALLOC( DdNode *, Saig_ManPoNum(p) );
pbOutputs = ABC_ALLOC( DdNode *, Saig_ManPoNum(p) );
Saig_ManForEachPo( p, pNode, i )
{
pbOutputs[i] = Aig_ObjGlobalBdd(pNode); Cudd_Ref( pbOutputs[i] );
@ -174,13 +174,13 @@ DdNode ** Aig_ManCreatePartitions( DdManager * dd, Aig_Man_t * p, int fReorder,
Cudd_AutodynDisable( dd );
// compute the transition relation
pbParts = ALLOC( DdNode *, Saig_ManRegNum(p) );
pbParts = ABC_ALLOC( DdNode *, Saig_ManRegNum(p) );
Saig_ManForEachLi( p, pNode, i )
{
bVar = Cudd_bddIthVar( dd, Saig_ManCiNum(p) + i );
pbParts[i] = Cudd_bddXnor( dd, bVar, Aig_ObjGlobalBdd(pNode) ); Cudd_Ref( pbParts[i] );
}
// free global BDDs
// ABC_FREE global BDDs
Aig_ManFreeGlobalBdds( p, dd );
// reorder and disable reordering
@ -316,7 +316,7 @@ int Aig_ManComputeReachable( DdManager * dd, Aig_Man_t * p, DdNode ** pbParts, D
fprintf( stdout, "\r" );
}
Cudd_RecursiveDeref( dd, bNext );
// free the onion rings
// ABC_FREE the onion rings
Vec_PtrForEachEntry( vOnionRings, bTemp, i )
Cudd_RecursiveDeref( dd, bTemp );
Vec_PtrFree( vOnionRings );
@ -338,7 +338,7 @@ int Aig_ManComputeReachable( DdManager * dd, Aig_Man_t * p, DdNode ** pbParts, D
fprintf( stdout, "Reachable states = %.0f. (Ratio = %.4f %%)\n", nMints, 100.0*nMints/pow(2.0, Saig_ManRegNum(p)) );
fflush( stdout );
}
//PRB( dd, bReached );
//ABC_PRB( dd, bReached );
Cudd_RecursiveDeref( dd, bReached );
if ( nIters > nIterMax || Cudd_DagSize(bReached) > nBddMax )
{
@ -413,7 +413,7 @@ int Aig_ManVerifyUsingBdds( Aig_Man_t * p, int nBddMax, int nIterMax, int fParti
break;
}
}
// free the onion rings
// ABC_FREE the onion rings
Vec_PtrForEachEntry( vOnionRings, bTemp, i )
Cudd_RecursiveDeref( dd, bTemp );
Vec_PtrFree( vOnionRings );
@ -425,10 +425,10 @@ int Aig_ManVerifyUsingBdds( Aig_Man_t * p, int nBddMax, int nIterMax, int fParti
Cudd_RecursiveDeref( dd, bInitial );
for ( i = 0; i < Saig_ManRegNum(p); i++ )
Cudd_RecursiveDeref( dd, pbParts[i] );
free( pbParts );
ABC_FREE( pbParts );
for ( i = 0; i < Saig_ManPoNum(p); i++ )
Cudd_RecursiveDeref( dd, pbOutputs[i] );
free( pbOutputs );
ABC_FREE( pbOutputs );
if ( RetValue == -1 )
Cudd_Quit( dd );
else
@ -437,7 +437,7 @@ int Aig_ManVerifyUsingBdds( Aig_Man_t * p, int nBddMax, int nIterMax, int fParti
// report the runtime
if ( !fSilent )
{
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
fflush( stdout );
}
return RetValue;

16
src/aig/bdc/bdc.h
View File

@ -20,10 +20,6 @@
#ifndef __BDC_H__
#define __BDC_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
@ -32,6 +28,10 @@ extern "C" {
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
@ -49,10 +49,10 @@ struct Bdc_Par_t_
};
// working with complemented attributes of objects
static inline int Bdc_IsComplement( Bdc_Fun_t * p ) { return (int)((PORT_PTRUINT_T)p & (PORT_PTRUINT_T)01); }
static inline Bdc_Fun_t * Bdc_Regular( Bdc_Fun_t * p ) { return (Bdc_Fun_t *)((PORT_PTRUINT_T)p & ~(PORT_PTRUINT_T)01); }
static inline Bdc_Fun_t * Bdc_Not( Bdc_Fun_t * p ) { return (Bdc_Fun_t *)((PORT_PTRUINT_T)p ^ (PORT_PTRUINT_T)01); }
static inline Bdc_Fun_t * Bdc_NotCond( Bdc_Fun_t * p, int c ) { return (Bdc_Fun_t *)((PORT_PTRUINT_T)p ^ (PORT_PTRUINT_T)(c!=0)); }
static inline int Bdc_IsComplement( Bdc_Fun_t * p ) { return (int)((ABC_PTRUINT_T)p & (ABC_PTRUINT_T)01); }
static inline Bdc_Fun_t * Bdc_Regular( Bdc_Fun_t * p ) { return (Bdc_Fun_t *)((ABC_PTRUINT_T)p & ~(ABC_PTRUINT_T)01); }
static inline Bdc_Fun_t * Bdc_Not( Bdc_Fun_t * p ) { return (Bdc_Fun_t *)((ABC_PTRUINT_T)p ^ (ABC_PTRUINT_T)01); }
static inline Bdc_Fun_t * Bdc_NotCond( Bdc_Fun_t * p, int c ) { return (Bdc_Fun_t *)((ABC_PTRUINT_T)p ^ (ABC_PTRUINT_T)(c!=0)); }
////////////////////////////////////////////////////////////////////////
/// MACRO DEFINITIONS ///

26
src/aig/bdc/bdcCore.c
View File

@ -62,7 +62,7 @@ void Bdc_FuncSetCopy( Bdc_Fun_t * p, void * pCopy ) { p->pCopy = pCop
Bdc_Man_t * Bdc_ManAlloc( Bdc_Par_t * pPars )
{
Bdc_Man_t * p;
p = ALLOC( Bdc_Man_t, 1 );
p = ABC_ALLOC( Bdc_Man_t, 1 );
memset( p, 0, sizeof(Bdc_Man_t) );
assert( pPars->nVarsMax > 1 && pPars->nVarsMax < 16 );
p->pPars = pPars;
@ -70,18 +70,18 @@ Bdc_Man_t * Bdc_ManAlloc( Bdc_Par_t * pPars )
p->nDivsLimit = 200;
// internal nodes
p->nNodesAlloc = 512;
p->pNodes = ALLOC( Bdc_Fun_t, p->nNodesAlloc );
p->pNodes = ABC_ALLOC( Bdc_Fun_t, p->nNodesAlloc );
// memory
p->vMemory = Vec_IntStart( 8 * p->nWords * p->nNodesAlloc );
Vec_IntClear(p->vMemory);
// set up hash table
p->nTableSize = (1 << p->pPars->nVarsMax);
p->pTable = ALLOC( Bdc_Fun_t *, p->nTableSize );
p->pTable = ABC_ALLOC( Bdc_Fun_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Bdc_Fun_t *) * p->nTableSize );
p->vSpots = Vec_IntAlloc( 256 );
// truth tables
p->vTruths = Vec_PtrAllocTruthTables( p->pPars->nVarsMax );
p->puTemp1 = ALLOC( unsigned, 4 * p->nWords );
p->puTemp1 = ABC_ALLOC( unsigned, 4 * p->nWords );
p->puTemp2 = p->puTemp1 + p->nWords;
p->puTemp3 = p->puTemp2 + p->nWords;
p->puTemp4 = p->puTemp3 + p->nWords;
@ -112,19 +112,19 @@ void Bdc_ManFree( Bdc_Man_t * p )
p->numCalls, p->numNodes, p->numReuse );
printf( "ANDs = %d. ORs = %d. Weak = %d. Muxes = %d. Memory = %.2f K\n",
p->numAnds, p->numOrs, p->numWeaks, p->numMuxes, 4.0 * Vec_IntSize(p->vMemory) / (1<<10) );
PRT( "Cache", p->timeCache );
PRT( "Check", p->timeCheck );
PRT( "Muxes", p->timeMuxes );
PRT( "Supps", p->timeSupps );
PRT( "TOTAL", p->timeTotal );
ABC_PRT( "Cache", p->timeCache );
ABC_PRT( "Check", p->timeCheck );
ABC_PRT( "Muxes", p->timeMuxes );
ABC_PRT( "Supps", p->timeSupps );
ABC_PRT( "TOTAL", p->timeTotal );
}
Vec_IntFree( p->vMemory );
Vec_IntFree( p->vSpots );
Vec_PtrFree( p->vTruths );
free( p->puTemp1 );
free( p->pNodes );
free( p->pTable );
free( p );
ABC_FREE( p->puTemp1 );
ABC_FREE( p->pNodes );
ABC_FREE( p->pTable );
ABC_FREE( p );
}
/**Function*************************************************************

8
src/aig/bdc/bdcInt.h
View File

@ -21,10 +21,6 @@
#ifndef __BDC_INT_H__
#define __BDC_INT_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@ -36,6 +32,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
#define BDC_SCALE 1000 // value used to compute the cost
////////////////////////////////////////////////////////////////////////

48
src/aig/cec/cec.c Normal file
View File

@ -0,0 +1,48 @@
/**CFile****************************************************************
FileName [cec.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis []
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cec.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cecInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

22
src/aig/cec/cec.h
View File

@ -21,10 +21,6 @@
#ifndef __CEC_H__
#define __CEC_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@ -33,6 +29,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
@ -44,8 +44,8 @@ struct Cec_ParSat_t_
int nBTLimit; // conflict limit at a node
int nSatVarMax; // the max number of SAT variables
int nCallsRecycle; // calls to perform before recycling SAT solver
int fPolarFlip; // flops polarity of variables
int fFirstStop; // stop on the first sat output
int fPolarFlip; // uses polarity adjustment
int fVerbose; // verbose stats
};
@ -55,8 +55,15 @@ struct Cec_ParCsw_t_
{
int nWords; // the number of simulation words
int nRounds; // the number of simulation rounds
int nBTlimit; // conflict limit at a node
int nItersMax; // the maximum number of iterations of SAT sweeping
int nBTLimit; // conflict limit at a node
int nSatVarMax; // the max number of SAT variables
int nCallsRecycle; // calls to perform before recycling SAT solver
int nLevelMax; // restriction on the level nodes to be swept
int nDepthMax; // the depth in terms of steps of speculative reduction
int fRewriting; // enables AIG rewriting
int fFirstStop; // stop on the first sat output
int fVeryVerbose; // verbose stats
int fVerbose; // verbose stats
};
@ -86,7 +93,8 @@ struct Cec_ParCec_t_
extern void Cec_ManSatSetDefaultParams( Cec_ParSat_t * p );
extern void Cec_ManCswSetDefaultParams( Cec_ParCsw_t * p );
extern void Cec_ManCecSetDefaultParams( Cec_ParCec_t * p );
extern int Cec_Solve( Aig_Man_t * pAig0, Aig_Man_t * pAig1, Cec_ParCec_t * p );
extern Gia_Man_t * Cec_ManSatSweeping( Gia_Man_t * pAig, Cec_ParCsw_t * pPars );
extern Gia_Man_t * Cec_ManSatSolving( Gia_Man_t * pAig, Cec_ParSat_t * pPars );
#ifdef __cplusplus
}

905
src/aig/cec/cecClass.c
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File diff suppressed because it is too large Load Diff

272
src/aig/cec/cecCore.c
View File

@ -37,20 +37,20 @@
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSatSetDefaultParams( Cec_ParSat_t * p )
{
memset( p, 0, sizeof(Cec_ParSat_t) );
p->nBTLimit = 100; // conflict limit at a node
p->nSatVarMax = 2000; // the max number of SAT variables
p->nCallsRecycle = 10; // calls to perform before recycling SAT solver
p->fFirstStop = 0; // stop on the first sat output
p->fPolarFlip = 0; // uses polarity adjustment
p->fVerbose = 0; // verbose stats
}
/**Function*************************************************************
p->nBTLimit = 10; // conflict limit at a node
p->nSatVarMax = 2000; // the max number of SAT variables
p->nCallsRecycle = 100; // calls to perform before recycling SAT solver
p->fPolarFlip = 1; // flops polarity of variables
p->fFirstStop = 0; // stop on the first sat output
p->fVerbose = 1; // verbose stats
}
/**Function************ *************************************************
Synopsis [This procedure sets default parameters.]
@ -64,12 +64,19 @@ void Cec_ManSatSetDefaultParams( Cec_ParSat_t * p )
void Cec_ManCswSetDefaultParams( Cec_ParCsw_t * p )
{
memset( p, 0, sizeof(Cec_ParCsw_t) );
p->nWords = 15; // the number of simulation words
p->nRounds = 10; // the number of simulation rounds
p->nBTlimit = 10; // conflict limit at a node
p->fRewriting = 0; // enables AIG rewriting
p->fVerbose = 1; // verbose stats
}
p->nWords = 20; // the number of simulation words
p->nRounds = 20; // the number of simulation rounds
p->nItersMax = 20; // the maximum number of iterations of SAT sweeping
p->nBTLimit = 10000; // conflict limit at a node
p->nSatVarMax = 2000; // the max number of SAT variables
p->nCallsRecycle = 100; // calls to perform before recycling SAT solver
p->nLevelMax = 0; // restriction on the level of nodes to be swept
p->nDepthMax = 1; // the depth in terms of steps of speculative reduction
p->fRewriting = 0; // enables AIG rewriting
p->fFirstStop = 0; // stop on the first sat output
p->fVeryVerbose = 0; // verbose stats
p->fVerbose = 0; // verbose stats
}
/**Function*************************************************************
@ -85,20 +92,19 @@ void Cec_ManCswSetDefaultParams( Cec_ParCsw_t * p )
void Cec_ManCecSetDefaultParams( Cec_ParCec_t * p )
{
memset( p, 0, sizeof(Cec_ParCec_t) );
p->nIters = 5; // iterations of SAT solving/sweeping
p->nBTLimitBeg = 2; // starting backtrack limit
p->nBTlimitMulti = 8; // multiple of backtrack limiter
p->fUseSmartCnf = 0; // use smart CNF computation
p->fRewriting = 0; // enables AIG rewriting
p->fSatSweeping = 0; // enables SAT sweeping
p->fFirstStop = 0; // stop on the first sat output
p->fVerbose = 1; // verbose stats
}
p->nIters = 1; // iterations of SAT solving/sweeping
p->nBTLimitBeg = 2; // starting backtrack limit
p->nBTlimitMulti = 8; // multiple of backtrack limiter
p->fUseSmartCnf = 0; // use smart CNF computation
p->fRewriting = 0; // enables AIG rewriting
p->fSatSweeping = 0; // enables SAT sweeping
p->fFirstStop = 0; // stop on the first sat output
p->fVerbose = 1; // verbose stats
}
/**Function*************************************************************
Synopsis [Performs equivalence checking.]
Synopsis [Core procedure for SAT sweeping.]
Description []
@ -107,123 +113,117 @@ void Cec_ManCecSetDefaultParams( Cec_ParCec_t * p )
SeeAlso []
***********************************************************************/
int Cec_Sweep( Aig_Man_t * pAig, int nBTLimit )
Gia_Man_t * Cec_ManSatSolving( Gia_Man_t * pAig, Cec_ParSat_t * pPars )
{
Gia_Man_t * pNew;
Cec_ManPat_t * pPat;
pPat = Cec_ManPatStart();
Cec_ManSatSolve( pPat, pAig, pPars );
pNew = Gia_ManDupDfsSkip( pAig );
Cec_ManPatStop( pPat );
return pNew;
}
/**Function*************************************************************
Synopsis [Core procedure for SAT sweeping.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Cec_ManSatSweeping( Gia_Man_t * pAig, Cec_ParCsw_t * pPars )
{
Cec_MtrStatus_t Status;
Cec_ParCsw_t ParsCsw, * pParsCsw = &ParsCsw;
Cec_ParSat_t ParsSat, * pParsSat = &ParsSat;
Caig_Man_t * pCaig;
Aig_Man_t * pSRAig;
int clk;
Cec_ManCswSetDefaultParams( pParsCsw );
pParsCsw->nBTlimit = nBTLimit;
pCaig = Caig_ManClassesPrepare( pAig, pParsCsw->nWords, pParsCsw->nRounds );
pSRAig = Caig_ManSpecReduce( pCaig );
Aig_ManPrintStats( pSRAig );
Cec_ManSatSetDefaultParams( pParsSat );
pParsSat->fFirstStop = 0;
pParsSat->nBTLimit = pParsCsw->nBTlimit;
Gia_Man_t * pNew;
Cec_ManCsw_t * p;
Cec_ManPat_t * pPat;
int i, RetValue, clk, clk2, clkTotal = clock();
Aig_ManRandom( 1 );
Gia_ManSetPhase( pAig );
Gia_ManCleanMark0( pAig );
Gia_ManCleanMark1( pAig );
p = Cec_ManCswStart( pAig, pPars );
clk = clock();
Status = Cec_SatSolveOutputs( pSRAig, pParsSat );
Cec_MiterStatusPrint( Status, "SRM ", clock() - clk );
Aig_ManStop( pSRAig );
Caig_ManDelete( pCaig );
return 1;
}
/**Function*************************************************************
Synopsis [Performs equivalence checking.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_Solve( Aig_Man_t * pAig0, Aig_Man_t * pAig1, Cec_ParCec_t * pPars )
{
Cec_ParSat_t ParsSat, * pParsSat = &ParsSat;
Cec_MtrStatus_t Status;
Aig_Man_t * pMiter;
int i, clk = clock();
if ( pPars->fVerbose )
{
Status = Cec_MiterStatusTrivial( pAig0 );
Status.nNodes += pAig1? Aig_ManNodeNum( pAig1 ) : 0;
Cec_MiterStatusPrint( Status, "Init ", 0 );
}
// create combinational miter
if ( pAig1 == NULL )
{
Status = Cec_MiterStatus( pAig0 );
if ( Status.nSat > 0 && pPars->fFirstStop )
{
if ( pPars->fVerbose )
printf( "Output %d is trivially SAT.\n", Status.iOut );
return 0;
}
if ( Status.nUndec == 0 )
{
if ( pPars->fVerbose )
printf( "The miter has no undecided outputs.\n" );
return 1;
}
pMiter = Cec_Duplicate( pAig0 );
}
else
{
pMiter = Cec_DeriveMiter( pAig0, pAig1 );
Status = Cec_MiterStatus( pMiter );
if ( Status.nSat > 0 && pPars->fFirstStop )
{
if ( pPars->fVerbose )
printf( "Output %d is trivially SAT.\n", Status.iOut );
Aig_ManStop( pMiter );
return 0;
}
if ( Status.nUndec == 0 )
{
if ( pPars->fVerbose )
printf( "The problem is solved by structrual hashing.\n" );
Aig_ManStop( pMiter );
return 1;
}
}
if ( pPars->fVerbose )
Cec_MiterStatusPrint( Status, "Strash", clock() - clk );
// start parameter structures
RetValue = Cec_ManCswClassesPrepare( p );
p->timeSim += clock() - clk;
Cec_ManSatSetDefaultParams( pParsSat );
pParsSat->fFirstStop = pPars->fFirstStop;
pParsSat->nBTLimit = pPars->nBTLimitBeg;
for ( i = 0; i < pPars->nIters; i++ )
pParsSat->nBTLimit = pPars->nBTLimit;
pParsSat->fVerbose = pPars->fVeryVerbose;
pPat = Cec_ManPatStart();
pPat->fVerbose = pPars->fVeryVerbose;
for ( i = 1; i <= pPars->nItersMax; i++ )
{
// try SAT solving
clk = clock();
pParsSat->nBTLimit *= pPars->nBTlimitMulti;
Status = Cec_SatSolveOutputs( pMiter, pParsSat );
if ( pPars->fVerbose )
Cec_MiterStatusPrint( Status, "SAT ", clock() - clk );
if ( Status.nSat && pParsSat->fFirstStop )
clk2 = clock();
pNew = Cec_ManCswSpecReduction( p );
if ( pPars->fVeryVerbose )
{
Gia_ManPrintStats( p->pAig );
Gia_ManPrintStats( pNew );
}
if ( Gia_ManCoNum(pNew) == 0 )
{
Gia_ManStop( pNew );
break;
if ( Status.nUndec == 0 )
}
clk = clock();
Cec_ManSatSolve( pPat, pNew, pParsSat );
p->timeSat += clock() - clk;
clk = clock();
Cec_ManCswClassesUpdate( p, pPat, pNew );
p->timeSim += clock() - clk;
Gia_ManStop( pNew );
pNew = Cec_ManCswDupWithClasses( p );
Gia_WriteAiger( pNew, "gia_temp_new.aig", 0, 1 );
if ( p->pPars->fVerbose )
{
printf( "%3d : P =%7d. D =%7d. F =%6d. Lit =%8d. And =%8d. ",
i, p->nAllProved, p->nAllDisproved, p->nAllFailed,
Cec_ManCswCountLitsAll(p), Gia_ManAndNum(pNew) );
ABC_PRT( "Time", clock() - clk2 );
}
if ( p->pPars->fVeryVerbose )
{
ABC_PRTP( "Sim ", p->timeSim, clock() - clkTotal );
ABC_PRTP( "Sat ", p->timeSat, clock() - clkTotal );
ABC_PRT( "Time", clock() - clkTotal );
printf( "****** Intermedate result %3d ******\n", i );
Gia_ManPrintStats( p->pAig );
Gia_ManPrintStats( pNew );
printf("The result is written into file \"%s\".\n", "gia_temp.aig" );
printf( "************************************\n" );
}
if ( Gia_ManAndNum(pNew) == 0 )
{
Gia_ManStop( pNew );
break;
// try rewriting
// try SAT sweeping
Cec_Sweep( pMiter, 10 );
i = i;
}
Gia_ManStop( pNew );
}
Aig_ManStop( pMiter );
return 1;
Gia_ManCleanMark0( pAig );
Gia_ManCleanMark1( pAig );
// verify the result
if ( p->pPars->fVerbose )
{
printf( "Verifying the result:\n" );
pNew = Cec_ManCswSpecReductionProved( p );
pParsSat->nBTLimit = 1000000;
pParsSat->fVerbose = 1;
Cec_ManSatSolve( NULL, pNew, pParsSat );
Gia_ManStop( pNew );
}
// create the resulting miter
pAig->pReprs = Cec_ManCswDeriveReprs( p );
pNew = Gia_ManDupDfsClasses( pAig );
Cec_ManCswStop( p );
Cec_ManPatStop( pPat );
return pNew;
}
////////////////////////////////////////////////////////////////////////

221
src/aig/cec/cecInt.h
View File

@ -21,34 +21,60 @@
#ifndef __CEC_INT_H__
#define __CEC_INT_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
#include "aig.h"
#include "satSolver.h"
#include "bar.h"
#include "gia.h"
#include "cec.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
// simulation pattern manager
typedef struct Cec_ManPat_t_ Cec_ManPat_t;
struct Cec_ManPat_t_
{
Vec_Int_t * vPattern1; // pattern in terms of primary inputs
Vec_Int_t * vPattern2; // pattern in terms of primary inputs
Vec_Str_t * vStorage; // storage for compressed patterns
int iStart; // position in the array where recent patterns begin
int nPats; // total number of recent patterns
int nPatsAll; // total number of all patterns
int nPatLits; // total number of literals in recent patterns
int nPatLitsAll; // total number of literals in all patterns
int nPatLitsMin; // total number of literals in minimized recent patterns
int nPatLitsMinAll; // total number of literals in minimized all patterns
int nSeries; // simulation series
int fVerbose; // verbose stats
// runtime statistics
int timeFind; // detecting the pattern
int timeShrink; // minimizing the pattern
int timeVerify; // verifying the result of minimisation
int timeSort; // sorting literals
int timePack; // packing into sim info structures
int timeTotal; // total runtime
};
// SAT solving manager
typedef struct Cec_ManSat_t_ Cec_ManSat_t;
struct Cec_ManSat_t_
{
// parameters
Cec_ParSat_t * pPars;
// AIGs used in the package
Aig_Man_t * pAig; // the AIG whose outputs are considered
Gia_Man_t * pAig; // the AIG whose outputs are considered
Vec_Int_t * vStatus; // status for each output
// SAT solving
sat_solver * pSat; // recyclable SAT solver
@ -62,6 +88,11 @@ struct Cec_ManSat_t_
int nSatUnsat; // the number of proofs
int nSatSat; // the number of failure
int nSatUndec; // the number of timeouts
int nSatTotal; // the number of calls
// conflicts
int nConfUnsat;
int nConfSat;
int nConfUndec;
// runtime stats
int timeSatUnsat; // unsat
int timeSatSat; // sat
@ -69,144 +100,82 @@ struct Cec_ManSat_t_
int timeTotal; // total runtime
};
typedef struct Cec_ManCla_t_ Cec_ManCla_t;
// combinational sweeping object
typedef struct Cec_ObjCsw_t_ Cec_ObjCsw_t;
struct Cec_ObjCsw_t_
{
int iRepr; // representative node
unsigned iNext : 30; // next node in the class
unsigned iProved : 1; // this node is proved
unsigned iFailed : 1; // this node is failed
unsigned SimNum; // simulation info number
};
// combinational simulation manager
typedef struct Cec_ManCsw_t_ Cec_ManCsw_t;
struct Cec_ManCsw_t_
{
// parameters
Cec_ParCsw_t * pPars;
// AIGs used in the package
Aig_Man_t * pAig; // the AIG for SAT sweeping
Aig_Man_t * pFraig; // the AIG after SAT sweeping
Gia_Man_t * pAig; // the AIG to be used for simulation
Cec_ParCsw_t * pPars; // SAT sweeping parameters
int nWords; // the number of simulation words
// equivalence classes
Cec_ManCla_t * ppClasses; // equivalence classes of nodes
// choice node statistics
int nLits; // the number of lits in the cand equiv classes
int nReprs; // the number of proved equivalent pairs
int nEquivs; // the number of final equivalences
int nChoices; // the number of final choice nodes
};
typedef struct Cec_ManCec_t_ Cec_ManCec_t;
struct Cec_ManCec_t_
{
// parameters
Cec_ParCec_t * pPars;
// AIGs used in the package
Aig_Man_t * pAig; // the miter for equivalence checking
// mapping of PI/PO nodes
// counter-example
int * pCex; // counter-example
int iOutput; // the output for this counter-example
// statistics
};
typedef struct Cec_MtrStatus_t_ Cec_MtrStatus_t;
struct Cec_MtrStatus_t_
{
int nInputs; // the total number of inputs
int nNodes; // the total number of nodes
int nOutputs; // the total number of outputs
int nUnsat; // the number of UNSAT outputs
int nSat; // the number of SAT outputs
int nUndec; // the number of undecided outputs
int iOut; // the satisfied output
};
// combinational simulation manager
typedef struct Caig_Man_t_ Caig_Man_t;
struct Caig_Man_t_
{
// parameters
Aig_Man_t * pAig; // the AIG to be used for simulation
int nWords; // the number of words to simulate
// AIG representation
int nPis; // the number of primary inputs
int nPos; // the number of primary outputs
int nNodes; // the number of internal nodes
int nObjs; // nPis + nNodes + nPos + 1
int * pFans0; // fanin0 for all objects
int * pFans1; // fanin1 for all objects
// simulation info
unsigned short* pRefs; // reference counter for each node
unsigned * pSims; // simlulation information for each node
Cec_ObjCsw_t * pObjs; // objects used for SAT sweeping
// recycable memory
unsigned * pMems; // allocated simulaton memory
int nWordsAlloc; // the number of allocated entries
int nMems; // the number of used entries
int nMemsMax; // the max number of used entries
int MemFree; // next free entry
// equivalence class representation
int * pReprs; // representatives of each node
int * pNexts; // nexts for each node
unsigned * pMems; // allocated simulaton memory
int nWordsAlloc; // the number of allocated entries
int nMems; // the number of used entries
int nMemsMax; // the max number of used entries
int MemFree; // next free entry
// temporaries
Vec_Ptr_t * vSims; // pointers to sim info
Vec_Int_t * vClassOld; // old class numbers
Vec_Int_t * vClassNew; // new class numbers
Vec_Int_t * vClassOld; // old class numbers
Vec_Int_t * vClassNew; // new class numbers
Vec_Int_t * vClassTemp; // temporary storage
Vec_Int_t * vRefinedC; // refined const reprs
// simulation patterns
Vec_Int_t * vXorNodes; // nodes used in speculative reduction
int nAllProved; // total number of proved nodes
int nAllDisproved; // total number of disproved nodes
int nAllFailed; // total number of failed nodes
// runtime stats
int timeSim; // unsat
int timeSat; // sat
int timeTotal; // total runtime
};
////////////////////////////////////////////////////////////////////////
/// MACRO DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
static inline int Cec_Var2Lit( int Var, int fCompl ) { return Var + Var + fCompl; }
static inline int Cec_Lit2Var( int Lit ) { return Lit >> 1; }
static inline int Cec_LitIsCompl( int Lit ) { return Lit & 1; }
static inline int Cec_LitNot( int Lit ) { return Lit ^ 1; }
static inline int Cec_LitNotCond( int Lit, int c ) { return Lit ^ (int)(c > 0); }
static inline int Cec_LitRegular( int Lit ) { return Lit & ~01; }
static inline int Cec_ObjSatNum( Cec_ManSat_t * p, Aig_Obj_t * pObj ) { return p->pSatVars[pObj->Id]; }
static inline void Cec_ObjSetSatNum( Cec_ManSat_t * p, Aig_Obj_t * pObj, int Num ) { p->pSatVars[pObj->Id] = Num; }
static inline Aig_Obj_t * Cec_ObjFraig( Aig_Obj_t * pObj ) { return pObj->pData; }
static inline void Cec_ObjSetFraig( Aig_Obj_t * pObj, Aig_Obj_t * pNode ) { pObj->pData = pNode; }
static inline int Cec_ObjIsConst1Cand( Aig_Man_t * pAig, Aig_Obj_t * pObj )
{
return Aig_ObjRepr(pAig, pObj) == Aig_ManConst1(pAig);
}
static inline void Cec_ObjSetConst1Cand( Aig_Man_t * pAig, Aig_Obj_t * pObj )
{
assert( !Cec_ObjIsConst1Cand( pAig, pObj ) );
Aig_ObjSetRepr( pAig, pObj, Aig_ManConst1(pAig) );
}
////////////////////////////////////////////////////////////////////////
/// FUNCTION DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
/*=== cecAig.c ==========================================================*/
extern Aig_Man_t * Cec_Duplicate( Aig_Man_t * p );
extern Aig_Man_t * Cec_DeriveMiter( Aig_Man_t * p0, Aig_Man_t * p1 );
/*=== cecClass.c ==========================================================*/
extern Aig_Man_t * Caig_ManSpecReduce( Caig_Man_t * p );
extern int Caig_ManCompareEqual( unsigned * p0, unsigned * p1, int nWords );
extern int Caig_ManCompareConst( unsigned * p, int nWords );
extern void Caig_ManProcessClass( Caig_Man_t * p, int i );
extern void Caig_ManProcessRefined( Caig_Man_t * p, Vec_Int_t * vRefined );
extern Caig_Man_t * Caig_ManClassesPrepare( Aig_Man_t * pAig, int nWords, int nIters );
/*=== cecCnf.c ==========================================================*/
extern void Cec_CnfNodeAddToSolver( Cec_ManSat_t * p, Aig_Obj_t * pObj );
/*=== cecSat.c ==========================================================*/
extern Cec_MtrStatus_t Cec_SatSolveOutputs( Aig_Man_t * pAig, Cec_ParSat_t * pPars );
/*=== cecSim.c ==========================================================*/
extern Caig_Man_t * Caig_ManCreate( Aig_Man_t * pAig );
extern void Caig_ManDelete( Caig_Man_t * p );
extern unsigned * Caig_ManSimRead( Caig_Man_t * p, int i );
extern unsigned * Caig_ManSimRef( Caig_Man_t * p, int i );
extern unsigned * Caig_ManSimDeref( Caig_Man_t * p, int i );
extern int Caig_ManSimulateRound( Caig_Man_t * p, int fMiter );
extern int Cec_ManSimulate( Aig_Man_t * pAig, int nWords, int nIters, int TimeLimit, int fMiter, int fVerbose );
/*=== cecStatus.c ==========================================================*/
extern int Cec_OutputStatus( Aig_Man_t * p, Aig_Obj_t * pObj );
extern Cec_MtrStatus_t Cec_MiterStatus( Aig_Man_t * p );
extern Cec_MtrStatus_t Cec_MiterStatusTrivial( Aig_Man_t * p );
extern void Cec_MiterStatusPrint( Cec_MtrStatus_t S, char * pString, int Time );
/*=== cecCore.c ============================================================*/
/*=== cecClass.c ============================================================*/
extern int Cec_ManCswCountLitsAll( Cec_ManCsw_t * p );
extern int * Cec_ManCswDeriveReprs( Cec_ManCsw_t * p );
extern Gia_Man_t * Cec_ManCswSpecReduction( Cec_ManCsw_t * p );
extern Gia_Man_t * Cec_ManCswSpecReductionProved( Cec_ManCsw_t * p );
extern Gia_Man_t * Cec_ManCswDupWithClasses( Cec_ManCsw_t * p );
extern int Cec_ManCswClassesPrepare( Cec_ManCsw_t * p );
extern int Cec_ManCswClassesUpdate( Cec_ManCsw_t * p, Cec_ManPat_t * pPat, Gia_Man_t * pNew );
/*=== cecMan.c ============================================================*/
extern Cec_ManCsw_t * Cec_ManCswStart( Gia_Man_t * pAig, Cec_ParCsw_t * pPars );
extern void Cec_ManCswStop( Cec_ManCsw_t * p );
extern Cec_ManPat_t * Cec_ManPatStart();
extern void Cec_ManPatPrintStats( Cec_ManPat_t * p );
extern void Cec_ManPatStop( Cec_ManPat_t * p );
extern Cec_ManSat_t * Cec_ManSatCreate( Gia_Man_t * pAig, Cec_ParSat_t * pPars );
extern void Cec_ManSatPrintStats( Cec_ManSat_t * p );
extern void Cec_ManSatStop( Cec_ManSat_t * p );
/*=== cecPat.c ============================================================*/
extern void Cec_ManPatSavePattern( Cec_ManPat_t * pPat, Cec_ManSat_t * p, Gia_Obj_t * pObj );
extern Vec_Ptr_t * Cec_ManPatCollectPatterns( Cec_ManPat_t * pMan, int nInputs, int nWords );
/*=== cecSolve.c ============================================================*/
extern int Cec_ObjSatVarValue( Cec_ManSat_t * p, Gia_Obj_t * pObj );
extern void Cec_ManSatSolve( Cec_ManPat_t * pPat, Gia_Man_t * pAig, Cec_ParSat_t * pPars );
/*=== cecUtil.c ============================================================*/
#ifdef __cplusplus
}

175
src/aig/cec/cecMan.c
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@ -30,7 +30,7 @@
/**Function*************************************************************
Synopsis []
Synopsis [Creates AIG.]
Description []
@ -39,10 +39,26 @@
SeeAlso []
***********************************************************************/
Cec_ManCsw_t * Cec_ManCswStart( Gia_Man_t * pAig, Cec_ParCsw_t * pPars )
{
Cec_ManCsw_t * p;
p = ABC_ALLOC( Cec_ManCsw_t, 1 );
memset( p, 0, sizeof(Cec_ManCsw_t) );
p->pAig = pAig;
p->pPars = pPars;
p->pObjs = ABC_CALLOC( Cec_ObjCsw_t, Gia_ManObjNum(pAig) );
// temporaries
p->vClassOld = Vec_IntAlloc( 1000 );
p->vClassNew = Vec_IntAlloc( 1000 );
p->vClassTemp = Vec_IntAlloc( 1000 );
p->vRefinedC = Vec_IntAlloc( 10000 );
p->vXorNodes = Vec_IntAlloc( 1000 );
return p;
}
/**Function*************************************************************
Synopsis []
Synopsis [Deletes AIG.]
Description []
@ -51,6 +67,161 @@
SeeAlso []
***********************************************************************/
void Cec_ManCswStop( Cec_ManCsw_t * p )
{
Vec_IntFree( p->vXorNodes );
Vec_IntFree( p->vClassOld );
Vec_IntFree( p->vClassNew );
Vec_IntFree( p->vClassTemp );
Vec_IntFree( p->vRefinedC );
ABC_FREE( p->pMems );
ABC_FREE( p->pObjs );
ABC_FREE( p );
}
/**Function*************************************************************
Synopsis [Creates AIG.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Cec_ManPat_t * Cec_ManPatStart()
{
Cec_ManPat_t * p;
p = ABC_CALLOC( Cec_ManPat_t, 1 );
p->vStorage = Vec_StrAlloc( 1<<20 );
p->vPattern1 = Vec_IntAlloc( 1000 );
p->vPattern2 = Vec_IntAlloc( 1000 );
return p;
}
/**Function*************************************************************
Synopsis [Creates AIG.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManPatPrintStats( Cec_ManPat_t * p )
{
printf( "Latest: P = %8d. L = %10d. Lm = %10d. Ave = %6.1f. MEM =%6.2f Mb\n",
p->nPats, p->nPatLits, p->nPatLitsMin, 1.0 * p->nPatLitsMin/p->nPats,
1.0*(Vec_StrSize(p->vStorage)-p->iStart)/(1<<20) );
printf( "Total: P = %8d. L = %10d. Lm = %10d. Ave = %6.1f. MEM =%6.2f Mb\n",
p->nPatsAll, p->nPatLitsAll, p->nPatLitsMinAll, 1.0 * p->nPatLitsMinAll/p->nPatsAll,
1.0*Vec_StrSize(p->vStorage)/(1<<20) );
ABC_PRTP( "Finding ", p->timeFind, p->timeTotal );
ABC_PRTP( "Shrinking", p->timeShrink, p->timeTotal );
ABC_PRTP( "Verifying", p->timeVerify, p->timeTotal );
ABC_PRTP( "Sorting ", p->timeSort, p->timeTotal );
ABC_PRTP( "Packing ", p->timePack, p->timeTotal );
ABC_PRT( "TOTAL ", p->timeTotal );
}
/**Function*************************************************************
Synopsis [Deletes AIG.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManPatStop( Cec_ManPat_t * p )
{
Vec_StrFree( p->vStorage );
Vec_IntFree( p->vPattern1 );
Vec_IntFree( p->vPattern2 );
ABC_FREE( p );
}
/**Function*************************************************************
Synopsis [Creates the manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Cec_ManSat_t * Cec_ManSatCreate( Gia_Man_t * pAig, Cec_ParSat_t * pPars )
{
Cec_ManSat_t * p;
// create interpolation manager
p = ABC_ALLOC( Cec_ManSat_t, 1 );
memset( p, 0, sizeof(Cec_ManSat_t) );
p->pPars = pPars;
p->pAig = pAig;
// SAT solving
p->nSatVars = 1;
p->pSatVars = ABC_CALLOC( int, Gia_ManObjNum(pAig) );
p->vUsedNodes = Vec_PtrAlloc( 1000 );
p->vFanins = Vec_PtrAlloc( 100 );
return p;
}
/**Function*************************************************************
Synopsis [Prints statistics of the manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSatPrintStats( Cec_ManSat_t * p )
{
printf( "CO = %6d ", Gia_ManCoNum(p->pAig) );
printf( "Conf = %5d ", p->pPars->nBTLimit );
printf( "MinVar = %5d ", p->pPars->nSatVarMax );
printf( "MinCalls = %5d\n", p->pPars->nCallsRecycle );
printf( "Unsat calls %6d (%6.2f %%) Ave conf = %8.1f ",
p->nSatUnsat, 100.0*p->nSatUnsat/p->nSatTotal, p->nSatUnsat? 1.0*p->nConfUnsat/p->nSatUnsat :0.0 );
ABC_PRTP( "Time", p->timeSatUnsat, p->timeTotal );
printf( "Sat calls %6d (%6.2f %%) Ave conf = %8.1f ",
p->nSatSat, 100.0*p->nSatSat/p->nSatTotal, p->nSatSat? 1.0*p->nConfSat/p->nSatSat : 0.0 );
ABC_PRTP( "Time", p->timeSatSat, p->timeTotal );
printf( "Undef calls %6d (%6.2f %%) Ave conf = %8.1f ",
p->nSatUndec, 100.0*p->nSatUndec/p->nSatTotal, p->nSatUndec? 1.0*p->nConfUndec/p->nSatUndec : 0.0 );
ABC_PRTP( "Time", p->timeSatUndec, p->timeTotal );
}
/**Function*************************************************************
Synopsis [Frees the manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSatStop( Cec_ManSat_t * p )
{
if ( p->pSat )
sat_solver_delete( p->pSat );
Vec_PtrFree( p->vUsedNodes );
Vec_PtrFree( p->vFanins );
ABC_FREE( p->pSatVars );
ABC_FREE( p );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///

493
src/aig/cec/cecPat.c Normal file
View File

@ -0,0 +1,493 @@
/**CFile****************************************************************
FileName [cec.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis []
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cec.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cecInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static inline void Cec_ManPatStoreNum( Cec_ManPat_t * p, int Num )
{
unsigned x = (unsigned)Num;
assert( Num >= 0 );
while ( x & ~0x7f )
{
Vec_StrPush( p->vStorage, (char)((x & 0x7f) | 0x80) );
x >>= 7;
}
Vec_StrPush( p->vStorage, (char)x );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static inline int Cec_ManPatRestoreNum( Cec_ManPat_t * p )
{
int ch, i, x = 0;
for ( i = 0; (ch = Vec_StrEntry(p->vStorage, p->iStart++)) & 0x80; i++ )
x |= (ch & 0x7f) << (7 * i);
return x | (ch << (7 * i));
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static inline void Cec_ManPatStore( Cec_ManPat_t * p, Vec_Int_t * vPat )
{
int i, Number, NumberPrev;
assert( Vec_IntSize(vPat) > 0 );
Cec_ManPatStoreNum( p, Vec_IntSize(vPat) );
NumberPrev = Vec_IntEntry( vPat, 0 );
Cec_ManPatStoreNum( p, NumberPrev );
Vec_IntForEachEntryStart( vPat, Number, i, 1 )
{
assert( NumberPrev < Number );
Cec_ManPatStoreNum( p, Number - NumberPrev );
NumberPrev = Number;
}
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static inline void Cec_ManPatRestore( Cec_ManPat_t * p, Vec_Int_t * vPat )
{
int i, Size, Number;
Vec_IntClear( vPat );
Size = Cec_ManPatRestoreNum( p );
Number = Cec_ManPatRestoreNum( p );
Vec_IntPush( vPat, Number );
for ( i = 1; i < Size; i++ )
{
Number += Cec_ManPatRestoreNum( p );
Vec_IntPush( vPat, Number );
}
assert( Vec_IntSize(vPat) == Size );
}
/**Function*************************************************************
Synopsis [Derives satisfying assignment.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ManPatComputePattern_rec( Cec_ManSat_t * pSat, Gia_Man_t * p, Gia_Obj_t * pObj )
{
int Counter = 0;
if ( Gia_ObjIsTravIdCurrent(p, pObj) )
return 0;
Gia_ObjSetTravIdCurrent(p, pObj);
if ( Gia_ObjIsCi(pObj) )
{
pObj->fMark1 = Cec_ObjSatVarValue( pSat, pObj );
return 1;
}
assert( Gia_ObjIsAnd(pObj) );
Counter += Cec_ManPatComputePattern_rec( pSat, p, Gia_ObjFanin0(pObj) );
Counter += Cec_ManPatComputePattern_rec( pSat, p, Gia_ObjFanin1(pObj) );
pObj->fMark1 = (Gia_ObjFanin0(pObj)->fMark1 ^ Gia_ObjFaninC0(pObj)) &
(Gia_ObjFanin1(pObj)->fMark1 ^ Gia_ObjFaninC1(pObj));
return Counter;
}
/**Function*************************************************************
Synopsis [Derives satisfying assignment.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManPatComputePattern1_rec( Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Int_t * vPat )
{
if ( Gia_ObjIsTravIdCurrent(p, pObj) )
return;
Gia_ObjSetTravIdCurrent(p, pObj);
if ( Gia_ObjIsCi(pObj) )
{
Vec_IntPush( vPat, Gia_Var2Lit( Gia_ObjCioId(pObj), pObj->fMark1==0 ) );
return;
}
assert( Gia_ObjIsAnd(pObj) );
if ( pObj->fMark1 == 1 )
{
Cec_ManPatComputePattern1_rec( p, Gia_ObjFanin0(pObj), vPat );
Cec_ManPatComputePattern1_rec( p, Gia_ObjFanin1(pObj), vPat );
}
else
{
assert( (Gia_ObjFanin0(pObj)->fMark1 ^ Gia_ObjFaninC0(pObj)) == 0 ||
(Gia_ObjFanin1(pObj)->fMark1 ^ Gia_ObjFaninC1(pObj)) == 0 );
if ( (Gia_ObjFanin0(pObj)->fMark1 ^ Gia_ObjFaninC0(pObj)) == 0 )
Cec_ManPatComputePattern1_rec( p, Gia_ObjFanin0(pObj), vPat );
else
Cec_ManPatComputePattern1_rec( p, Gia_ObjFanin1(pObj), vPat );
}
}
/**Function*************************************************************
Synopsis [Derives satisfying assignment.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManPatComputePattern2_rec( Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Int_t * vPat )
{
if ( Gia_ObjIsTravIdCurrent(p, pObj) )
return;
Gia_ObjSetTravIdCurrent(p, pObj);
if ( Gia_ObjIsCi(pObj) )
{
Vec_IntPush( vPat, Gia_Var2Lit( Gia_ObjCioId(pObj), pObj->fMark1==0 ) );
return;
}
assert( Gia_ObjIsAnd(pObj) );
if ( pObj->fMark1 == 1 )
{
Cec_ManPatComputePattern2_rec( p, Gia_ObjFanin0(pObj), vPat );
Cec_ManPatComputePattern2_rec( p, Gia_ObjFanin1(pObj), vPat );
}
else
{
assert( (Gia_ObjFanin0(pObj)->fMark1 ^ Gia_ObjFaninC0(pObj)) == 0 ||
(Gia_ObjFanin1(pObj)->fMark1 ^ Gia_ObjFaninC1(pObj)) == 0 );
if ( (Gia_ObjFanin1(pObj)->fMark1 ^ Gia_ObjFaninC1(pObj)) == 0 )
Cec_ManPatComputePattern2_rec( p, Gia_ObjFanin1(pObj), vPat );
else
Cec_ManPatComputePattern2_rec( p, Gia_ObjFanin0(pObj), vPat );
}
}
/**Function*************************************************************
Synopsis [Derives satisfying assignment.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ManPatComputePattern3_rec( Gia_Man_t * p, Gia_Obj_t * pObj )
{
int Value0, Value1, Value;
if ( Gia_ObjIsTravIdCurrent(p, pObj) )
return (pObj->fMark1 << 1) | pObj->fMark0;
Gia_ObjSetTravIdCurrent(p, pObj);
if ( Gia_ObjIsCi(pObj) )
{
pObj->fMark0 = 1;
pObj->fMark1 = 1;
return GIA_UND;
}
assert( Gia_ObjIsAnd(pObj) );
Value0 = Cec_ManPatComputePattern3_rec( p, Gia_ObjFanin0(pObj) );
Value1 = Cec_ManPatComputePattern3_rec( p, Gia_ObjFanin1(pObj) );
Value = Gia_XsimAndCond( Value0, Gia_ObjFaninC0(pObj), Value1, Gia_ObjFaninC1(pObj) );
pObj->fMark0 = (Value & 1);
pObj->fMark1 = ((Value >> 1) & 1);
return Value;
}
/**Function*************************************************************
Synopsis [Derives satisfying assignment.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManPatVerifyPattern( Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Int_t * vPat )
{
Gia_Obj_t * pTemp;
int i, Value;
Gia_ManIncrementTravId( p );
Vec_IntForEachEntry( vPat, Value, i )
{
pTemp = Gia_ManCi( p, Gia_Lit2Var(Value) );
// assert( Gia_LitIsCompl(Value) != (int)pTemp->fMark1 );
if ( pTemp->fMark1 )
{
pTemp->fMark0 = 0;
pTemp->fMark1 = 1;
}
else
{
pTemp->fMark0 = 1;
pTemp->fMark1 = 0;
}
Gia_ObjSetTravIdCurrent( p, pTemp );
}
Value = Cec_ManPatComputePattern3_rec( p, Gia_ObjFanin0(pObj) );
Value = Gia_XsimNotCond( Value, Gia_ObjFaninC0(pObj) );
if ( Value != GIA_ONE )
printf( "Cec_ManPatVerifyPattern(): Verification failed.\n" );
assert( Value == GIA_ONE );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManPatComputePattern4_rec( Gia_Man_t * p, Gia_Obj_t * pObj )
{
if ( Gia_ObjIsTravIdCurrent(p, pObj) )
return;
Gia_ObjSetTravIdCurrent(p, pObj);
pObj->fMark0 = 0;
if ( Gia_ObjIsCi(pObj) )
return;
assert( Gia_ObjIsAnd(pObj) );
Cec_ManPatComputePattern4_rec( p, Gia_ObjFanin0(pObj) );
Cec_ManPatComputePattern4_rec( p, Gia_ObjFanin1(pObj) );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManPatCleanMark0( Gia_Man_t * p, Gia_Obj_t * pObj )
{
assert( Gia_ObjIsCo(pObj) );
Gia_ManIncrementTravId( p );
Cec_ManPatComputePattern4_rec( p, Gia_ObjFanin0(pObj) );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManPatSavePattern( Cec_ManPat_t * pMan, Cec_ManSat_t * p, Gia_Obj_t * pObj )
{
Vec_Int_t * vPat;
int nPatLits, clk, clkTotal = clock();
assert( Gia_ObjIsCo(pObj) );
pMan->nPats++;
pMan->nPatsAll++;
// compute values in the cone of influence
clk = clock();
Gia_ManIncrementTravId( p->pAig );
nPatLits = Cec_ManPatComputePattern_rec( p, p->pAig, Gia_ObjFanin0(pObj) );
assert( (Gia_ObjFanin0(pObj)->fMark1 ^ Gia_ObjFaninC0(pObj)) == 1 );
pMan->nPatLits += nPatLits;
pMan->nPatLitsAll += nPatLits;
pMan->timeFind += clock() - clk;
// compute sensitizing path
clk = clock();
Vec_IntClear( pMan->vPattern1 );
Gia_ManIncrementTravId( p->pAig );
Cec_ManPatComputePattern1_rec( p->pAig, Gia_ObjFanin0(pObj), pMan->vPattern1 );
// compute sensitizing path
Vec_IntClear( pMan->vPattern2 );
Gia_ManIncrementTravId( p->pAig );
Cec_ManPatComputePattern2_rec( p->pAig, Gia_ObjFanin0(pObj), pMan->vPattern2 );
// compare patterns
vPat = Vec_IntSize(pMan->vPattern1) < Vec_IntSize(pMan->vPattern2) ? pMan->vPattern1 : pMan->vPattern2;
pMan->nPatLitsMin += Vec_IntSize(vPat);
pMan->nPatLitsMinAll += Vec_IntSize(vPat);
pMan->timeShrink += clock() - clk;
// verify pattern using ternary simulation
clk = clock();
Cec_ManPatVerifyPattern( p->pAig, pObj, vPat );
pMan->timeVerify += clock() - clk;
// sort pattern
clk = clock();
Vec_IntSort( vPat, 0 );
pMan->timeSort += clock() - clk;
// save pattern
Cec_ManPatStore( pMan, vPat );
pMan->timeTotal += clock() - clkTotal;
}
/**Function*************************************************************
Synopsis [Packs patterns into array of simulation info.]
Description []
SideEffects []
SeeAlso []
*************************************`**********************************/
int Cec_ManPatCollectTry( Vec_Ptr_t * vInfo, Vec_Ptr_t * vPres, int iBit, int * pLits, int nLits )
{
unsigned * pInfo, * pPres;
int i;
for ( i = 0; i < nLits; i++ )
{
pInfo = Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
pPres = Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
if ( Aig_InfoHasBit( pPres, iBit ) &&
Aig_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
return 0;
}
for ( i = 0; i < nLits; i++ )
{
pInfo = Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
pPres = Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
Aig_InfoSetBit( pPres, iBit );
if ( Aig_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
Aig_InfoXorBit( pInfo, iBit );
}
return 1;
}
/**Function*************************************************************
Synopsis [Packs patterns into array of simulation info.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Ptr_t * Cec_ManPatCollectPatterns( Cec_ManPat_t * pMan, int nInputs, int nWordsInit )
{
Vec_Int_t * vPat = pMan->vPattern1;
Vec_Ptr_t * vInfo, * vPres;
int k, kMax = -1, nPatterns = 0;
int iStartOld = pMan->iStart;
int nWords = nWordsInit;
int nBits = 32 * nWords;
int clk = clock();
vInfo = Vec_PtrAllocSimInfo( nInputs, nWords );
Aig_ManRandomInfo( vInfo, 0, nWords );
vPres = Vec_PtrAllocSimInfo( nInputs, nWords );
Vec_PtrCleanSimInfo( vPres, 0, nWords );
while ( pMan->iStart < Vec_StrSize(pMan->vStorage) )
{
nPatterns++;
Cec_ManPatRestore( pMan, vPat );
for ( k = 1; k < nBits; k++, k += ((k % (32 * nWordsInit)) == 0) )
if ( Cec_ManPatCollectTry( vInfo, vPres, k, (int *)Vec_IntArray(vPat), Vec_IntSize(vPat) ) )
break;
kMax = AIG_MAX( kMax, k );
if ( k == nBits-1 )
{
Vec_PtrReallocSimInfo( vInfo );
Aig_ManRandomInfo( vInfo, nWords, 2*nWords );
Vec_PtrReallocSimInfo( vPres );
Vec_PtrCleanSimInfo( vPres, nWords, 2*nWords );
nWords *= 2;
nBits *= 2;
}
}
Vec_PtrFree( vPres );
pMan->nSeries = Vec_PtrReadWordsSimInfo(vInfo) / nWordsInit;
pMan->timePack += clock() - clk;
pMan->timeTotal += clock() - clk;
pMan->iStart = iStartOld;
if ( pMan->fVerbose )
{
printf( "Total = %5d. Max used = %5d. Full = %5d. Series = %d. ",
nPatterns, kMax, nWordsInit*32, pMan->nSeries );
ABC_PRT( "Time", clock() - clk );
Cec_ManPatPrintStats( pMan );
}
return vInfo;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

537
src/aig/cec/cecSolve.c Normal file
View File

@ -0,0 +1,537 @@
/**CFile****************************************************************
FileName [cecSolve.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis [Performs one round of SAT solving.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cecSolve.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cecInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
static inline int Cec_ObjSatNum( Cec_ManSat_t * p, Gia_Obj_t * pObj ) { return p->pSatVars[Gia_ObjId(p->pAig,pObj)]; }
static inline void Cec_ObjSetSatNum( Cec_ManSat_t * p, Gia_Obj_t * pObj, int Num ) { p->pSatVars[Gia_ObjId(p->pAig,pObj)] = Num; }
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Returns value of the SAT variable.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ObjSatVarValue( Cec_ManSat_t * p, Gia_Obj_t * pObj )
{
return sat_solver_var_value( p->pSat, Cec_ObjSatNum(p, pObj) );
}
/**Function*************************************************************
Synopsis [Addes clauses to the solver.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_AddClausesMux( Cec_ManSat_t * p, Gia_Obj_t * pNode )
{
Gia_Obj_t * pNodeI, * pNodeT, * pNodeE;
int pLits[4], RetValue, VarF, VarI, VarT, VarE, fCompT, fCompE;
assert( !Gia_IsComplement( pNode ) );
assert( Gia_ObjIsMuxType( pNode ) );
// get nodes (I = if, T = then, E = else)
pNodeI = Gia_ObjRecognizeMux( pNode, &pNodeT, &pNodeE );
// get the variable numbers
VarF = Cec_ObjSatNum(p,pNode);
VarI = Cec_ObjSatNum(p,pNodeI);
VarT = Cec_ObjSatNum(p,Gia_Regular(pNodeT));
VarE = Cec_ObjSatNum(p,Gia_Regular(pNodeE));
// get the complementation flags
fCompT = Gia_IsComplement(pNodeT);
fCompE = Gia_IsComplement(pNodeE);
// f = ITE(i, t, e)
// i' + t' + f
// i' + t + f'
// i + e' + f
// i + e + f'
// create four clauses
pLits[0] = toLitCond(VarI, 1);
pLits[1] = toLitCond(VarT, 1^fCompT);
pLits[2] = toLitCond(VarF, 0);
if ( p->pPars->fPolarFlip )
{
if ( pNodeI->fPhase ) pLits[0] = lit_neg( pLits[0] );
if ( Gia_Regular(pNodeT)->fPhase ) pLits[1] = lit_neg( pLits[1] );
if ( pNode->fPhase ) pLits[2] = lit_neg( pLits[2] );
}
RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
assert( RetValue );
pLits[0] = toLitCond(VarI, 1);
pLits[1] = toLitCond(VarT, 0^fCompT);
pLits[2] = toLitCond(VarF, 1);
if ( p->pPars->fPolarFlip )
{
if ( pNodeI->fPhase ) pLits[0] = lit_neg( pLits[0] );
if ( Gia_Regular(pNodeT)->fPhase ) pLits[1] = lit_neg( pLits[1] );
if ( pNode->fPhase ) pLits[2] = lit_neg( pLits[2] );
}
RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
assert( RetValue );
pLits[0] = toLitCond(VarI, 0);
pLits[1] = toLitCond(VarE, 1^fCompE);
pLits[2] = toLitCond(VarF, 0);
if ( p->pPars->fPolarFlip )
{
if ( pNodeI->fPhase ) pLits[0] = lit_neg( pLits[0] );
if ( Gia_Regular(pNodeE)->fPhase ) pLits[1] = lit_neg( pLits[1] );
if ( pNode->fPhase ) pLits[2] = lit_neg( pLits[2] );
}
RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
assert( RetValue );
pLits[0] = toLitCond(VarI, 0);
pLits[1] = toLitCond(VarE, 0^fCompE);
pLits[2] = toLitCond(VarF, 1);
if ( p->pPars->fPolarFlip )
{
if ( pNodeI->fPhase ) pLits[0] = lit_neg( pLits[0] );
if ( Gia_Regular(pNodeE)->fPhase ) pLits[1] = lit_neg( pLits[1] );
if ( pNode->fPhase ) pLits[2] = lit_neg( pLits[2] );
}
RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
assert( RetValue );
// two additional clauses
// t' & e' -> f'
// t & e -> f
// t + e + f'
// t' + e' + f
if ( VarT == VarE )
{
// assert( fCompT == !fCompE );
return;
}
pLits[0] = toLitCond(VarT, 0^fCompT);
pLits[1] = toLitCond(VarE, 0^fCompE);
pLits[2] = toLitCond(VarF, 1);
if ( p->pPars->fPolarFlip )
{
if ( Gia_Regular(pNodeT)->fPhase ) pLits[0] = lit_neg( pLits[0] );
if ( Gia_Regular(pNodeE)->fPhase ) pLits[1] = lit_neg( pLits[1] );
if ( pNode->fPhase ) pLits[2] = lit_neg( pLits[2] );
}
RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
assert( RetValue );
pLits[0] = toLitCond(VarT, 1^fCompT);
pLits[1] = toLitCond(VarE, 1^fCompE);
pLits[2] = toLitCond(VarF, 0);
if ( p->pPars->fPolarFlip )
{
if ( Gia_Regular(pNodeT)->fPhase ) pLits[0] = lit_neg( pLits[0] );
if ( Gia_Regular(pNodeE)->fPhase ) pLits[1] = lit_neg( pLits[1] );
if ( pNode->fPhase ) pLits[2] = lit_neg( pLits[2] );
}
RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
assert( RetValue );
}
/**Function*************************************************************
Synopsis [Addes clauses to the solver.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_AddClausesSuper( Cec_ManSat_t * p, Gia_Obj_t * pNode, Vec_Ptr_t * vSuper )
{
Gia_Obj_t * pFanin;
int * pLits, nLits, RetValue, i;
assert( !Gia_IsComplement(pNode) );
assert( Gia_ObjIsAnd( pNode ) );
// create storage for literals
nLits = Vec_PtrSize(vSuper) + 1;
pLits = ABC_ALLOC( int, nLits );
// suppose AND-gate is A & B = C
// add !A => !C or A + !C
Vec_PtrForEachEntry( vSuper, pFanin, i )
{
pLits[0] = toLitCond(Cec_ObjSatNum(p,Gia_Regular(pFanin)), Gia_IsComplement(pFanin));
pLits[1] = toLitCond(Cec_ObjSatNum(p,pNode), 1);
if ( p->pPars->fPolarFlip )
{
if ( Gia_Regular(pFanin)->fPhase ) pLits[0] = lit_neg( pLits[0] );
if ( pNode->fPhase ) pLits[1] = lit_neg( pLits[1] );
}
RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
assert( RetValue );
}
// add A & B => C or !A + !B + C
Vec_PtrForEachEntry( vSuper, pFanin, i )
{
pLits[i] = toLitCond(Cec_ObjSatNum(p,Gia_Regular(pFanin)), !Gia_IsComplement(pFanin));
if ( p->pPars->fPolarFlip )
{
if ( Gia_Regular(pFanin)->fPhase ) pLits[i] = lit_neg( pLits[i] );
}
}
pLits[nLits-1] = toLitCond(Cec_ObjSatNum(p,pNode), 0);
if ( p->pPars->fPolarFlip )
{
if ( pNode->fPhase ) pLits[nLits-1] = lit_neg( pLits[nLits-1] );
}
RetValue = sat_solver_addclause( p->pSat, pLits, pLits + nLits );
assert( RetValue );
ABC_FREE( pLits );
}
/**Function*************************************************************
Synopsis [Collects the supergate.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_CollectSuper_rec( Gia_Obj_t * pObj, Vec_Ptr_t * vSuper, int fFirst, int fUseMuxes )
{
// if the new node is complemented or a PI, another gate begins
if ( Gia_IsComplement(pObj) || Gia_ObjIsCi(pObj) ||
(!fFirst && Gia_ObjValue(pObj) > 1) ||
(fUseMuxes && Gia_ObjIsMuxType(pObj)) )
{
Vec_PtrPushUnique( vSuper, pObj );
return;
}
// go through the branches
Cec_CollectSuper_rec( Gia_ObjChild0(pObj), vSuper, 0, fUseMuxes );
Cec_CollectSuper_rec( Gia_ObjChild1(pObj), vSuper, 0, fUseMuxes );
}
/**Function*************************************************************
Synopsis [Collects the supergate.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_CollectSuper( Gia_Obj_t * pObj, int fUseMuxes, Vec_Ptr_t * vSuper )
{
assert( !Gia_IsComplement(pObj) );
assert( !Gia_ObjIsCi(pObj) );
Vec_PtrClear( vSuper );
Cec_CollectSuper_rec( pObj, vSuper, 1, fUseMuxes );
}
/**Function*************************************************************
Synopsis [Updates the solver clause database.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ObjAddToFrontier( Cec_ManSat_t * p, Gia_Obj_t * pObj, Vec_Ptr_t * vFrontier )
{
assert( !Gia_IsComplement(pObj) );
if ( Cec_ObjSatNum(p,pObj) )
return;
assert( Cec_ObjSatNum(p,pObj) == 0 );
if ( Gia_ObjIsConst0(pObj) )
return;
Vec_PtrPush( p->vUsedNodes, pObj );
Cec_ObjSetSatNum( p, pObj, p->nSatVars++ );
if ( Gia_ObjIsAnd(pObj) )
Vec_PtrPush( vFrontier, pObj );
}
/**Function*************************************************************
Synopsis [Updates the solver clause database.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_CnfNodeAddToSolver( Cec_ManSat_t * p, Gia_Obj_t * pObj )
{
Vec_Ptr_t * vFrontier;
Gia_Obj_t * pNode, * pFanin;
int i, k, fUseMuxes = 1;
// quit if CNF is ready
if ( Cec_ObjSatNum(p,pObj) )
return;
if ( Gia_ObjIsCi(pObj) )
{
Vec_PtrPush( p->vUsedNodes, pObj );
Cec_ObjSetSatNum( p, pObj, p->nSatVars++ );
sat_solver_setnvars( p->pSat, p->nSatVars );
return;
}
assert( Gia_ObjIsAnd(pObj) );
// start the frontier
vFrontier = Vec_PtrAlloc( 100 );
Cec_ObjAddToFrontier( p, pObj, vFrontier );
// explore nodes in the frontier
Vec_PtrForEachEntry( vFrontier, pNode, i )
{
// create the supergate
assert( Cec_ObjSatNum(p,pNode) );
if ( fUseMuxes && Gia_ObjIsMuxType(pNode) )
{
Vec_PtrClear( p->vFanins );
Vec_PtrPushUnique( p->vFanins, Gia_ObjFanin0( Gia_ObjFanin0(pNode) ) );
Vec_PtrPushUnique( p->vFanins, Gia_ObjFanin0( Gia_ObjFanin1(pNode) ) );
Vec_PtrPushUnique( p->vFanins, Gia_ObjFanin1( Gia_ObjFanin0(pNode) ) );
Vec_PtrPushUnique( p->vFanins, Gia_ObjFanin1( Gia_ObjFanin1(pNode) ) );
Vec_PtrForEachEntry( p->vFanins, pFanin, k )
Cec_ObjAddToFrontier( p, Gia_Regular(pFanin), vFrontier );
Cec_AddClausesMux( p, pNode );
}
else
{
Cec_CollectSuper( pNode, fUseMuxes, p->vFanins );
Vec_PtrForEachEntry( p->vFanins, pFanin, k )
Cec_ObjAddToFrontier( p, Gia_Regular(pFanin), vFrontier );
Cec_AddClausesSuper( p, pNode, p->vFanins );
}
assert( Vec_PtrSize(p->vFanins) > 1 );
}
Vec_PtrFree( vFrontier );
}
/**Function*************************************************************
Synopsis [Recycles the SAT solver.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSatSolverRecycle( Cec_ManSat_t * p )
{
int Lit;
if ( p->pSat )
{
Gia_Obj_t * pObj;
int i;
Vec_PtrForEachEntry( p->vUsedNodes, pObj, i )
Cec_ObjSetSatNum( p, pObj, 0 );
Vec_PtrClear( p->vUsedNodes );
// memset( p->pSatVars, 0, sizeof(int) * Aig_ManObjNumMax(p->pAigTotal) );
sat_solver_delete( p->pSat );
}
p->pSat = sat_solver_new();
sat_solver_setnvars( p->pSat, 1000 );
// var 0 is not used
// var 1 is reserved for const0 node - add the clause
p->nSatVars = 1;
// p->nSatVars = 0;
Lit = toLitCond( p->nSatVars, 1 );
if ( p->pPars->fPolarFlip )
Lit = lit_neg( Lit );
sat_solver_addclause( p->pSat, &Lit, &Lit + 1 );
Cec_ObjSetSatNum( p, Gia_ManConst0(p->pAig), p->nSatVars++ );
p->nRecycles++;
p->nCallsSince = 0;
}
/**Function*************************************************************
Synopsis [Runs equivalence test for the two nodes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ManSatCheckNode( Cec_ManSat_t * p, Gia_Obj_t * pObj )
{
int nBTLimit = p->pPars->nBTLimit;
int Lit, RetValue, status, clk, nConflicts;
p->nCallsSince++; // experiment with this!!!
p->nSatTotal++;
// check if SAT solver needs recycling
if ( p->pSat == NULL ||
(p->pPars->nSatVarMax &&
p->nSatVars > p->pPars->nSatVarMax &&
p->nCallsSince > p->pPars->nCallsRecycle) )
Cec_ManSatSolverRecycle( p );
// if the nodes do not have SAT variables, allocate them
Cec_CnfNodeAddToSolver( p, Gia_ObjFanin0(pObj) );
// propage unit clauses
if ( p->pSat->qtail != p->pSat->qhead )
{
status = sat_solver_simplify(p->pSat);
assert( status != 0 );
assert( p->pSat->qtail == p->pSat->qhead );
}
// solve under assumptions
// A = 1; B = 0 OR A = 1; B = 1
Lit = toLitCond( Cec_ObjSatNum(p,Gia_ObjFanin0(pObj)), Gia_ObjFaninC0(pObj) );
if ( p->pPars->fPolarFlip )
{
if ( Gia_ObjFanin0(pObj)->fPhase ) Lit = lit_neg( Lit );
}
//Sat_SolverWriteDimacs( p->pSat, "temp.cnf", pLits, pLits + 2, 1 );
clk = clock();
nConflicts = p->pSat->stats.conflicts;
RetValue = sat_solver_solve( p->pSat, &Lit, &Lit + 1,
(ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
if ( RetValue == l_False )
{
p->timeSatUnsat += clock() - clk;
Lit = lit_neg( Lit );
RetValue = sat_solver_addclause( p->pSat, &Lit, &Lit + 1 );
assert( RetValue );
p->nSatUnsat++;
p->nConfUnsat += p->pSat->stats.conflicts - nConflicts;
return 1;
}
else if ( RetValue == l_True )
{
p->timeSatSat += clock() - clk;
p->nSatSat++;
p->nConfSat += p->pSat->stats.conflicts - nConflicts;
return 0;
}
else // if ( RetValue == l_Undef )
{
p->timeSatUndec += clock() - clk;
p->nSatUndec++;
p->nConfUndec += p->pSat->stats.conflicts - nConflicts;
return -1;
}
}
/**Function*************************************************************
Synopsis [Performs one round of solving for the POs of the AIG.]
Description [Labels the nodes that have been proved (pObj->fMark1)
and returns the set of satisfying assignments.]
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSatSolve( Cec_ManPat_t * pPat, Gia_Man_t * pAig, Cec_ParSat_t * pPars )
{
Bar_Progress_t * pProgress = NULL;
Cec_ManSat_t * p;
Gia_Obj_t * pObj;
int i, status, clk = clock();
// reset the manager
if ( pPat )
{
pPat->iStart = Vec_StrSize(pPat->vStorage);
pPat->nPats = 0;
pPat->nPatLits = 0;
pPat->nPatLitsMin = 0;
}
Gia_ManSetPhase( pAig );
Gia_ManResetTravId( pAig );
p = Cec_ManSatCreate( pAig, pPars );
pProgress = Bar_ProgressStart( stdout, Gia_ManPoNum(pAig) );
Gia_ManForEachCo( pAig, pObj, i )
{
if ( Gia_ObjIsConst0(Gia_ObjFanin0(pObj)) )
{
pObj->fMark0 = 0;
pObj->fMark1 = 1;
continue;
}
Bar_ProgressUpdate( pProgress, i, "SAT..." );
status = Cec_ManSatCheckNode( p, pObj );
pObj->fMark0 = (status == 0);
pObj->fMark1 = (status == 1);
/*
if ( status == -1 )
{
Gia_Man_t * pTemp = Gia_ManDupDfsCone( pAig, pObj );
Gia_WriteAiger( pTemp, "gia_hard.aig", 0, 0 );
Gia_ManStop( pTemp );
printf( "Dumping hard cone into file \"%s\".\n", "gia_hard.aig" );
}
*/
if ( status != 0 )
continue;
// save the pattern
if ( pPat )
Cec_ManPatSavePattern( pPat, p, pObj );
// quit if one of them is solved
if ( pPars->fFirstStop )
break;
}
p->timeTotal = clock() - clk;
Bar_ProgressStop( pProgress );
if ( pPars->fVerbose )
Cec_ManSatPrintStats( p );
Cec_ManSatStop( p );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

9
src/aig/cec/module.make
View File

@ -1,8 +1,5 @@
SRC += src/aig/cec/cecAig.c \
src/aig/cec/cecClass.c \
src/aig/cec/cecCnf.c \
SRC += src/aig/cec/cecClass.c \
src/aig/cec/cecCore.c \
src/aig/cec/cecMan.c \
src/aig/cec/cecSat.c \
src/aig/cec/cecSim.c \
src/aig/cec/cecStatus.c
src/aig/cec/cecPat.c \
src/aig/cec/cecSolve.c

104
src/aig/cec2/cec.h Normal file
View File

@ -0,0 +1,104 @@
/**CFile****************************************************************
FileName [cec.h]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis [External declarations.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cec.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#ifndef __CEC_H__
#define __CEC_H__
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
// dynamic SAT parameters
typedef struct Cec_ParSat_t_ Cec_ParSat_t;
struct Cec_ParSat_t_
{
int nBTLimit; // conflict limit at a node
int nSatVarMax; // the max number of SAT variables
int nCallsRecycle; // calls to perform before recycling SAT solver
int fFirstStop; // stop on the first sat output
int fPolarFlip; // uses polarity adjustment
int fVerbose; // verbose stats
};
// combinational SAT sweeping parameters
typedef struct Cec_ParCsw_t_ Cec_ParCsw_t;
struct Cec_ParCsw_t_
{
int nWords; // the number of simulation words
int nRounds; // the number of simulation rounds
int nBTLimit; // conflict limit at a node
int nSatVarMax; // the max number of SAT variables
int nCallsRecycle; // calls to perform before recycling SAT solver
int nLevelMax; // restriction on the level nodes to be swept
int fRewriting; // enables AIG rewriting
int fFirstStop; // stop on the first sat output
int fVerbose; // verbose stats
};
// combinational equivalence checking parameters
typedef struct Cec_ParCec_t_ Cec_ParCec_t;
struct Cec_ParCec_t_
{
int nIters; // iterations of SAT solving/sweeping
int nBTLimitBeg; // starting backtrack limit
int nBTlimitMulti; // multiple of backtrack limit
int fUseSmartCnf; // use smart CNF computation
int fRewriting; // enables AIG rewriting
int fSatSweeping; // enables SAT sweeping
int fFirstStop; // stop on the first sat output
int fVerbose; // verbose stats
};
////////////////////////////////////////////////////////////////////////
/// MACRO DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
/*=== cecCore.c ==========================================================*/
extern void Cec_ManSatSetDefaultParams( Cec_ParSat_t * p );
extern void Cec_ManCswSetDefaultParams( Cec_ParCsw_t * p );
extern void Cec_ManCecSetDefaultParams( Cec_ParCec_t * p );
extern int Cec_Solve( Aig_Man_t * pAig0, Aig_Man_t * pAig1, Cec_ParCec_t * p );
#ifdef __cplusplus
}
#endif
#endif
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

45
src/aig/cec/cecAig.c → src/aig/cec2/cecAig.c
View File

@ -43,12 +43,20 @@ Aig_Obj_t * Cec_DeriveMiter_rec( Aig_Man_t * pNew, Aig_Obj_t * pObj )
{
if ( pObj->pData )
return pObj->pData;
if ( Aig_ObjIsPi(pObj) )
{
pObj->pData = Aig_ObjCreatePi( pNew );
if ( pObj->pHaig )
{
assert( pObj->pHaig->pData == NULL );
pObj->pHaig->pData = pObj->pData;
}
return pObj->pData;
}
assert( Aig_ObjIsNode(pObj) );
Cec_DeriveMiter_rec( pNew, Aig_ObjFanin0(pObj) );
if ( Aig_ObjIsBuf(pObj) )
return pObj->pData = Aig_ObjChild0Copy(pObj);
Cec_DeriveMiter_rec( pNew, Aig_ObjFanin1(pObj) );
pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
Aig_Regular(pObj->pData)->pHaig = pObj->pHaig;
return pObj->pData;
}
@ -81,9 +89,14 @@ Aig_Man_t * Cec_DeriveMiter( Aig_Man_t * p0, Aig_Man_t * p1 )
Aig_ManConst1(p1)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( p0, pObj0, i )
{
pObj1 = Aig_ManPi( p1, i );
pObj0->pHaig = pObj1;
pObj1->pHaig = pObj0;
if ( Aig_ObjRefs(pObj0) || Aig_ObjRefs(pObj1) )
continue;
pObjNew = Aig_ObjCreatePi( pNew );
pObj0->pData = pObjNew;
Aig_ManPi(p1, i)->pData = pObjNew;
pObj1->pData = pObjNew;
}
// add logic for the POs
pProgress = Bar_ProgressStart( stdout, Aig_ManPoNum(p0) );
@ -97,11 +110,8 @@ Aig_Man_t * Cec_DeriveMiter( Aig_Man_t * p0, Aig_Man_t * p1 )
Aig_ObjCreatePo( pNew, pObjNew );
}
Bar_ProgressStop( pProgress );
Aig_ManCleanup( pNew );
Aig_ManSetRegNum( pNew, 0 );
// check the resulting network
// if ( !Aig_ManCheck(pNew) )
// printf( "Cec_DeriveMiter(): The check has failed.\n" );
assert( Aig_ManHasNoGaps(pNew) );
return pNew;
}
@ -118,9 +128,13 @@ Aig_Man_t * Cec_DeriveMiter( Aig_Man_t * p0, Aig_Man_t * p1 )
***********************************************************************/
Aig_Man_t * Cec_Duplicate( Aig_Man_t * p )
{
Bar_Progress_t * pProgress = NULL;
Aig_Man_t * pNew;
Aig_Obj_t * pObj;
int i;
// make sure the AIG does not have choices and dangling nodes
Aig_ManForEachNode( p, pObj, i )
assert( Aig_ObjRefs(pObj) > 0 );
// create the new manager
pNew = Aig_ManStart( Aig_ManNodeNum(p) );
pNew->pName = Aig_UtilStrsav( p->pName );
@ -128,19 +142,22 @@ Aig_Man_t * Cec_Duplicate( Aig_Man_t * p )
Aig_ManCleanData( p );
Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
Aig_ManForEachPi( p, pObj, i )
pObj->pData = Aig_ObjCreatePi( pNew );
{
pObj->pHaig = NULL;
if ( Aig_ObjRefs(pObj) == 0 )
pObj->pData = Aig_ObjCreatePi( pNew );
}
// add logic for the POs
pProgress = Bar_ProgressStart( stdout, Aig_ManPoNum(p) );
Aig_ManForEachPo( p, pObj, i )
{
Bar_ProgressUpdate( pProgress, i, "Miter..." );
Cec_DeriveMiter_rec( pNew, Aig_ObjFanin0(pObj) );
Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) );
}
Aig_ManCleanup( pNew );
Bar_ProgressStop( pProgress );
Aig_ManSetRegNum( pNew, 0 );
assert( Aig_ManBufNum(p) != 0 || Aig_ManNodeNum(p) == Aig_ManNodeNum(pNew) );
// check the resulting network
// if ( !Aig_ManCheck(pNew) )
// printf( "Cec_DeriveMiter(): The check has failed.\n" );
assert( Aig_ManHasNoGaps(pNew) );
return pNew;
}

571
src/aig/cec2/cecClass.c Normal file
View File

@ -0,0 +1,571 @@
/**CFile****************************************************************
FileName [cecClass.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis [Equivalence class representation.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cecClass.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cecInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Caig_ManSpecReduce( Caig_Man_t * p, int nLevels )
{
Aig_Man_t * pAig;
Aig_Obj_t ** pCopy;
Aig_Obj_t * pRes0, * pRes1, * pRepr, * pNode;
Aig_Obj_t * pMiter;
int i;
pAig = Aig_ManStart( p->nNodes );
pCopy = ABC_ALLOC( Aig_Obj_t *, p->nObjs );
pCopy[0] = Aig_ManConst1(pAig);
for ( i = 1; i < p->nObjs; i++ )
{
if ( p->pFans0[i] == -1 ) // pi always has zero first fanin
{
pCopy[i] = Aig_ObjCreatePi( pAig );
continue;
}
if ( p->pFans1[i] == -1 ) // po always has non-zero 1st fanin and zero 2nd fanin
continue;
pRes0 = Aig_NotCond( pCopy[Cec_Lit2Var(p->pFans0[i])], Cec_LitIsCompl(p->pFans0[i]) );
pRes1 = Aig_NotCond( pCopy[Cec_Lit2Var(p->pFans1[i])], Cec_LitIsCompl(p->pFans1[i]) );
pNode = pCopy[i] = Aig_And( pAig, pRes0, pRes1 );
if ( p->pReprs[i] < 0 )
continue;
assert( p->pReprs[i] < i );
pRepr = pCopy[p->pReprs[i]];
if ( Aig_Regular(pNode) == Aig_Regular(pRepr) )
continue;
pCopy[i] = Aig_NotCond( pRepr, Aig_ObjPhaseReal(pRepr) ^ Aig_ObjPhaseReal(pNode) );
if ( nLevels && ((int)Aig_Regular(pRepr)->Level > nLevels || (int)Aig_Regular(pNode)->Level > nLevels) )
continue;
pMiter = Aig_Exor( pAig, pNode, pRepr );
Aig_ObjCreatePo( pAig, Aig_NotCond(pMiter, Aig_ObjPhaseReal(pMiter)) );
// Aig_ObjCreatePo( pAig, Aig_Regular(pRepr) );
// Aig_ObjCreatePo( pAig, Aig_Regular(pCopy[i]) );
}
ABC_FREE( pCopy );
Aig_ManSetRegNum( pAig, 0 );
Aig_ManCleanup( pAig );
return pAig;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Caig_ManCountOne( Caig_Man_t * p, int i )
{
int Ent, nLits = 0;
assert( p->pReprs[i] < 0 && p->pNexts[i] > 0 );
for ( Ent = p->pNexts[i]; Ent; Ent = p->pNexts[Ent] )
{
assert( p->pReprs[Ent] == i );
nLits++;
}
return 1 + nLits;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Caig_ManCountLiterals( Caig_Man_t * p )
{
int i, nLits = 0;
for ( i = 1; i < p->nObjs; i++ )
if ( p->pReprs[i] < 0 && p->pNexts[i] > 0 )
nLits += Caig_ManCountOne(p, i) - 1;
return nLits;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Caig_ManPrintOne( Caig_Man_t * p, int i, int Counter )
{
int Ent;
printf( "Class %4d : Num = %2d {", Counter, Caig_ManCountOne(p, i) );
for ( Ent = i; Ent; Ent = p->pNexts[Ent] )
printf(" %d", Ent );
printf( " }\n" );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Caig_ManPrintClasses( Caig_Man_t * p, int fVerbose )
{
int i, Counter = 0, Counter1 = 0, CounterX = 0, nLits;
for ( i = 1; i < p->nObjs; i++ )
{
if ( p->pReprs[i] < 0 && p->pNexts[i] > 0 )
Counter++;
if ( p->pReprs[i] == 0 )
Counter1++;
if ( p->pReprs[i] < 0 && p->pNexts[i] == 0 )
CounterX++;
}
nLits = Caig_ManCountLiterals( p );
printf( "Class = %6d. Const = %6d. Unsed = %6d. Lits = %7d. All = %7d. Mem = %5.2f Mb\n",
Counter, Counter1, CounterX, nLits, nLits+Counter1, 1.0*p->nMemsMax/(1<<20) );
if ( fVerbose )
for ( i = 1; i < p->nObjs; i++ )
if ( p->pReprs[i] < 0 && p->pNexts[i] > 0 )
Caig_ManPrintOne( p, i, ++Counter );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Caig_ManCollectSimsSimple( Caig_Man_t * p, int i )
{
int Ent;
Vec_PtrClear( p->vSims );
for ( Ent = i; Ent; Ent = p->pNexts[Ent] )
Vec_PtrPush( p->vSims, p->pSims + Ent );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Caig_ManCollectSimsNormal( Caig_Man_t * p, int i )
{
unsigned * pSim;
int Ent;
Vec_PtrClear( p->vSims );
for ( Ent = i; Ent; Ent = p->pNexts[Ent] )
{
pSim = Caig_ManSimDeref( p, Ent );
Vec_PtrPush( p->vSims, pSim + 1 );
}
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Caig_ManCompareEqual( unsigned * p0, unsigned * p1, int nWords )
{
int w;
if ( (p0[0] & 1) == (p1[0] & 1) )
{
for ( w = 0; w < nWords; w++ )
if ( p0[w] != p1[w] )
return 0;
return 1;
}
else
{
for ( w = 0; w < nWords; w++ )
if ( p0[w] != ~p1[w] )
return 0;
return 1;
}
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Caig_ManCompareConst( unsigned * p, int nWords )
{
int w;
if ( p[0] & 1 )
{
for ( w = 0; w < nWords; w++ )
if ( p[w] != ~0 )
return 0;
return 1;
}
else
{
for ( w = 0; w < nWords; w++ )
if ( p[w] != 0 )
return 0;
return 1;
}
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Caig_ManClassCreate( Caig_Man_t * p, Vec_Int_t * vClass )
{
int * pNext, Repr, Ent, i;
assert( Vec_IntSize(vClass) > 0 );
Vec_IntForEachEntry( vClass, Ent, i )
{
if ( i == 0 )
{
Repr = Ent;
p->pReprs[Ent] = -1;
pNext = p->pNexts + Ent;
}
else
{
p->pReprs[Ent] = Repr;
*pNext = Ent;
pNext = p->pNexts + Ent;
}
}
*pNext = 0;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Caig_ManClassRefineOne( Caig_Man_t * p, int i, Vec_Ptr_t * vSims )
{
unsigned * pSim0, * pSim1;
int Ent, c = 0, d = 0;
Vec_IntClear( p->vClassOld );
Vec_IntClear( p->vClassNew );
pSim0 = Vec_PtrEntry( vSims, c++ );
Vec_IntPush( p->vClassOld, i );
for ( Ent = p->pNexts[i]; Ent; Ent = p->pNexts[Ent] )
{
pSim1 = Vec_PtrEntry( vSims, c++ );
if ( Caig_ManCompareEqual( pSim0, pSim1, p->nWords ) )
Vec_IntPush( p->vClassOld, Ent );
else
{
Vec_IntPush( p->vClassNew, Ent );
Vec_PtrWriteEntry( vSims, d++, pSim1 );
}
}
//if ( Vec_PtrSize(vSims) > 100 )
//printf( "%d -> %d %d \n", Vec_PtrSize(vSims), Vec_IntSize(p->vClassOld), Vec_IntSize(p->vClassNew) );
Vec_PtrShrink( vSims, d );
if ( Vec_IntSize(p->vClassNew) == 0 )
return 0;
Caig_ManClassCreate( p, p->vClassOld );
Caig_ManClassCreate( p, p->vClassNew );
if ( Vec_IntSize(p->vClassNew) > 1 )
return 1 + Caig_ManClassRefineOne( p, Vec_IntEntry(p->vClassNew,0), vSims );
return 1;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Caig_ManHashKey( unsigned * pSim, int nWords, int nTableSize )
{
static int s_Primes[16] = {
1291, 1699, 1999, 2357, 2953, 3313, 3907, 4177,
4831, 5147, 5647, 6343, 6899, 7103, 7873, 8147 };
unsigned uHash = 0;
int i;
if ( pSim[0] & 1 )
for ( i = 0; i < nWords; i++ )
uHash ^= ~pSim[i] * s_Primes[i & 0xf];
else
for ( i = 0; i < nWords; i++ )
uHash ^= pSim[i] * s_Primes[i & 0xf];
return (int)(uHash % nTableSize);
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Caig_ManClassesCreate( Caig_Man_t * p )
{
int * pTable, nTableSize, i, Key;
nTableSize = Aig_PrimeCudd( 100 + p->nObjs / 10 );
pTable = ABC_CALLOC( int, nTableSize );
p->pReprs = ABC_ALLOC( int, p->nObjs );
p->pNexts = ABC_CALLOC( int, p->nObjs );
for ( i = 1; i < p->nObjs; i++ )
{
if ( p->pFans0[i] > 0 && p->pFans1[i] == -1 ) // po always has non-zero 1st fanin and zero 2nd fanin
continue;
if ( Caig_ManCompareConst( p->pSims + i, 1 ) )
{
p->pReprs[i] = 0;
continue;
}
Key = Caig_ManHashKey( p->pSims + i, 1, nTableSize );
if ( pTable[Key] == 0 )
p->pReprs[i] = -1;
else
{
p->pNexts[ pTable[Key] ] = i;
p->pReprs[i] = p->pReprs[ pTable[Key] ];
if ( p->pReprs[i] == -1 )
p->pReprs[i] = pTable[Key];
}
pTable[Key] = i;
}
ABC_FREE( pTable );
Caig_ManPrintClasses( p, 0 );
// refine classes
for ( i = 1; i < p->nObjs; i++ )
if ( p->pReprs[i] < 0 && p->pNexts[i] > 0 )
{
Caig_ManCollectSimsSimple( p, i );
Caig_ManClassRefineOne( p, i, p->vSims );
}
// clean memory
memset( p->pSims, 0, sizeof(unsigned) * p->nObjs );
Caig_ManPrintClasses( p, 0 );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Caig_ManSimulateSimple( Caig_Man_t * p )
{
unsigned Res0, Res1;
int i;
for ( i = 1; i < p->nObjs; i++ )
{
if ( p->pFans0[i] == -1 ) // pi
{
p->pSims[i] = Aig_ManRandom( 0 );
continue;
}
if ( p->pFans1[i] == -1 ) // po always has non-zero 1st fanin and zero 2nd fanin
continue;
Res0 = p->pSims[Cec_Lit2Var(p->pFans0[i])];
Res1 = p->pSims[Cec_Lit2Var(p->pFans1[i])];
p->pSims[i] = (Cec_LitIsCompl(p->pFans0[i]) ? ~Res0: Res0) &
(Cec_LitIsCompl(p->pFans1[i]) ? ~Res1: Res1);
}
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Caig_ManProcessRefined( Caig_Man_t * p, Vec_Int_t * vRefined )
{
Vec_Int_t * vClasses;
int * pTable, nTableSize, i, Key, iNode;
unsigned * pSim;
if ( Vec_IntSize(vRefined) == 0 )
return;
nTableSize = Aig_PrimeCudd( 100 + Vec_IntSize(vRefined) / 5 );
pTable = ABC_CALLOC( int, nTableSize );
vClasses = Vec_IntAlloc( 100 );
Vec_IntForEachEntry( vRefined, iNode, i )
{
pSim = Caig_ManSimRead( p, iNode );
assert( !Caig_ManCompareConst( pSim + 1, p->nWords ) );
Key = Caig_ManHashKey( pSim + 1, p->nWords, nTableSize );
if ( pTable[Key] == 0 )
{
assert( p->pReprs[iNode] == 0 );
assert( p->pNexts[iNode] == 0 );
p->pReprs[iNode] = -1;
Vec_IntPush( vClasses, iNode );
}
else
{
p->pNexts[ pTable[Key] ] = iNode;
p->pReprs[iNode] = p->pReprs[ pTable[Key] ];
if ( p->pReprs[iNode] == -1 )
p->pReprs[iNode] = pTable[Key];
assert( p->pReprs[iNode] > 0 );
}
pTable[Key] = iNode;
}
ABC_FREE( pTable );
// refine classes
Vec_IntForEachEntry( vClasses, iNode, i )
{
if ( p->pNexts[iNode] == 0 )
{
Caig_ManSimDeref( p, iNode );
continue;
}
Caig_ManCollectSimsNormal( p, iNode );
Caig_ManClassRefineOne( p, iNode, p->vSims );
}
Vec_IntFree( vClasses );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Caig_Man_t * Caig_ManClassesPrepare( Aig_Man_t * pAig, int nWords, int nIters )
{
Vec_Ptr_t * vInfo;
Caig_Man_t * p;
int i;
Aig_ManRandom( 1 );
p = Caig_ManCreate( pAig );
p->nWords = 1;
Caig_ManSimulateSimple( p );
Caig_ManClassesCreate( p );
p->nWords = nWords;
for ( i = 0; i < nIters; i++ )
{
p->nWords = i + 1;
Caig_ManSimMemRelink( p );
p->nMemsMax = 0;
vInfo = Vec_PtrAllocSimInfo( p->nPis, p->nWords );
Aig_ManRandomInfo( vInfo, 0, p->nWords );
Caig_ManSimulateRound( p, vInfo, NULL );
Vec_PtrFree( vInfo );
Caig_ManPrintClasses( p, 0 );
}
p->nWords = nWords;
Caig_ManSimMemRelink( p );
p->nMemsMax = 0;
return p;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

4
src/aig/cec/cecCnf.c → src/aig/cec2/cecCnf.c
View File

@ -166,7 +166,7 @@ void Cec_AddClausesSuper( Cec_ManSat_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vSupe
assert( Aig_ObjIsNode( pNode ) );
// create storage for literals
nLits = Vec_PtrSize(vSuper) + 1;
pLits = ALLOC( int, nLits );
pLits = ABC_ALLOC( int, nLits );
// suppose AND-gate is A & B = C
// add !A => !C or A + !C
Vec_PtrForEachEntry( vSuper, pFanin, i )
@ -197,7 +197,7 @@ void Cec_AddClausesSuper( Cec_ManSat_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vSupe
}
RetValue = sat_solver_addclause( p->pSat, pLits, pLits + nLits );
assert( RetValue );
free( pLits );
ABC_FREE( pLits );
}
/**Function*************************************************************

245
src/aig/cec2/cecCore.c Normal file
View File

@ -0,0 +1,245 @@
/**CFile****************************************************************
FileName [cecCore.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis [Core procedures.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cecCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cecInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [This procedure sets default parameters.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSatSetDefaultParams( Cec_ParSat_t * p )
{
memset( p, 0, sizeof(Cec_ParSat_t) );
p->nBTLimit = 10; // conflict limit at a node
p->nSatVarMax = 2000; // the max number of SAT variables
p->nCallsRecycle = 100; // calls to perform before recycling SAT solver
p->fFirstStop = 0; // stop on the first sat output
p->fPolarFlip = 0; // uses polarity adjustment
p->fVerbose = 0; // verbose stats
}
/**Function*************************************************************
Synopsis [This procedure sets default parameters.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManCswSetDefaultParams( Cec_ParCsw_t * p )
{
memset( p, 0, sizeof(Cec_ParCsw_t) );
p->nWords = 10; // the number of simulation words
p->nRounds = 10; // the number of simulation rounds
p->nBTLimit = 10; // conflict limit at a node
p->nSatVarMax = 2000; // the max number of SAT variables
p->nCallsRecycle = 100; // calls to perform before recycling SAT solver
p->nLevelMax = 50; // restriction on the level of nodes to be swept
p->fRewriting = 0; // enables AIG rewriting
p->fFirstStop = 0; // stop on the first sat output
p->fVerbose = 1; // verbose stats
}
/**Function*************************************************************
Synopsis [This procedure sets default parameters.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManCecSetDefaultParams( Cec_ParCec_t * p )
{
memset( p, 0, sizeof(Cec_ParCec_t) );
p->nIters = 1; // iterations of SAT solving/sweeping
p->nBTLimitBeg = 2; // starting backtrack limit
p->nBTlimitMulti = 8; // multiple of backtrack limiter
p->fUseSmartCnf = 0; // use smart CNF computation
p->fRewriting = 0; // enables AIG rewriting
p->fSatSweeping = 0; // enables SAT sweeping
p->fFirstStop = 0; // stop on the first sat output
p->fVerbose = 1; // verbose stats
}
/**Function*************************************************************
Synopsis [Performs equivalence checking.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_Sweep( Aig_Man_t * pAig, int nBTLimit )
{
extern void Ioa_WriteAiger( Aig_Man_t * pMan, char * pFileName, int fWriteSymbols, int fCompact );
// Cec_MtrStatus_t Status;
Cec_ParCsw_t ParsCsw, * pParsCsw = &ParsCsw;
Cec_ParSat_t ParsSat, * pParsSat = &ParsSat;
Caig_Man_t * pCaig;
Aig_Man_t * pSRAig;
// int clk;
Cec_ManCswSetDefaultParams( pParsCsw );
pParsCsw->nBTLimit = nBTLimit;
pCaig = Caig_ManClassesPrepare( pAig, pParsCsw->nWords, pParsCsw->nRounds );
pSRAig = Caig_ManSpecReduce( pCaig, 20 );
Aig_ManPrintStats( pSRAig );
Ioa_WriteAiger( pSRAig, "temp_srm.aig", 0, 1 );
/*
Cec_ManSatSetDefaultParams( pParsSat );
pParsSat->fFirstStop = 0;
pParsSat->nBTLimit = pParsCsw->nBTlimit;
clk = clock();
Status = Cec_SatSolveOutputs( pSRAig, pParsSat );
Cec_MiterStatusPrint( Status, "SRM ", clock() - clk );
*/
Aig_ManStop( pSRAig );
Caig_ManDelete( pCaig );
return 1;
}
/**Function*************************************************************
Synopsis [Performs equivalence checking.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_Solve( Aig_Man_t * pAig0, Aig_Man_t * pAig1, Cec_ParCec_t * pPars )
{
Cec_ParSat_t ParsSat, * pParsSat = &ParsSat;
Cec_ParCsw_t ParsCsw, * pParsCsw = &ParsCsw;
Cec_MtrStatus_t Status;
Caig_Man_t * pCaig;
Aig_Man_t * pMiter;
int i, clk = clock();
if ( pPars->fVerbose )
{
Status = Cec_MiterStatusTrivial( pAig0 );
Status.nNodes += pAig1? Aig_ManNodeNum( pAig1 ) : 0;
Cec_MiterStatusPrint( Status, "Init ", 0 );
}
// create combinational miter
if ( pAig1 == NULL )
{
Status = Cec_MiterStatus( pAig0 );
if ( Status.nSat > 0 && pPars->fFirstStop )
{
if ( pPars->fVerbose )
printf( "Output %d is trivially SAT.\n", Status.iOut );
return 0;
}
if ( Status.nUndec == 0 )
{
if ( pPars->fVerbose )
printf( "The miter has no undecided outputs.\n" );
return 1;
}
pMiter = Cec_Duplicate( pAig0 );
}
else
{
pMiter = Cec_DeriveMiter( pAig0, pAig1 );
Status = Cec_MiterStatus( pMiter );
if ( Status.nSat > 0 && pPars->fFirstStop )
{
if ( pPars->fVerbose )
printf( "Output %d is trivially SAT.\n", Status.iOut );
Aig_ManStop( pMiter );
return 0;
}
if ( Status.nUndec == 0 )
{
if ( pPars->fVerbose )
printf( "The problem is solved by structrual hashing.\n" );
Aig_ManStop( pMiter );
return 1;
}
}
if ( pPars->fVerbose )
Cec_MiterStatusPrint( Status, "Strash", clock() - clk );
// start parameter structures
// Cec_ManSatSetDefaultParams( pParsSat );
// pParsSat->fFirstStop = pPars->fFirstStop;
// pParsSat->nBTLimit = pPars->nBTLimitBeg;
/*
// try SAT solving
clk = clock();
pParsSat->nBTLimit *= pPars->nBTlimitMulti;
Status = Cec_SatSolveOutputs( pMiter, pParsSat );
if ( pPars->fVerbose )
Cec_MiterStatusPrint( Status, "SAT ", clock() - clk );
if ( Status.nSat && pParsSat->fFirstStop )
break;
if ( Status.nUndec == 0 )
break;
*/
Cec_ManCswSetDefaultParams( pParsCsw );
pCaig = Caig_ManClassesPrepare( pMiter, pParsCsw->nWords, pParsCsw->nRounds );
for ( i = 0; i < pPars->nIters; i++ )
{
Cec_ManSatSweepInt( pCaig, pParsCsw );
i = i;
}
Caig_ManDelete( pCaig );
Aig_ManStop( pMiter );
return 1;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

208
src/aig/cec2/cecInt.h Normal file
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@ -0,0 +1,208 @@
/**CFile****************************************************************
FileName [cecInt.h]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis [External declarations.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cecInt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#ifndef __CEC_INT_H__
#define __CEC_INT_H__
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
#include "aig.h"
#include "satSolver.h"
#include "bar.h"
#include "cec.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
typedef struct Cec_ManSat_t_ Cec_ManSat_t;
struct Cec_ManSat_t_
{
// parameters
Cec_ParSat_t * pPars;
// AIGs used in the package
Aig_Man_t * pAig; // the AIG whose outputs are considered
Vec_Int_t * vStatus; // status for each output
// SAT solving
sat_solver * pSat; // recyclable SAT solver
int nSatVars; // the counter of SAT variables
int * pSatVars; // mapping of each node into its SAT var
Vec_Ptr_t * vUsedNodes; // nodes whose SAT vars are assigned
int nRecycles; // the number of times SAT solver was recycled
int nCallsSince; // the number of calls since the last recycle
Vec_Ptr_t * vFanins; // fanins of the CNF node
// SAT calls statistics
int nSatUnsat; // the number of proofs
int nSatSat; // the number of failure
int nSatUndec; // the number of timeouts
// runtime stats
int timeSatUnsat; // unsat
int timeSatSat; // sat
int timeSatUndec; // undecided
int timeTotal; // total runtime
};
typedef struct Cec_ManCec_t_ Cec_ManCec_t;
struct Cec_ManCec_t_
{
// parameters
Cec_ParCec_t * pPars;
// AIGs used in the package
Aig_Man_t * pAig; // the miter for equivalence checking
// mapping of PI/PO nodes
// counter-example
int * pCex; // counter-example
int iOutput; // the output for this counter-example
// statistics
};
typedef struct Cec_MtrStatus_t_ Cec_MtrStatus_t;
struct Cec_MtrStatus_t_
{
int nInputs; // the total number of inputs
int nNodes; // the total number of nodes
int nOutputs; // the total number of outputs
int nUnsat; // the number of UNSAT outputs
int nSat; // the number of SAT outputs
int nUndec; // the number of undecided outputs
int iOut; // the satisfied output
};
// combinational simulation manager
typedef struct Caig_Man_t_ Caig_Man_t;
struct Caig_Man_t_
{
// parameters
Aig_Man_t * pAig; // the AIG to be used for simulation
int nWords; // the number of simulation words
// AIG representation
int nPis; // the number of primary inputs
int nPos; // the number of primary outputs
int nNodes; // the number of internal nodes
int nObjs; // nPis + nNodes + nPos + 1
int * pFans0; // fanin0 for all objects
int * pFans1; // fanin1 for all objects
// simulation info
int * pRefs; // reference counter for each node
unsigned * pSims; // simlulation information for each node
// recycable memory
unsigned * pMems; // allocated simulaton memory
int nWordsAlloc; // the number of allocated entries
int nMems; // the number of used entries
int nMemsMax; // the max number of used entries
int MemFree; // next ABC_FREE entry
// equivalence class representation
int * pReprs; // representatives of each node
int * pNexts; // nexts for each node
// temporaries
Vec_Ptr_t * vSims; // pointers to sim info
Vec_Int_t * vClassOld; // old class numbers
Vec_Int_t * vClassNew; // new class numbers
Vec_Int_t * vRefinedC; // refined const reprs
};
////////////////////////////////////////////////////////////////////////
/// MACRO DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
static inline int Cec_Var2Lit( int Var, int fCompl ) { return Var + Var + fCompl; }
static inline int Cec_Lit2Var( int Lit ) { return Lit >> 1; }
static inline int Cec_LitIsCompl( int Lit ) { return Lit & 1; }
static inline int Cec_LitNot( int Lit ) { return Lit ^ 1; }
static inline int Cec_LitNotCond( int Lit, int c ) { return Lit ^ (int)(c > 0); }
static inline int Cec_LitRegular( int Lit ) { return Lit & ~01; }
static inline int Cec_ObjSatNum( Cec_ManSat_t * p, Aig_Obj_t * pObj ) { return p->pSatVars[pObj->Id]; }
static inline void Cec_ObjSetSatNum( Cec_ManSat_t * p, Aig_Obj_t * pObj, int Num ) { p->pSatVars[pObj->Id] = Num; }
static inline Aig_Obj_t * Cec_ObjFraig( Aig_Obj_t * pObj ) { return pObj->pData; }
static inline void Cec_ObjSetFraig( Aig_Obj_t * pObj, Aig_Obj_t * pNode ) { pObj->pData = pNode; }
static inline int Cec_ObjIsConst1Cand( Aig_Man_t * pAig, Aig_Obj_t * pObj )
{
return Aig_ObjRepr(pAig, pObj) == Aig_ManConst1(pAig);
}
static inline void Cec_ObjSetConst1Cand( Aig_Man_t * pAig, Aig_Obj_t * pObj )
{
assert( !Cec_ObjIsConst1Cand( pAig, pObj ) );
Aig_ObjSetRepr( pAig, pObj, Aig_ManConst1(pAig) );
}
////////////////////////////////////////////////////////////////////////
/// FUNCTION DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
/*=== cecAig.c ==========================================================*/
extern Aig_Man_t * Cec_Duplicate( Aig_Man_t * p );
extern Aig_Man_t * Cec_DeriveMiter( Aig_Man_t * p0, Aig_Man_t * p1 );
/*=== cecClass.c ==========================================================*/
extern Aig_Man_t * Caig_ManSpecReduce( Caig_Man_t * p, int nLevels );
extern int Caig_ManCompareEqual( unsigned * p0, unsigned * p1, int nWords );
extern int Caig_ManCompareConst( unsigned * p, int nWords );
extern void Caig_ManCollectSimsNormal( Caig_Man_t * p, int i );
extern int Caig_ManClassRefineOne( Caig_Man_t * p, int i, Vec_Ptr_t * vSims );
extern void Caig_ManProcessRefined( Caig_Man_t * p, Vec_Int_t * vRefined );
extern void Caig_ManPrintClasses( Caig_Man_t * p, int fVerbose );
extern Caig_Man_t * Caig_ManClassesPrepare( Aig_Man_t * pAig, int nWords, int nIters );
/*=== cecCnf.c ==========================================================*/
extern void Cec_CnfNodeAddToSolver( Cec_ManSat_t * p, Aig_Obj_t * pObj );
/*=== cecSat.c ==========================================================*/
extern Cec_MtrStatus_t Cec_SatSolveOutputs( Aig_Man_t * pAig, Cec_ParSat_t * pPars );
/*=== cecSim.c ==========================================================*/
extern Caig_Man_t * Caig_ManCreate( Aig_Man_t * pAig );
extern void Caig_ManDelete( Caig_Man_t * p );
extern void Caig_ManSimMemRelink( Caig_Man_t * p );
extern unsigned * Caig_ManSimRead( Caig_Man_t * p, int i );
extern unsigned * Caig_ManSimRef( Caig_Man_t * p, int i );
extern unsigned * Caig_ManSimDeref( Caig_Man_t * p, int i );
extern void Caig_ManSimulateRound( Caig_Man_t * p, Vec_Ptr_t * vInfoCis, Vec_Ptr_t * vInfoCos );
extern int Cec_ManSimulate( Aig_Man_t * pAig, int nWords, int nIters, int TimeLimit, int fMiter, int fVerbose );
/*=== cecStatus.c ==========================================================*/
extern int Cec_OutputStatus( Aig_Man_t * p, Aig_Obj_t * pObj );
extern Cec_MtrStatus_t Cec_MiterStatus( Aig_Man_t * p );
extern Cec_MtrStatus_t Cec_MiterStatusTrivial( Aig_Man_t * p );
extern void Cec_MiterStatusPrint( Cec_MtrStatus_t S, char * pString, int Time );
/*=== cecSweep.c ==========================================================*/
extern void Cec_ManSatSweepInt( Caig_Man_t * pMan, Cec_ParCsw_t * pPars );
extern Aig_Man_t * Cec_ManSatSweep( Aig_Man_t * pAig, Cec_ParCsw_t * pPars );
#ifdef __cplusplus
}
#endif
#endif
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

59
src/aig/cec2/cecMan.c Normal file
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@ -0,0 +1,59 @@
/**CFile****************************************************************
FileName [cecMan.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis [Manager pcocures.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cecMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cecInt.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

10
src/aig/cec/cecSat.c → src/aig/cec2/cecSat.c
View File

@ -43,13 +43,13 @@ Cec_ManSat_t * Cec_ManCreate( Aig_Man_t * pAig, Cec_ParSat_t * pPars )
{
Cec_ManSat_t * p;
// create interpolation manager
p = ALLOC( Cec_ManSat_t, 1 );
p = ABC_ALLOC( Cec_ManSat_t, 1 );
memset( p, 0, sizeof(Cec_ManSat_t) );
p->pPars = pPars;
p->pAig = pAig;
// SAT solving
p->nSatVars = 1;
p->pSatVars = CALLOC( int, Aig_ManObjNumMax(pAig) );
p->pSatVars = ABC_CALLOC( int, Aig_ManObjNumMax(pAig) );
p->vUsedNodes = Vec_PtrAlloc( 1000 );
p->vFanins = Vec_PtrAlloc( 100 );
return p;
@ -72,8 +72,8 @@ void Cec_ManStop( Cec_ManSat_t * p )
sat_solver_delete( p->pSat );
Vec_PtrFree( p->vUsedNodes );
Vec_PtrFree( p->vFanins );
FREE( p->pSatVars );
free( p );
ABC_FREE( p->pSatVars );
ABC_FREE( p );
}
/**Function*************************************************************
@ -165,7 +165,7 @@ int Cec_ManSatCheckNode( Cec_ManSat_t * p, Aig_Obj_t * pNode )
//Sat_SolverWriteDimacs( p->pSat, "temp.cnf", pLits, pLits + 2, 1 );
clk = clock();
RetValue = sat_solver_solve( p->pSat, &Lit, &Lit + 1,
(sint64)nBTLimit, (sint64)0, (sint64)0, (sint64)0 );
(ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
if ( RetValue == l_False )
{
p->timeSatUnsat += clock() - clk;

284
src/aig/cec2/cecSat2.c Normal file
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@ -0,0 +1,284 @@
/**CFile****************************************************************
FileName [cecSat.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinational equivalence checking.]
Synopsis [Backend calling the SAT solver.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 30, 2007.]
Revision [$Id: cecSat.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
***********************************************************************/
#include "aig.h"
#include "cnf.h"
#include "../../sat/lsat/solver.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Writes CNF into a file.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
solver * Cnf_WriteIntoSolverNew( Cnf_Dat_t * p )
{
solver * pSat;
int i, status;
pSat = solver_new();
for ( i = 0; i < p->nVars; i++ )
solver_newVar( pSat );
for ( i = 0; i < p->nClauses; i++ )
{
if ( !solver_addClause( pSat, p->pClauses[i+1]-p->pClauses[i], p->pClauses[i] ) )
{
solver_delete( pSat );
return NULL;
}
}
status = solver_simplify(pSat);
if ( status == 0 )
{
solver_delete( pSat );
return NULL;
}
return pSat;
}
/**Function*************************************************************
Synopsis [Adds the OR-clause.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cnf_DataWriteAndClausesNew( void * p, Cnf_Dat_t * pCnf )
{
/*
sat_solver * pSat = p;
Aig_Obj_t * pObj;
int i, Lit;
Aig_ManForEachPo( pCnf->pMan, pObj, i )
{
Lit = toLitCond( pCnf->pVarNums[pObj->Id], 0 );
if ( !sat_solver_addclause( pSat, &Lit, &Lit+1 ) )
return 0;
}
*/
return 1;
}
/**Function*************************************************************
Synopsis [Adds the OR-clause.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cnf_DataWriteOrClauseNew( solver * pSat, Cnf_Dat_t * pCnf )
{
Aig_Obj_t * pObj;
int i, * pLits;
pLits = ALLOC( int, Aig_ManPoNum(pCnf->pMan) );
Aig_ManForEachPo( pCnf->pMan, pObj, i )
pLits[i] = solver_mkLit_args( pCnf->pVarNums[pObj->Id], 0 );
if ( !solver_addClause( pSat, Aig_ManPoNum(pCnf->pMan), pLits ) )
{
free( pLits );
return 0;
}
free( pLits );
return 1;
}
/**Function*************************************************************
Synopsis [Writes the given clause in a file in DIMACS format.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Sat_SolverPrintStatsNew( FILE * pFile, solver * pSat )
{
// printf( "starts : %8d\n", solver_num_assigns(pSat) );
printf( "vars : %8d\n", solver_num_vars(pSat) );
printf( "clauses : %8d\n", solver_num_clauses(pSat) );
printf( "conflicts : %8d\n", solver_num_learnts(pSat) );
}
/**Function*************************************************************
Synopsis [Returns a counter-example.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int * Sat_SolverGetModelNew( solver * pSat, int * pVars, int nVars )
{
int * pModel;
int i;
pModel = ALLOC( int, nVars+1 );
for ( i = 0; i < nVars; i++ )
{
assert( pVars[i] >= 0 && pVars[i] < solver_num_vars(pSat) );
pModel[i] = (int)(solver_modelValue_Var( pSat, pVars[i] ) == solver_l_True);
}
return pModel;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_RunSat( Aig_Man_t * pMan, sint64 nConfLimit, sint64 nInsLimit, int fFlipBits, int fAndOuts, int fVerbose )
{
solver * pSat;
Cnf_Dat_t * pCnf;
int status, RetValue, clk = clock();
Vec_Int_t * vCiIds;
assert( Aig_ManRegNum(pMan) == 0 );
pMan->pData = NULL;
// derive CNF
pCnf = Cnf_Derive( pMan, Aig_ManPoNum(pMan) );
// pCnf = Cnf_DeriveSimple( pMan, Aig_ManPoNum(pMan) );
// convert into SAT solver
pSat = Cnf_WriteIntoSolverNew( pCnf );
if ( pSat == NULL )
{
Cnf_DataFree( pCnf );
return 1;
}
if ( fAndOuts )
{
assert( 0 );
// assert each output independently
if ( !Cnf_DataWriteAndClausesNew( pSat, pCnf ) )
{
solver_delete( pSat );
Cnf_DataFree( pCnf );
return 1;
}
}
else
{
// add the OR clause for the outputs
if ( !Cnf_DataWriteOrClauseNew( pSat, pCnf ) )
{
solver_delete( pSat );
Cnf_DataFree( pCnf );
return 1;
}
}
vCiIds = Cnf_DataCollectPiSatNums( pCnf, pMan );
Cnf_DataFree( pCnf );
// printf( "Created SAT problem with %d variable and %d clauses. ", sat_solver_nvars(pSat), sat_solver_nclauses(pSat) );
// PRT( "Time", clock() - clk );
// simplify the problem
clk = clock();
status = solver_simplify(pSat);
// printf( "Simplified the problem to %d variables and %d clauses. ", sat_solver_nvars(pSat), sat_solver_nclauses(pSat) );
// PRT( "Time", clock() - clk );
if ( status == 0 )
{
Vec_IntFree( vCiIds );
solver_delete( pSat );
// printf( "The problem is UNSATISFIABLE after simplification.\n" );
return 1;
}
// solve the miter
clk = clock();
if ( fVerbose )
solver_set_verbosity( pSat, 1 );
status = solver_solve( pSat, 0, NULL );
if ( status == solver_l_Undef )
{
// printf( "The problem timed out.\n" );
RetValue = -1;
}
else if ( status == solver_l_True )
{
// printf( "The problem is SATISFIABLE.\n" );
RetValue = 0;
}
else if ( status == solver_l_False )
{
// printf( "The problem is UNSATISFIABLE.\n" );
RetValue = 1;
}
else
assert( 0 );
// PRT( "SAT sat_solver time", clock() - clk );
// printf( "The number of conflicts = %d.\n", (int)pSat->sat_solver_stats.conflicts );
// if the problem is SAT, get the counterexample
if ( status == solver_l_True )
{
pMan->pData = Sat_SolverGetModelNew( pSat, vCiIds->pArray, vCiIds->nSize );
}
// free the sat_solver
if ( fVerbose )
Sat_SolverPrintStatsNew( stdout, pSat );
//sat_solver_store_write( pSat, "trace.cnf" );
//sat_solver_store_free( pSat );
solver_delete( pSat );
Vec_IntFree( vCiIds );
return RetValue;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

384
src/aig/cec/cecSim.c → src/aig/cec2/cecSim.c
View File

@ -28,113 +28,6 @@
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Count PIs with fanout.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Caig_ManCountRelevantPis( Aig_Man_t * pAig )
{
Aig_Obj_t * pObj;
int i, Counter = 0;
Aig_ManForEachPi( pAig, pObj, i )
if ( Aig_ObjRefs(pObj) )
Counter++;
else
pObj->iData = -1;
return Counter;
}
/**Function*************************************************************
Synopsis [Count PIs with fanout.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Caig_ManCountRelevantPos( Aig_Man_t * pAig )
{
Aig_Obj_t * pObj;
int i, Counter = 0;
Aig_ManForEachPo( pAig, pObj, i )
if ( !Aig_ObjIsConst1(Aig_ObjFanin0(pObj)) )
Counter++;
else
pObj->iData = -1;
return Counter;
}
/**Function*************************************************************
Synopsis [Find the PO corresponding to the PO driver.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Caig_ManFindPo( Aig_Man_t * pAig, int iNode )
{
Aig_Obj_t * pObj;
int i;
Aig_ManForEachPo( pAig, pObj, i )
if ( pObj->iData == iNode )
return i;
return -1;
}
/**Function*************************************************************
Synopsis [Creates fast simulation manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Caig_ManCreate_rec( Caig_Man_t * p, Aig_Obj_t * pObj )
{
int iFan0, iFan1;
assert( !Aig_IsComplement(pObj) );
assert( !Aig_ObjIsConst1(pObj) );
if ( pObj->iData )
return pObj->iData;
if ( Aig_ObjIsNode(pObj) )
{
iFan0 = Caig_ManCreate_rec( p, Aig_ObjFanin0(pObj) );
iFan0 = (iFan0 << 1) | Aig_ObjFaninC0(pObj);
iFan1 = Caig_ManCreate_rec( p, Aig_ObjFanin1(pObj) );
iFan1 = (iFan1 << 1) | Aig_ObjFaninC1(pObj);
}
else if ( Aig_ObjIsPo(pObj) )
{
iFan0 = Caig_ManCreate_rec( p, Aig_ObjFanin0(pObj) );
iFan0 = (iFan0 << 1) | Aig_ObjFaninC0(pObj);
iFan1 = 0;
}
else
iFan0 = iFan1 = 0;
assert( Aig_ObjRefs(pObj) < (1<<16) );
p->pFans0[p->nObjs] = iFan0;
p->pFans1[p->nObjs] = iFan1;
p->pRefs[p->nObjs] = (unsigned short)Aig_ObjRefs(pObj);
return pObj->iData = p->nObjs++;
}
/**Function*************************************************************
Synopsis [Creates fast simulation manager.]
@ -150,25 +43,46 @@ Caig_Man_t * Caig_ManCreate( Aig_Man_t * pAig )
{
Caig_Man_t * p;
Aig_Obj_t * pObj;
int i, nObjs;
int i;
assert( Aig_ManHasNoGaps(pAig) );
Aig_ManCleanData( pAig );
p = (Caig_Man_t *)ALLOC( Caig_Man_t, 1 );
p = (Caig_Man_t *)ABC_ALLOC( Caig_Man_t, 1 );
memset( p, 0, sizeof(Caig_Man_t) );
p->pAig = pAig;
p->nPis = Caig_ManCountRelevantPis(pAig);
p->nPos = Caig_ManCountRelevantPos(pAig);
p->nPis = Aig_ManPiNum(pAig);
p->nPos = Aig_ManPoNum(pAig);
p->nNodes = Aig_ManNodeNum(pAig);
nObjs = p->nPis + p->nPos + p->nNodes + 1;
p->pFans0 = ALLOC( int, nObjs );
p->pFans1 = ALLOC( int, nObjs );
p->pRefs = ALLOC( unsigned short, nObjs );
p->pSims = CALLOC( unsigned, nObjs );
p->nObjs = p->nPis + p->nPos + p->nNodes + 1;
p->pFans0 = ABC_ALLOC( int, p->nObjs );
p->pFans1 = ABC_ALLOC( int, p->nObjs );
p->pRefs = ABC_ALLOC( int, p->nObjs );
p->pSims = ABC_CALLOC( unsigned, p->nObjs );
// add objects
p->nObjs = 1;
Aig_ManForEachPo( pAig, pObj, i )
if ( !Aig_ObjIsConst1(Aig_ObjFanin0(pObj)) )
Caig_ManCreate_rec( p, pObj );
assert( p->nObjs == nObjs );
Aig_ManForEachObj( pAig, pObj, i )
{
p->pRefs[i] = Aig_ObjRefs(pObj);
if ( Aig_ObjIsNode(pObj) )
{
p->pFans0[i] = (Aig_ObjFaninId0(pObj) << 1) | Aig_ObjFaninC0(pObj);
p->pFans1[i] = (Aig_ObjFaninId1(pObj) << 1) | Aig_ObjFaninC1(pObj);
}
else if ( Aig_ObjIsPo(pObj) )
{
p->pFans0[i] = (Aig_ObjFaninId0(pObj) << 1) | Aig_ObjFaninC0(pObj);
p->pFans1[i] = -1;
}
else
{
assert( Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) );
p->pFans0[i] = -1;
p->pFans1[i] = -1;
}
}
// temporaries
p->vClassOld = Vec_IntAlloc( 1000 );
p->vClassNew = Vec_IntAlloc( 1000 );
p->vRefinedC = Vec_IntAlloc( 10000 );
p->vSims = Vec_PtrAlloc( 1000 );
return p;
}
@ -185,17 +99,43 @@ Caig_Man_t * Caig_ManCreate( Aig_Man_t * pAig )
***********************************************************************/
void Caig_ManDelete( Caig_Man_t * p )
{
if ( p->vSims ) Vec_PtrFree( p->vSims );
if ( p->vClassOld ) Vec_IntFree( p->vClassOld );
if ( p->vClassNew ) Vec_IntFree( p->vClassNew );
FREE( p->pFans0 );
FREE( p->pFans1 );
FREE( p->pRefs );
FREE( p->pSims );
FREE( p->pMems );
FREE( p->pReprs );
FREE( p->pNexts );
FREE( p );
Vec_IntFree( p->vClassOld );
Vec_IntFree( p->vClassNew );
Vec_IntFree( p->vRefinedC );
Vec_PtrFree( p->vSims );
ABC_FREE( p->pFans0 );
ABC_FREE( p->pFans1 );
ABC_FREE( p->pRefs );
ABC_FREE( p->pSims );
ABC_FREE( p->pMems );
ABC_FREE( p->pReprs );
ABC_FREE( p->pNexts );
ABC_FREE( p );
}
/**Function*************************************************************
Synopsis [References simulation info.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Caig_ManSimMemRelink( Caig_Man_t * p )
{
int * pPlace, Ent;
pPlace = &p->MemFree;
for ( Ent = p->nMems * (p->nWords + 1);
Ent + p->nWords + 1 < p->nWordsAlloc;
Ent += p->nWords + 1 )
{
*pPlace = Ent;
pPlace = p->pMems + Ent;
}
*pPlace = 0;
}
/**Function*************************************************************
@ -229,11 +169,9 @@ unsigned * Caig_ManSimRead( Caig_Man_t * p, int i )
unsigned * Caig_ManSimRef( Caig_Man_t * p, int i )
{
unsigned * pSim;
assert( i );
assert( p->pSims[i] == 0 );
if ( p->MemFree == 0 )
{
int * pPlace, Ent;
if ( p->nWordsAlloc == 0 )
{
assert( p->pMems == NULL );
@ -241,16 +179,8 @@ unsigned * Caig_ManSimRef( Caig_Man_t * p, int i )
p->nMems = 1;
}
p->nWordsAlloc *= 2;
p->pMems = REALLOC( unsigned, p->pMems, p->nWordsAlloc );
pPlace = &p->MemFree;
for ( Ent = p->nMems * (p->nWords + 1);
Ent + p->nWords + 1 < p->nWordsAlloc;
Ent += p->nWords + 1 )
{
*pPlace = Ent;
pPlace = p->pMems + Ent;
}
*pPlace = 0;
p->pMems = ABC_REALLOC( unsigned, p->pMems, p->nWordsAlloc );
Caig_ManSimMemRelink( p );
}
p->pSims[i] = p->MemFree;
pSim = p->pMems + p->MemFree;
@ -276,7 +206,6 @@ unsigned * Caig_ManSimRef( Caig_Man_t * p, int i )
unsigned * Caig_ManSimDeref( Caig_Man_t * p, int i )
{
unsigned * pSim;
assert( i );
assert( p->pSims[i] > 0 );
pSim = p->pMems + p->pSims[i];
if ( --pSim[0] == 0 )
@ -300,71 +229,94 @@ unsigned * Caig_ManSimDeref( Caig_Man_t * p, int i )
SeeAlso []
***********************************************************************/
int Caig_ManSimulateRound( Caig_Man_t * p, int fMiter )
void Caig_ManSimulateRound( Caig_Man_t * p, Vec_Ptr_t * vInfoCis, Vec_Ptr_t * vInfoCos )
{
Vec_Int_t * vRefined = NULL;
unsigned * pRes0, * pRes1, * pRes;
int i, w, iFan0, iFan1;
if ( p->pReprs )
vRefined = Vec_IntAlloc( 1000 );
int i, w, iCiId = 0, iCoId = 0;
int nWords = Vec_PtrReadWordsSimInfo( vInfoCis );
assert( vInfoCos == NULL || nWords == Vec_PtrReadWordsSimInfo(vInfoCos) );
Vec_IntClear( p->vRefinedC );
if ( p->pRefs[0] )
{
pRes = Caig_ManSimRef( p, 0 );
for ( w = 1; w <= nWords; w++ )
pRes[w] = ~0;
}
for ( i = 1; i < p->nObjs; i++ )
{
if ( p->pFans0[i] == 0 ) // pi always has zero first fanin
if ( p->pFans0[i] == -1 ) // ci always has zero first fanin
{
if ( p->pRefs[i] == 0 )
{
iCiId++;
continue;
}
pRes = Caig_ManSimRef( p, i );
for ( w = 1; w <= p->nWords; w++ )
pRes[w] = Aig_ManRandom( 0 );
pRes0 = Vec_PtrEntry( vInfoCis, iCiId++ );
for ( w = 1; w <= nWords; w++ )
pRes[w] = pRes0[w-1];
goto references;
}
if ( p->pFans1[i] == 0 ) // po always has non-zero 1st fanin and zero 2nd fanin
if ( p->pFans1[i] == -1 ) // co always has non-zero 1st fanin and zero 2nd fanin
{
if ( fMiter )
pRes0 = Caig_ManSimDeref( p, Cec_Lit2Var(p->pFans0[i]) );
if ( vInfoCos )
{
unsigned Const = Cec_LitIsCompl(p->pFans0[i])? ~0 : 0;
pRes0 = Caig_ManSimDeref( p, Cec_Lit2Var(p->pFans0[i]) );
for ( w = 1; w <= p->nWords; w++ )
if ( pRes0[w] != Const )
return i;
pRes = Vec_PtrEntry( vInfoCos, iCoId++ );
if ( Cec_LitIsCompl(p->pFans0[i]) )
for ( w = 1; w <= nWords; w++ )
pRes[w-1] = ~pRes0[w];
else
for ( w = 1; w <= nWords; w++ )
pRes[w-1] = pRes0[w];
}
continue;
}
pRes = Caig_ManSimRef( p, i );
iFan0 = p->pFans0[i];
iFan1 = p->pFans1[i];
assert( p->pRefs[i] );
pRes = Caig_ManSimRef( p, i );
pRes0 = Caig_ManSimDeref( p, Cec_Lit2Var(p->pFans0[i]) );
pRes1 = Caig_ManSimDeref( p, Cec_Lit2Var(p->pFans1[i]) );
if ( Cec_LitIsCompl(iFan0) && Cec_LitIsCompl(iFan1) )
for ( w = 1; w <= p->nWords; w++ )
pRes[w] = ~(pRes0[w] | pRes1[w]);
else if ( Cec_LitIsCompl(iFan0) && !Cec_LitIsCompl(iFan1) )
for ( w = 1; w <= p->nWords; w++ )
pRes[w] = ~pRes0[w] & pRes1[w];
else if ( !Cec_LitIsCompl(iFan0) && Cec_LitIsCompl(iFan1) )
for ( w = 1; w <= p->nWords; w++ )
pRes[w] = pRes0[w] & ~pRes1[w];
else if ( !Cec_LitIsCompl(iFan0) && !Cec_LitIsCompl(iFan1) )
for ( w = 1; w <= p->nWords; w++ )
pRes[w] = pRes0[w] & pRes1[w];
if ( Cec_LitIsCompl(p->pFans0[i]) )
{
if ( Cec_LitIsCompl(p->pFans1[i]) )
for ( w = 1; w <= nWords; w++ )
pRes[w] = ~(pRes0[w] | pRes1[w]);
else
for ( w = 1; w <= nWords; w++ )
pRes[w] = ~pRes0[w] & pRes1[w];
}
else
{
if ( Cec_LitIsCompl(p->pFans1[i]) )
for ( w = 1; w <= nWords; w++ )
pRes[w] = pRes0[w] & ~pRes1[w];
else
for ( w = 1; w <= nWords; w++ )
pRes[w] = pRes0[w] & pRes1[w];
}
references:
if ( p->pReprs == NULL )
continue;
// if this node is candidate constant, collect it
if ( p->pReprs[i] == 0 && !Caig_ManCompareConst(pRes + 1, p->nWords) )
if ( p->pReprs[i] == 0 && !Caig_ManCompareConst(pRes + 1, nWords) )
{
pRes[0]++;
Vec_IntPush( vRefined, i );
Vec_IntPush( p->vRefinedC, i );
}
// if the node belongs to a class, save it
if ( p->pReprs[i] > 0 || p->pNexts[i] > 0 )
pRes[0]++;
// if this is the last node of the class, process it
if ( p->pReprs[i] > 0 && p->pNexts[i] == 0 )
Caig_ManProcessClass( p, p->pReprs[i] );
{
Caig_ManCollectSimsNormal( p, p->pReprs[i] );
Caig_ManClassRefineOne( p, p->pReprs[i], p->vSims );
}
}
if ( p->pReprs )
Caig_ManProcessRefined( p, vRefined );
if ( p->pReprs )
Vec_IntFree( vRefined );
if ( Vec_IntSize(p->vRefinedC) > 0 )
Caig_ManProcessRefined( p, p->vRefinedC );
assert( iCiId == p->nPis );
assert( vInfoCos == NULL || iCoId == p->nPos );
assert( p->nMems == 1 );
/*
if ( p->nMems > 1 )
@ -376,7 +328,28 @@ references:
}
}
*/
return 0;
}
/**Function*************************************************************
Synopsis [Returns the number of PO that failed.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ManFindPo( Vec_Ptr_t * vInfo, int nWords )
{
unsigned * pInfo;
int i, w;
Vec_PtrForEachEntry( vInfo, pInfo, i )
for ( w = 0; w < nWords; w++ )
if ( pInfo[w] != 0 )
return i;
return -1;
}
/**Function*************************************************************
@ -394,6 +367,7 @@ int Cec_ManSimulate( Aig_Man_t * pAig, int nWords, int nIters, int TimeLimit, in
{
Caig_Man_t * p;
Cec_MtrStatus_t Status;
Vec_Ptr_t * vInfoCis, * vInfoCos = NULL;
int i, RetValue = 0, clk, clkTotal = clock();
/*
p = Caig_ManClassesPrepare( pAig, nWords, nIters );
@ -405,35 +379,47 @@ int Cec_ManSimulate( Aig_Man_t * pAig, int nWords, int nIters, int TimeLimit, in
Caig_ManDelete( p );
return 0;
*/
Status = Cec_MiterStatus( pAig );
if ( Status.nSat > 0 )
if ( fMiter )
{
printf( "Miter is trivially satisfiable (output %d).\n", Status.iOut );
return 1;
}
if ( Status.nUndec == 0 )
{
printf( "Miter is trivially unsatisfiable.\n" );
return 0;
Status = Cec_MiterStatus( pAig );
if ( Status.nSat > 0 )
{
printf( "Miter is trivially satisfiable (output %d).\n", Status.iOut );
return 1;
}
if ( Status.nUndec == 0 )
{
printf( "Miter is trivially unsatisfiable.\n" );
return 0;
}
}
Aig_ManRandom( 1 );
p = Caig_ManCreate( pAig );
p->nWords = nWords;
if ( fMiter )
vInfoCos = Vec_PtrAllocSimInfo( Aig_ManPiNum(pAig), nWords );
for ( i = 0; i < nIters; i++ )
{
clk = clock();
RetValue = Caig_ManSimulateRound( p, fMiter );
vInfoCis = Vec_PtrAllocSimInfo( Aig_ManPiNum(pAig), nWords );
Aig_ManRandomInfo( vInfoCis, 0, nWords );
Caig_ManSimulateRound( p, vInfoCis, vInfoCos );
Vec_PtrFree( vInfoCis );
if ( fVerbose )
{
printf( "Iter %3d out of %3d and timeout %3d sec. ", i+1, nIters, TimeLimit );
printf("Time = %7.2f sec\r", (1.0*clock()-clkTotal)/CLOCKS_PER_SEC);
}
if ( RetValue > 0 )
if ( fMiter )
{
int iOut = Caig_ManFindPo(p->pAig, RetValue);
if ( fVerbose )
printf( "Miter is satisfiable after simulation (output %d).\n", iOut );
break;
int iOut = Cec_ManFindPo( vInfoCos, nWords );
if ( iOut >= 0 )
{
if ( fVerbose )
printf( "Miter is satisfiable after simulation (output %d).\n", iOut );
RetValue = 1;
break;
}
}
if ( (clock() - clk)/CLOCKS_PER_SEC >= TimeLimit )
{
@ -447,6 +433,8 @@ int Cec_ManSimulate( Aig_Man_t * pAig, int nWords, int nIters, int TimeLimit, in
1.0*(p->nObjs * 14)/(1<<20),
1.0*(p->nMemsMax * 4 * (nWords+1))/(1<<20) );
Caig_ManDelete( p );
if ( vInfoCos )
Vec_PtrFree( vInfoCos );
return RetValue > 0;
}

0
src/aig/cec/cecStatus.c → src/aig/cec2/cecStatus.c
View File

582
src/aig/cec2/cecSweep.c Normal file
View File

@ -0,0 +1,582 @@
/**CFile****************************************************************
FileName [cecSweep.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Combinatinoal equivalence checking.]
Synopsis [Pattern accumulation.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: cecSweep.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cecInt.h"
#include "satSolver.h"
#include "cnf.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
typedef struct Cec_ManCsw_t_ Cec_ManCsw_t;
struct Cec_ManCsw_t_
{
// parameters
Cec_ParCsw_t * pPars; // parameters
Caig_Man_t * p; // AIG and simulation manager
// mapping into copy
Aig_Obj_t ** pCopy; // the copy of nodes
Vec_Int_t * vCopies; // the nodes copied in the last round
char * pProved; // tells if the given node is proved
char * pProvedNow; // tells if the given node is proved
int * pLevel; // level of the nodes
// collected patterns
Vec_Ptr_t * vInfo; // simulation info accumulated
Vec_Ptr_t * vPres; // simulation presence accumulated
Vec_Ptr_t * vInfoAll; // vector of vectors of simulation info
// temporaries
Vec_Int_t * vPiNums; // primary input numbers
Vec_Int_t * vPoNums; // primary output numbers
Vec_Int_t * vPat; // one counter-example
Vec_Ptr_t * vSupp; // support of one node
};
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Adds pattern to storage.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSavePattern( Cec_ManCsw_t * p, Vec_Int_t * vPat )
{
unsigned * pInfo, * pPres;
int nPatsAlloc, iLit, i, c;
assert( p->p->nWords == Vec_PtrReadWordsSimInfo(p->vInfo) );
// find next empty place
nPatsAlloc = 32 * p->p->nWords;
for ( c = 0; c < nPatsAlloc; c++ )
{
Vec_IntForEachEntry( vPat, iLit, i )
{
pPres = Vec_PtrEntry( p->vPres, Cec_Lit2Var(iLit) );
if ( Aig_InfoHasBit( pPres, c ) )
break;
}
if ( i == Vec_IntSize(vPat) )
break;
}
// increase the size if needed
if ( c == nPatsAlloc )
{
p->vInfo = Vec_PtrAllocSimInfo( p->p->nPis, p->p->nWords );
Vec_PtrCleanSimInfo( p->vInfo, 0, p->p->nWords );
Vec_PtrCleanSimInfo( p->vPres, 0, p->p->nWords );
Vec_PtrPush( p->vInfoAll, p->vInfo );
c = 0;
}
// save the pattern
Vec_IntForEachEntry( vPat, iLit, i )
{
pPres = Vec_PtrEntry( p->vPres, Cec_Lit2Var(iLit) );
pInfo = Vec_PtrEntry( p->vInfo, Cec_Lit2Var(iLit) );
Aig_InfoSetBit( pPres, c );
if ( !Cec_LitIsCompl(iLit) )
Aig_InfoSetBit( pInfo, c );
}
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Obj_t * Cec_ManCswCreatePartition_rec( Aig_Man_t * pAig, Cec_ManCsw_t * p, int i )
{
Aig_Obj_t * pRes0, * pRes1;
if ( p->pCopy[i] )
return p->pCopy[i];
Vec_IntPush( p->vCopies, i );
if ( p->p->pFans0[i] == -1 ) // pi
{
Vec_IntPush( p->vPiNums, Aig_ObjPioNum( Aig_ManObj(p->p->pAig, i) ) );
return p->pCopy[i] = Aig_ObjCreatePi( pAig );
}
assert( p->p->pFans0[i] && p->p->pFans1[i] );
pRes0 = Cec_ManCswCreatePartition_rec( pAig, p, Cec_Lit2Var(p->p->pFans0[i]) );
pRes0 = Aig_NotCond( pRes0, Cec_LitIsCompl(p->p->pFans0[i]) );
pRes1 = Cec_ManCswCreatePartition_rec( pAig, p, Cec_Lit2Var(p->p->pFans1[i]) );
pRes1 = Aig_NotCond( pRes1, Cec_LitIsCompl(p->p->pFans1[i]) );
return p->pCopy[i] = Aig_And( pAig, pRes0, pRes1 );
}
/**Function*************************************************************
Synopsis [Creates dynamic partition.]
Description [PIs point to node IDs. POs point to node IDs.]
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Cec_ManCswCreatePartition( Cec_ManCsw_t * p, int * piStart, int nMitersMin, int nNodesMin, int nLevelMax )
{
Caig_Man_t * pMan = p->p;
Aig_Man_t * pAig;
Aig_Obj_t * pRepr, * pNode, * pMiter, * pTerm;
int i, iNode, Counter = 0;
assert( p->pCopy && p->vCopies );
// clear previous marks
Vec_IntForEachEntry( p->vCopies, iNode, i )
p->pCopy[iNode] = NULL;
Vec_IntClear( p->vCopies );
// iterate through nodes starting from the given one
pAig = Aig_ManStart( nNodesMin );
p->pCopy[0] = Aig_ManConst1(pAig);
Vec_IntPush( p->vCopies, 0 );
for ( i = *piStart; i < pMan->nObjs; i++ )
{
if ( pMan->pFans0[i] == -1 ) // pi always has zero first fanin
continue;
if ( pMan->pFans1[i] == -1 ) // po always has non-zero 1st fanin and zero 2nd fanin
continue;
if ( pMan->pReprs[i] < 0 )
continue;
if ( p->pPars->nLevelMax && (p->pLevel[i] > p->pPars->nLevelMax || p->pLevel[pMan->pReprs[i]] > p->pPars->nLevelMax) )
continue;
// create cones
pRepr = Cec_ManCswCreatePartition_rec( pAig, p, pMan->pReprs[i] );
pNode = Cec_ManCswCreatePartition_rec( pAig, p, i );
// skip if they are the same
if ( Aig_Regular(pRepr) == Aig_Regular(pNode) )
{
p->pProvedNow[i] = 1;
continue;
}
// perform speculative reduction
assert( p->pCopy[i] == pNode );
p->pCopy[i] = Aig_NotCond( pRepr, Aig_ObjPhaseReal(pRepr) ^ Aig_ObjPhaseReal(pNode) );
if ( p->pProved[i] )
{
p->pProvedNow[i] = 1;
continue;
}
pMiter = Aig_Exor( pAig, pRepr, pNode );
pTerm = Aig_ObjCreatePo( pAig, Aig_NotCond(pMiter, Aig_ObjPhaseReal(pMiter)) );
Vec_IntPush( p->vPoNums, i );
if ( ++Counter > nMitersMin && Aig_ManObjNum(pAig) > nNodesMin )
break;
}
*piStart = i + 1;
Aig_ManSetRegNum( pAig, 0 );
Aig_ManCleanup( pAig );
return pAig;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSatDerivePattern( Cec_ManCsw_t * p, Aig_Man_t * pAig, Aig_Obj_t * pRoot, Cnf_Dat_t * pCnf, sat_solver * pSat )
{
Aig_Obj_t * pObj;
int i, Value, iVar;
assert( Aig_ObjIsPo(pRoot) );
Aig_SupportNodes( pAig, &pRoot, 1, p->vSupp );
Vec_IntClear( p->vPat );
Vec_PtrForEachEntry( p->vSupp, pObj, i )
{
assert( Aig_ObjIsPi(pObj) );
Value = sat_solver_var_value( pSat, pCnf->pVarNums[pObj->Id] );
iVar = Vec_IntEntry( p->vPiNums, Aig_ObjPioNum(pObj) );
assert( iVar >= 0 && iVar < p->p->nPis );
Vec_IntPush( p->vPat, Cec_Var2Lit( iVar, !Value ) );
}
}
/**Function*************************************************************
Synopsis [Creates level.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManCreateLevel( Cec_ManCsw_t * p )
{
Aig_Obj_t * pObj;
int i;
assert( p->pLevel == NULL );
p->pLevel = ABC_ALLOC( int, p->p->nObjs );
Aig_ManForEachObj( p->p->pAig, pObj, i )
p->pLevel[i] = Aig_ObjLevel(pObj);
}
/**Function*************************************************************
Synopsis [Creates the manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Cec_ManCsw_t * Cec_ManCswCreate( Caig_Man_t * pMan, Cec_ParCsw_t * pPars )
{
Cec_ManCsw_t * p;
// create interpolation manager
p = ABC_ALLOC( Cec_ManCsw_t, 1 );
memset( p, 0, sizeof(Cec_ManCsw_t) );
p->pPars = pPars;
p->p = pMan;
// internal storage
p->vCopies = Vec_IntAlloc( 10000 );
p->pCopy = ABC_CALLOC( Aig_Obj_t *, pMan->nObjs );
p->pProved = ABC_CALLOC( char, pMan->nObjs );
p->pProvedNow = ABC_CALLOC( char, pMan->nObjs );
// temporaries
p->vPat = Vec_IntAlloc( 1000 );
p->vSupp = Vec_PtrAlloc( 1000 );
p->vPiNums = Vec_IntAlloc( 1000 );
p->vPoNums = Vec_IntAlloc( 1000 );
if ( pPars->nLevelMax )
Cec_ManCreateLevel( p );
return p;
}
/**Function*************************************************************
Synopsis [Frees the manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManCswStop( Cec_ManCsw_t * p )
{
Vec_IntFree( p->vPiNums );
Vec_IntFree( p->vPoNums );
Vec_PtrFree( p->vSupp );
Vec_IntFree( p->vPat );
Vec_IntFree( p->vCopies );
Vec_PtrFree( p->vPres );
Vec_VecFree( (Vec_Vec_t *)p->vInfoAll );
ABC_FREE( p->pLevel );
ABC_FREE( p->pCopy );
ABC_FREE( p->pProved );
ABC_FREE( p->pProvedNow );
ABC_FREE( p );
}
/**Function*************************************************************
Synopsis [Cleans the manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManCleanSimInfo( Cec_ManCsw_t * p )
{
if ( p->vInfoAll )
Vec_VecFree( (Vec_Vec_t *)p->vInfoAll );
if ( p->vPres )
Vec_PtrFree( p->vPres );
p->vInfoAll = Vec_PtrAlloc( 100 );
p->vInfo = Vec_PtrAllocSimInfo( p->p->nPis, p->pPars->nWords );
p->vPres = Vec_PtrAllocSimInfo( p->p->nPis, p->pPars->nWords );
Vec_PtrCleanSimInfo( p->vInfo, 0, p->p->nWords );
Vec_PtrCleanSimInfo( p->vPres, 0, p->p->nWords );
Vec_PtrPush( p->vInfoAll, p->vInfo );
}
/**Function*************************************************************
Synopsis [Update information about proved nodes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ManCountProved( char * pArray, int nSize )
{
int i, Counter = 0;
for ( i = 0; i < nSize; i++ )
Counter += (pArray[i] == 1);
return Counter;
}
/**Function*************************************************************
Synopsis [Update information about proved nodes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ManCountDisproved( char * pArray, int nSize )
{
int i, Counter = 0;
for ( i = 0; i < nSize; i++ )
Counter += (pArray[i] == -1);
return Counter;
}
/**Function*************************************************************
Synopsis [Update information about proved nodes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cec_ManCountTimedout( char * pArray, int nSize )
{
int i, Counter = 0;
for ( i = 0; i < nSize; i++ )
Counter += (pArray[i] == -2);
return Counter;
}
/**Function*************************************************************
Synopsis [Update information about proved nodes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManUpdateProved( Cec_ManCsw_t * p )
{
Caig_Man_t * pMan = p->p;
int i;
for ( i = 1; i < pMan->nObjs; i++ )
{
if ( pMan->pFans0[i] == -1 ) // pi always has zero first fanin
continue;
if ( pMan->pFans1[i] == -1 ) // po always has non-zero 1st fanin and zero 2nd fanin
continue;
if ( p->pProvedNow[Cec_Lit2Var(pMan->pFans0[i])] < 0 ||
p->pProvedNow[Cec_Lit2Var(pMan->pFans1[i])] < 0 )
p->pProvedNow[i] = -1;
if ( pMan->pReprs[i] < 0 )
{
assert( p->pProvedNow[i] <= 0 );
continue;
}
if ( p->pProved[i] )
{
assert( p->pProvedNow[i] == 1 );
continue;
}
if ( p->pProvedNow[i] == 1 )
p->pProved[i] = 1;
}
}
/**Function*************************************************************
Synopsis [Creates dynamic partition.]
Description [PIs point to node IDs. POs point to node IDs.]
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSatSweepRound( Cec_ManCsw_t * p )
{
Bar_Progress_t * pProgress = NULL;
Vec_Ptr_t * vInfo;
Aig_Man_t * pAig, * pTemp;
Aig_Obj_t * pObj;
Cnf_Dat_t * pCnf;
sat_solver * pSat;
int i, Lit, iNode, iStart, status;
int nProved, nDisproved, nTimedout, nBefore, nAfter, nRecycles = 0;
int clk = clock();
Cec_ManCleanSimInfo( p );
memset( p->pProvedNow, 0, sizeof(char) * p->p->nObjs );
pProgress = Bar_ProgressStart( stdout, p->p->nObjs );
for ( iStart = 1; iStart < p->p->nObjs; )
{
Bar_ProgressUpdate( pProgress, iStart, "Sweep..." );
Vec_IntClear( p->vPiNums );
Vec_IntClear( p->vPoNums );
// generate AIG, synthesize, convert to CNF, and solve
pAig = Cec_ManCswCreatePartition( p, &iStart, p->pPars->nCallsRecycle, p->pPars->nSatVarMax, p->pPars->nLevelMax );
Aig_ManPrintStats( pAig );
if ( p->pPars->fRewriting )
{
pAig = Dar_ManRwsat( pTemp = pAig, 1, 0 );
Aig_ManStop( pTemp );
}
pCnf = Cnf_Derive( pAig, Aig_ManPoNum(pAig) );
pSat = Cnf_DataWriteIntoSolver( pCnf, 1, 0 );
Aig_ManForEachPo( pAig, pObj, i )
{
iNode = Vec_IntEntry( p->vPoNums, i );
Lit = toLitCond( pCnf->pVarNums[pObj->Id], 0 );
status = sat_solver_solve( pSat, &Lit, &Lit + 1, (ABC_INT64_T)p->pPars->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
if ( status == l_False )
p->pProvedNow[iNode] = 1;
else if ( status == l_Undef )
p->pProvedNow[iNode] = -2;
else if ( status == l_True )
{
p->pProvedNow[iNode] = -1;
Cec_ManSatDerivePattern( p, pAig, pObj, pCnf, pSat );
Cec_ManSavePattern( p, p->vPat );
}
}
// clean up
Aig_ManStop( pAig );
Cnf_DataFree( pCnf );
sat_solver_delete( pSat );
nRecycles++;
}
Bar_ProgressStop( pProgress );
// collect statistics
nProved = Cec_ManCountProved( p->pProvedNow, p->p->nObjs );
nDisproved = Cec_ManCountDisproved( p->pProvedNow, p->p->nObjs );
nTimedout = Cec_ManCountTimedout( p->pProvedNow, p->p->nObjs );
nBefore = Cec_ManCountProved( p->pProved, p->p->nObjs );
Cec_ManUpdateProved( p );
nAfter = Cec_ManCountProved( p->pProved, p->p->nObjs );
printf( "Pr =%6d. Cex =%6d. Fail =%6d. Bef =%6d. Aft =%6d. Rcl =%4d.",
nProved, nDisproved, nTimedout, nBefore, nAfter, nRecycles );
ABC_PRT( "Time", clock() - clk );
// resimulate with the collected information
Vec_PtrForEachEntry( p->vInfoAll, vInfo, i )
Caig_ManSimulateRound( p->p, vInfo, NULL );
Caig_ManPrintClasses( p->p, 0 );
}
/**Function*************************************************************
Synopsis [Performs one round of sweeping.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cec_ManSatSweepInt( Caig_Man_t * pMan, Cec_ParCsw_t * pPars )
{
Cec_ManCsw_t * p;
p = Cec_ManCswCreate( pMan, pPars );
Cec_ManSatSweepRound( p );
Cec_ManCswStop( p );
}
/**Function*************************************************************
Synopsis [Performs equivalence checking.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Cec_ManTrasferReprs( Aig_Man_t * pAig, Caig_Man_t * pCaig )
{
return NULL;
}
/**Function*************************************************************
Synopsis [Performs equivalence checking.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Cec_ManSatSweep( Aig_Man_t * pAig, Cec_ParCsw_t * pPars )
{
/*
Aig_Man_t * pAigNew, * pAigDfs;
Caig_Man_t * pCaig;
Cec_ManCsw_t * p;
pAigDfs = Cec_Duplicate( pAig );
pCaig = Caig_ManClassesPrepare( pAigDfs, pPars->nWords, pPars->nRounds );
p = Cec_ManCswCreate( pCaig, pPars );
Cec_ManSatSweep( p, pPars );
Cec_ManCswStop( p );
// pAigNew =
Caig_ManDelete( pCaig );
Aig_ManStop( pAigDfs );
return pAigNew;
*/
return NULL;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

9
src/aig/cec2/module.make Normal file
View File

@ -0,0 +1,9 @@
SRC += src/aig/cec/cecAig.c \
src/aig/cec/cecClass.c \
src/aig/cec/cecCnf.c \
src/aig/cec/cecCore.c \
src/aig/cec/cecMan.c \
src/aig/cec/cecSat.c \
src/aig/cec/cecSim.c \
src/aig/cec/cecStatus.c \
src/aig/cec/cecSweep.c

8
src/aig/cgt/cgt.h
View File

@ -21,10 +21,6 @@
#ifndef __CGT_H__
#define __CGT_H__
#ifdef __cplusplus
extern "C" {
#endif
/*
The algorithm implemented in this package is based on the paper:
A. Hurst. "Automatic synthesis of clock gating logic with controlled
@ -39,6 +35,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////

2
src/aig/cgt/cgtCore.c
View File

@ -220,7 +220,7 @@ p->timePrepare += clock() - clk;
p->nCallsSat -nCallsSat,
p->nCallsUndec-nCallsUndec,
p->nCallsFiltered-nCallsFiltered );
PRT( "Time", clock() - clkTotal );
ABC_PRT( "Time", clock() - clkTotal );
}
Cgt_ManClean( p );
p->nRecycles++;

4
src/aig/cgt/cgtDecide.c
View File

@ -227,7 +227,7 @@ Vec_Vec_t * Cgt_ManDecideSimple( Aig_Man_t * pAig, Vec_Vec_t * vGatesAll, int nO
// printf( "Gated transitions = %5.2f %%. (%5.2f %%.) ",
// 100.0*nTransSaved/nTransTotal, Cgt_ManComputeCoverage(pAig, vGates) );
printf( "Gated transitions = %5.2f %%. ", Cgt_ManComputeCoverage(pAig, vGates) );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
/*
{
@ -283,7 +283,7 @@ Vec_Vec_t * Cgt_ManDecideArea( Aig_Man_t * pAig, Vec_Vec_t * vGatesAll, int nOdc
Vec_VecSizeSize(vGatesAll), Counter, Saig_ManRegNum(pAig) );
printf( "Complete gates = %6d. Gated transitions = %5.2f %%. ",
Vec_PtrSize(vCompletes), Cgt_ManComputeCoverage(pAig, vGates) );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
Vec_PtrFree( vCompletes );
return vGates;

8
src/aig/cgt/cgtInt.h
View File

@ -21,10 +21,6 @@
#ifndef __CGT_INT_H__
#define __CGT_INT_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@ -38,6 +34,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////

22
src/aig/cgt/cgtMan.c
View File

@ -47,7 +47,7 @@ Cgt_Man_t * Cgt_ManCreate( Aig_Man_t * pAig, Aig_Man_t * pCare, Cgt_Par_t * pPar
Aig_ManFanoutStart( pAig );
Aig_ManSetPioNumbers( pAig );
// create interpolation manager
p = ALLOC( Cgt_Man_t, 1 );
p = ABC_ALLOC( Cgt_Man_t, 1 );
memset( p, 0, sizeof(Cgt_Man_t) );
p->pPars = pPars;
p->pAig = pAig;
@ -123,17 +123,17 @@ void Cgt_ManPrintStats( Cgt_Man_t * p )
p->pPars->nConfMax, p->pPars->nVarsMin, p->pPars->nFlopsMin );
printf( "SAT : Calls = %d. Unsat = %d. Sat = %d. Fails = %d. Recycles = %d. ",
p->nCalls, p->nCallsUnsat, p->nCallsSat, p->nCallsUndec, p->nRecycles );
PRT( "Time", p->timeTotal );
ABC_PRT( "Time", p->timeTotal );
/*
p->timeOther = p->timeTotal-p->timeAig-p->timePrepare-p->timeSat-p->timeDecision;
PRTP( "AIG ", p->timeAig, p->timeTotal );
PRTP( "Prepare ", p->timePrepare, p->timeTotal );
PRTP( "SAT solving", p->timeSat, p->timeTotal );
PRTP( " unsat ", p->timeSatUnsat, p->timeTotal );
PRTP( " sat ", p->timeSatSat, p->timeTotal );
PRTP( " undecided", p->timeSatUndec, p->timeTotal );
PRTP( "Other ", p->timeOther, p->timeTotal );
PRTP( "TOTAL ", p->timeTotal, p->timeTotal );
ABC_PRTP( "AIG ", p->timeAig, p->timeTotal );
ABC_PRTP( "Prepare ", p->timePrepare, p->timeTotal );
ABC_PRTP( "SAT solving", p->timeSat, p->timeTotal );
ABC_PRTP( " unsat ", p->timeSatUnsat, p->timeTotal );
ABC_PRTP( " sat ", p->timeSatSat, p->timeTotal );
ABC_PRTP( " undecided", p->timeSatUndec, p->timeTotal );
ABC_PRTP( "Other ", p->timeOther, p->timeTotal );
ABC_PRTP( "TOTAL ", p->timeTotal, p->timeTotal );
*/
}
@ -163,7 +163,7 @@ void Cgt_ManStop( Cgt_Man_t * p )
Vec_VecFree( p->vGatesAll );
if ( p->vSuppsInv )
Vec_VecFree( p->vSuppsInv );
free( p );
ABC_FREE( p );
}

2
src/aig/cgt/cgtSat.c
View File

@ -57,7 +57,7 @@ int Cgt_CheckImplication( Cgt_Man_t * p, Aig_Obj_t * pGate, Aig_Obj_t * pMiter )
pLits[1] = toLitCond( p->pCnf->pVarNums[pMiter->Id], 0 );
clk = clock();
RetValue = sat_solver_solve( p->pSat, pLits, pLits + 2, (sint64)nBTLimit, (sint64)0, (sint64)0, (sint64)0 );
RetValue = sat_solver_solve( p->pSat, pLits, pLits + 2, (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
p->timeSat += clock() - clk;
if ( RetValue == l_False )
{

8
src/aig/cnf/cnf.h
View File

@ -21,10 +21,6 @@
#ifndef __CNF_H__
#define __CNF_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@ -43,6 +39,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////

10
src/aig/cnf/cnfCore.c
View File

@ -77,9 +77,9 @@ p->timeSave = clock() - clk;
// reset reference counters
Aig_ManResetRefs( pAig );
//PRT( "Cuts ", p->timeCuts );
//PRT( "Map ", p->timeMap );
//PRT( "Saving ", p->timeSave );
//ABC_PRT( "Cuts ", p->timeCuts );
//ABC_PRT( "Map ", p->timeMap );
//ABC_PRT( "Saving ", p->timeSave );
return pCnf;
}
@ -141,7 +141,7 @@ Cnf_Dat_t * Cnf_Derive_old( Aig_Man_t * pAig )
clk = clock();
Cnf_ManScanMapping( p, 0 );
Cnf_ManMapForCnf( p );
PRT( "iter ", clock() - clk );
ABC_PRT( "iter ", clock() - clk );
}
*/
// write the file
@ -159,7 +159,7 @@ clk = clock();
Cnf_ManPostprocess( p );
Cnf_ManScanMapping( p, 0 );
*/
PRT( "Ext ", clock() - clk );
ABC_PRT( "Ext ", clock() - clk );
/*
vMapped = Cnf_ManScanMapping( p, 1 );

6
src/aig/cnf/cnfData.c
View File

@ -4554,7 +4554,7 @@ void Cnf_ReadMsops( char ** ppSopSizes, char *** ppSops )
assert( Size < 100000 );
// allocate memory
pMemory = ALLOC( char, Size * 75 );
pMemory = ABC_ALLOC( char, Size * 75 );
// copy the array into memory
for ( i = 0; i < Size; i++ )
for ( k = 0; k < 75; k++ )
@ -4564,8 +4564,8 @@ void Cnf_ReadMsops( char ** ppSopSizes, char *** ppSops )
pMemory[i*75+k] = Map[(int)s_Data4[i][k]];
// set pointers and compute SOP sizes
pSopSizes = ALLOC( char, 65536 );
pSops = ALLOC( char *, 65536 );
pSopSizes = ABC_ALLOC( char, 65536 );
pSops = ABC_ALLOC( char *, 65536 );
pSopSizes[0] = 0;
pSops[0] = NULL;
pPrev = pMemory;

40
src/aig/cnf/cnfMan.c
View File

@ -49,7 +49,7 @@ Cnf_Man_t * Cnf_ManStart()
Cnf_Man_t * p;
int i;
// allocate the manager
p = ALLOC( Cnf_Man_t, 1 );
p = ABC_ALLOC( Cnf_Man_t, 1 );
memset( p, 0, sizeof(Cnf_Man_t) );
// derive internal data structures
Cnf_ReadMsops( &p->pSopSizes, &p->pSops );
@ -57,7 +57,7 @@ Cnf_Man_t * Cnf_ManStart()
p->pMemCuts = Aig_MmFlexStart();
p->nMergeLimit = 10;
// allocate temporary truth tables
p->pTruths[0] = ALLOC( unsigned, 4 * Aig_TruthWordNum(p->nMergeLimit) );
p->pTruths[0] = ABC_ALLOC( unsigned, 4 * Aig_TruthWordNum(p->nMergeLimit) );
for ( i = 1; i < 4; i++ )
p->pTruths[i] = p->pTruths[i-1] + Aig_TruthWordNum(p->nMergeLimit);
p->vMemory = Vec_IntAlloc( 1 << 18 );
@ -78,12 +78,12 @@ Cnf_Man_t * Cnf_ManStart()
void Cnf_ManStop( Cnf_Man_t * p )
{
Vec_IntFree( p->vMemory );
free( p->pTruths[0] );
ABC_FREE( p->pTruths[0] );
Aig_MmFlexStop( p->pMemCuts, 0 );
free( p->pSopSizes );
free( p->pSops[1] );
free( p->pSops );
free( p );
ABC_FREE( p->pSopSizes );
ABC_FREE( p->pSops[1] );
ABC_FREE( p->pSops );
ABC_FREE( p );
}
/**Function*************************************************************
@ -123,16 +123,16 @@ Cnf_Dat_t * Cnf_DataAlloc( Aig_Man_t * pAig, int nVars, int nClauses, int nLiter
{
Cnf_Dat_t * pCnf;
int i;
pCnf = ALLOC( Cnf_Dat_t, 1 );
pCnf = ABC_ALLOC( Cnf_Dat_t, 1 );
memset( pCnf, 0, sizeof(Cnf_Dat_t) );
pCnf->pMan = pAig;
pCnf->nVars = nVars;
pCnf->nClauses = nClauses;
pCnf->nLiterals = nLiterals;
pCnf->pClauses = ALLOC( int *, nClauses + 1 );
pCnf->pClauses[0] = ALLOC( int, nLiterals );
pCnf->pClauses = ABC_ALLOC( int *, nClauses + 1 );
pCnf->pClauses[0] = ABC_ALLOC( int, nLiterals );
pCnf->pClauses[nClauses] = pCnf->pClauses[0] + nLiterals;
pCnf->pVarNums = ALLOC( int, Aig_ManObjNumMax(pAig) );
pCnf->pVarNums = ABC_ALLOC( int, Aig_ManObjNumMax(pAig) );
// memset( pCnf->pVarNums, 0xff, sizeof(int) * Aig_ManObjNumMax(pAig) );
for ( i = 0; i < Aig_ManObjNumMax(pAig); i++ )
pCnf->pVarNums[i] = -1;
@ -177,10 +177,10 @@ void Cnf_DataFree( Cnf_Dat_t * p )
{
if ( p == NULL )
return;
free( p->pClauses[0] );
free( p->pClauses );
free( p->pVarNums );
free( p );
ABC_FREE( p->pClauses[0] );
ABC_FREE( p->pClauses );
ABC_FREE( p->pVarNums );
ABC_FREE( p );
}
/**Function*************************************************************
@ -425,15 +425,15 @@ int Cnf_DataWriteOrClause( void * p, Cnf_Dat_t * pCnf )
sat_solver * pSat = p;
Aig_Obj_t * pObj;
int i, * pLits;
pLits = ALLOC( int, Aig_ManPoNum(pCnf->pMan) );
pLits = ABC_ALLOC( int, Aig_ManPoNum(pCnf->pMan) );
Aig_ManForEachPo( pCnf->pMan, pObj, i )
pLits[i] = toLitCond( pCnf->pVarNums[pObj->Id], 0 );
if ( !sat_solver_addclause( pSat, pLits, pLits + Aig_ManPoNum(pCnf->pMan) ) )
{
free( pLits );
ABC_FREE( pLits );
return 0;
}
free( pLits );
ABC_FREE( pLits );
return 1;
}
@ -479,7 +479,7 @@ void Cnf_DataTranformPolarity( Cnf_Dat_t * pCnf, int fTransformPos )
int * pVarToPol;
int i, iVar;
// create map from the variable number to its polarity
pVarToPol = CALLOC( int, pCnf->nVars );
pVarToPol = ABC_CALLOC( int, pCnf->nVars );
Aig_ManForEachObj( pCnf->pMan, pObj, i )
{
if ( !fTransformPos && Aig_ObjIsPo(pObj) )
@ -495,7 +495,7 @@ void Cnf_DataTranformPolarity( Cnf_Dat_t * pCnf, int fTransformPos )
if ( pVarToPol[iVar] )
pCnf->pClauses[0][i] = lit_neg( pCnf->pClauses[0][i] );
}
free( pVarToPol );
ABC_FREE( pVarToPol );
}
////////////////////////////////////////////////////////////////////////

4
src/aig/cnf/cnfMap.c
View File

@ -101,7 +101,7 @@ void Cnf_DeriveMapping( Cnf_Man_t * p )
Dar_Cut_t * pCut, * pCutBest;
int i, k, AreaFlow, * pAreaFlows;
// allocate area flows
pAreaFlows = ALLOC( int, Aig_ManObjNumMax(p->pManAig) );
pAreaFlows = ABC_ALLOC( int, Aig_ManObjNumMax(p->pManAig) );
memset( pAreaFlows, 0, sizeof(int) * Aig_ManObjNumMax(p->pManAig) );
// visit the nodes in the topological order and update their best cuts
vSuper = Vec_PtrAlloc( 100 );
@ -136,7 +136,7 @@ void Cnf_DeriveMapping( Cnf_Man_t * p )
}
}
Vec_PtrFree( vSuper );
free( pAreaFlows );
ABC_FREE( pAreaFlows );
/*
// compute the area of mapping

24
src/aig/cnf/cnfWrite.c
View File

@ -205,17 +205,17 @@ Cnf_Dat_t * Cnf_ManWriteCnf( Cnf_Man_t * p, Vec_Ptr_t * vMapped, int nOutputs )
//printf( "\n" );
// allocate CNF
pCnf = ALLOC( Cnf_Dat_t, 1 );
pCnf = ABC_ALLOC( Cnf_Dat_t, 1 );
memset( pCnf, 0, sizeof(Cnf_Dat_t) );
pCnf->pMan = p->pManAig;
pCnf->nLiterals = nLiterals;
pCnf->nClauses = nClauses;
pCnf->pClauses = ALLOC( int *, nClauses + 1 );
pCnf->pClauses[0] = ALLOC( int, nLiterals );
pCnf->pClauses = ABC_ALLOC( int *, nClauses + 1 );
pCnf->pClauses[0] = ABC_ALLOC( int, nLiterals );
pCnf->pClauses[nClauses] = pCnf->pClauses[0] + nLiterals;
// create room for variable numbers
pCnf->pVarNums = ALLOC( int, Aig_ManObjNumMax(p->pManAig) );
pCnf->pVarNums = ABC_ALLOC( int, Aig_ManObjNumMax(p->pManAig) );
// memset( pCnf->pVarNums, 0xff, sizeof(int) * Aig_ManObjNumMax(p->pManAig) );
for ( i = 0; i < Aig_ManObjNumMax(p->pManAig); i++ )
pCnf->pVarNums[i] = -1;
@ -356,17 +356,17 @@ Cnf_Dat_t * Cnf_DeriveSimple( Aig_Man_t * p, int nOutputs )
nClauses = 1 + 3 * Aig_ManNodeNum(p) + Aig_ManPoNum( p ) + nOutputs;
// allocate CNF
pCnf = ALLOC( Cnf_Dat_t, 1 );
pCnf = ABC_ALLOC( Cnf_Dat_t, 1 );
memset( pCnf, 0, sizeof(Cnf_Dat_t) );
pCnf->pMan = p;
pCnf->nLiterals = nLiterals;
pCnf->nClauses = nClauses;
pCnf->pClauses = ALLOC( int *, nClauses + 1 );
pCnf->pClauses[0] = ALLOC( int, nLiterals );
pCnf->pClauses = ABC_ALLOC( int *, nClauses + 1 );
pCnf->pClauses[0] = ABC_ALLOC( int, nLiterals );
pCnf->pClauses[nClauses] = pCnf->pClauses[0] + nLiterals;
// create room for variable numbers
pCnf->pVarNums = ALLOC( int, Aig_ManObjNumMax(p) );
pCnf->pVarNums = ABC_ALLOC( int, Aig_ManObjNumMax(p) );
// memset( pCnf->pVarNums, 0xff, sizeof(int) * Aig_ManObjNumMax(p) );
for ( i = 0; i < Aig_ManObjNumMax(p); i++ )
pCnf->pVarNums[i] = -1;
@ -478,17 +478,17 @@ Cnf_Dat_t * Cnf_DeriveSimpleForRetiming( Aig_Man_t * p )
nClauses = 1 + 3 * Aig_ManNodeNum(p) + 3 * Aig_ManPoNum(p);
// allocate CNF
pCnf = ALLOC( Cnf_Dat_t, 1 );
pCnf = ABC_ALLOC( Cnf_Dat_t, 1 );
memset( pCnf, 0, sizeof(Cnf_Dat_t) );
pCnf->pMan = p;
pCnf->nLiterals = nLiterals;
pCnf->nClauses = nClauses;
pCnf->pClauses = ALLOC( int *, nClauses + 1 );
pCnf->pClauses[0] = ALLOC( int, nLiterals );
pCnf->pClauses = ABC_ALLOC( int *, nClauses + 1 );
pCnf->pClauses[0] = ABC_ALLOC( int, nLiterals );
pCnf->pClauses[nClauses] = pCnf->pClauses[0] + nLiterals;
// create room for variable numbers
pCnf->pVarNums = ALLOC( int, Aig_ManObjNumMax(p) );
pCnf->pVarNums = ABC_ALLOC( int, Aig_ManObjNumMax(p) );
// memset( pCnf->pVarNums, 0xff, sizeof(int) * Aig_ManObjNumMax(p) );
for ( i = 0; i < Aig_ManObjNumMax(p); i++ )
pCnf->pVarNums[i] = -1;

8
src/aig/csw/csw.h
View File

@ -21,10 +21,6 @@
#ifndef __CSW_H__
#define __CSW_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@ -33,6 +29,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////

2
src/aig/csw/cswCut.c
View File

@ -78,7 +78,7 @@ static inline float Csw_CutFindCost2( Csw_Man_t * p, Csw_Cut_t * pCut )
/**Function*************************************************************
Synopsis [Returns the next free cut to use.]
Synopsis [Returns the next ABC_FREE cut to use.]
Description []

8
src/aig/csw/cswInt.h
View File

@ -21,10 +21,6 @@
#ifndef __CSW_INT_H__
#define __CSW_INT_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@ -44,6 +40,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////

32
src/aig/csw/cswMan.c
View File

@ -47,7 +47,7 @@ Csw_Man_t * Csw_ManStart( Aig_Man_t * pMan, int nCutsMax, int nLeafMax, int fVer
assert( nCutsMax >= 2 );
assert( nLeafMax <= 16 );
// allocate the fraiging manager
p = ALLOC( Csw_Man_t, 1 );
p = ABC_ALLOC( Csw_Man_t, 1 );
memset( p, 0, sizeof(Csw_Man_t) );
p->nCutsMax = nCutsMax;
p->nLeafMax = nLeafMax;
@ -57,9 +57,9 @@ Csw_Man_t * Csw_ManStart( Aig_Man_t * pMan, int nCutsMax, int nLeafMax, int fVer
p->pManRes = Aig_ManStartFrom( pMan );
assert( Aig_ManPiNum(p->pManAig) == Aig_ManPiNum(p->pManRes) );
// allocate room for cuts and equivalent nodes
p->pnRefs = ALLOC( int, Aig_ManObjNumMax(pMan) );
p->pEquiv = ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pMan) );
p->pCuts = ALLOC( Csw_Cut_t *, Aig_ManObjNumMax(pMan) );
p->pnRefs = ABC_ALLOC( int, Aig_ManObjNumMax(pMan) );
p->pEquiv = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pMan) );
p->pCuts = ABC_ALLOC( Csw_Cut_t *, Aig_ManObjNumMax(pMan) );
memset( p->pCuts, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(pMan) );
memset( p->pnRefs, 0, sizeof(int) * Aig_ManObjNumMax(pMan) );
// allocate memory manager
@ -68,14 +68,14 @@ Csw_Man_t * Csw_ManStart( Aig_Man_t * pMan, int nCutsMax, int nLeafMax, int fVer
p->pMemCuts = Aig_MmFixedStart( p->nCutSize * p->nCutsMax, 512 );
// allocate hash table for cuts
p->nTableSize = Aig_PrimeCudd( Aig_ManNodeNum(pMan) * p->nCutsMax / 2 );
p->pTable = ALLOC( Csw_Cut_t *, p->nTableSize );
p->pTable = ABC_ALLOC( Csw_Cut_t *, p->nTableSize );
memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize );
// set the pointers to the available fraig nodes
Csw_ObjSetEquiv( p, Aig_ManConst1(p->pManAig), Aig_ManConst1(p->pManRes) );
Aig_ManForEachPi( p->pManAig, pObj, i )
Csw_ObjSetEquiv( p, pObj, Aig_ManPi(p->pManRes, i) );
// room for temporary truth tables
p->puTemp[0] = ALLOC( unsigned, 4 * p->nTruthWords );
p->puTemp[0] = ABC_ALLOC( unsigned, 4 * p->nTruthWords );
p->puTemp[1] = p->puTemp[0] + p->nTruthWords;
p->puTemp[2] = p->puTemp[1] + p->nTruthWords;
p->puTemp[3] = p->puTemp[2] + p->nTruthWords;
@ -104,18 +104,18 @@ void Csw_ManStop( Csw_Man_t * p )
p->nNodesTried, Csw_TableCountCuts( p ) );
printf( "Triv0 = %6d. Triv1 = %6d. Triv2 = %6d. Cut-replace = %6d.\n",
p->nNodesTriv0, p->nNodesTriv1, p->nNodesTriv2, p->nNodesCuts );
PRTP( "Cuts ", p->timeCuts, p->timeTotal );
PRTP( "Hashing ", p->timeHash, p->timeTotal );
PRTP( "Other ", p->timeOther, p->timeTotal );
PRTP( "TOTAL ", p->timeTotal, p->timeTotal );
ABC_PRTP( "Cuts ", p->timeCuts, p->timeTotal );
ABC_PRTP( "Hashing ", p->timeHash, p->timeTotal );
ABC_PRTP( "Other ", p->timeOther, p->timeTotal );
ABC_PRTP( "TOTAL ", p->timeTotal, p->timeTotal );
}
free( p->puTemp[0] );
ABC_FREE( p->puTemp[0] );
Aig_MmFixedStop( p->pMemCuts, 0 );
free( p->pnRefs );
free( p->pEquiv );
free( p->pCuts );
free( p->pTable );
free( p );
ABC_FREE( p->pnRefs );
ABC_FREE( p->pEquiv );
ABC_FREE( p->pCuts );
ABC_FREE( p->pTable );
ABC_FREE( p );
}
////////////////////////////////////////////////////////////////////////

9
src/aig/dar/dar.h
View File

@ -21,10 +21,6 @@
#ifndef __DAR_H__
#define __DAR_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@ -33,6 +29,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
@ -48,6 +48,7 @@ struct Dar_RwrPar_t_
int fUpdateLevel; // update level
int fUseZeros; // performs zero-cost replacement
int fPower; // enables power-aware rewriting
int fRecycle; // enables cut recycling
int fVerbose; // enables verbose output
int fVeryVerbose; // enables very verbose output
};

23
src/aig/dar/darCore.c
View File

@ -48,6 +48,7 @@ void Dar_ManDefaultRwrParams( Dar_RwrPar_t * pPars )
pPars->fUpdateLevel = 0;
pPars->fUseZeros = 0;
pPars->fPower = 0;
pPars->fRecycle = 1;
pPars->fVerbose = 0;
pPars->fVeryVerbose = 0;
}
@ -71,7 +72,7 @@ int Dar_ManRewrite( Aig_Man_t * pAig, Dar_RwrPar_t * pPars )
Dar_Cut_t * pCut;
Aig_Obj_t * pObj, * pObjNew;
int i, k, nNodesOld, nNodeBefore, nNodeAfter, Required;
int clk = 0, clkStart;
int clk = 0, clkStart, Counter = 0;
// prepare the library
Dar_LibPrepare( pPars->nSubgMax );
// create rewriting manager
@ -86,7 +87,7 @@ int Dar_ManRewrite( Aig_Man_t * pAig, Dar_RwrPar_t * pPars )
if ( p->pPars->fUpdateLevel )
Aig_ManStartReverseLevels( pAig, 0 );
// set elementary cuts for the PIs
Dar_ManCutsStart( p );
// Dar_ManCutsStart( p );
// resynthesize each node once
clkStart = clock();
p->nNodesInit = Aig_ManNodeNum(pAig);
@ -105,6 +106,13 @@ int Dar_ManRewrite( Aig_Man_t * pAig, Dar_RwrPar_t * pPars )
if ( i > nNodesOld )
// if ( p->pPars->fUseZeros && i > nNodesOld )
break;
if ( pPars->fRecycle && ++Counter % 50000 == 0 && Aig_DagSize(pObj) < Vec_PtrSize(p->vCutNodes)/100 )
{
// printf( "Counter = %7d. Node = %7d. Dag = %5d. Vec = %5d.\n",
// Counter, i, Aig_DagSize(pObj), Vec_PtrSize(p->vCutNodes) );
// fflush( stdout );
Dar_ManCutsRestart( p, pObj );
}
// consider freeing the cuts
// if ( (i & 0xFFF) == 0 && Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20) > 100 )
@ -173,7 +181,6 @@ p->timeTotal = clock() - clkStart;
p->timeOther = p->timeTotal - p->timeCuts - p->timeEval;
// Bar_ProgressStop( pProgress );
p->nCutMemUsed = Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20);
Dar_ManCutsFree( p );
// put the nodes into the DFS order and reassign their IDs
// Aig_NtkReassignIds( p );
@ -260,7 +267,11 @@ Aig_MmFixed_t * Dar_ManComputeCuts( Aig_Man_t * pAig, int nCutsMax, int fVerbose
// create rewriting manager
p = Dar_ManStart( pAig, pPars );
// set elementary cuts for the PIs
Dar_ManCutsStart( p );
// Dar_ManCutsStart( p );
Aig_MmFixedRestart( p->pMemCuts );
Dar_ObjPrepareCuts( p, Aig_ManConst1(p->pAig) );
Aig_ManForEachPi( pAig, pObj, i )
Dar_ObjPrepareCuts( p, pObj );
// compute cuts for each nodes in the topological order
Aig_ManForEachNode( pAig, pObj, i )
Dar_ObjComputeCuts( p, pObj );
@ -274,14 +285,14 @@ Aig_MmFixed_t * Dar_ManComputeCuts( Aig_Man_t * pAig, int nCutsMax, int fVerbose
Aig_ManObjNum(pAig), nCuts, nCutsK );
printf( "Cut size = %2d. Truth size = %2d. Total mem = %5.2f Mb ",
(int)sizeof(Dar_Cut_t), (int)4, 1.0*Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20) );
PRT( "Runtime", clock() - clk );
ABC_PRT( "Runtime", clock() - clk );
/*
Aig_ManForEachNode( pAig, pObj, i )
if ( i % 300 == 0 )
Dar_ObjCutPrint( pAig, pObj );
*/
}
// free the cuts
// ABC_FREE the cuts
pMemCuts = p->pMemCuts;
p->pMemCuts = NULL;
// Dar_ManCutsFree( p );

17
src/aig/dar/darCut.c
View File

@ -127,7 +127,7 @@ static inline int Dar_CutFindValue( Dar_Man_t * p, Dar_Cut_t * pCut )
/**Function*************************************************************
Synopsis [Returns the next free cut to use.]
Synopsis [Returns the next ABC_FREE cut to use.]
Description [Uses the cut with the smallest value.]
@ -585,9 +585,11 @@ Dar_Cut_t * Dar_ObjPrepareCuts( Dar_Man_t * p, Aig_Obj_t * pObj )
pObj->nCuts = p->pPars->nCutsMax;
// create the cutset of the node
pCutSet = (Dar_Cut_t *)Aig_MmFixedEntryFetch( p->pMemCuts );
memset( pCutSet, 0, p->pPars->nCutsMax * sizeof(Dar_Cut_t) );
Dar_ObjSetCuts( pObj, pCutSet );
Dar_ObjForEachCutAll( pObj, pCut, i )
pCut->fUsed = 0;
Vec_PtrPush( p->vCutNodes, pObj );
// add unit cut if needed
pCut = pCutSet;
pCut->fUsed = 1;
@ -605,6 +607,8 @@ Dar_Cut_t * Dar_ObjPrepareCuts( Dar_Man_t * p, Aig_Obj_t * pObj )
pCut->uTruth = 0xAAAA;
}
pCut->Value = Dar_CutFindValue( p, pCut );
if ( p->nCutMemUsed < Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20) )
p->nCutMemUsed = Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20);
return pCutSet;
}
@ -619,15 +623,16 @@ Dar_Cut_t * Dar_ObjPrepareCuts( Dar_Man_t * p, Aig_Obj_t * pObj )
SeeAlso []
***********************************************************************/
void Dar_ManCutsStart( Dar_Man_t * p )
void Dar_ManCutsRestart( Dar_Man_t * p, Aig_Obj_t * pRoot )
{
Aig_Obj_t * pObj;
int i;
Aig_ManCleanData( p->pAig );
Vec_PtrForEachEntry( p->vCutNodes, pObj, i )
if ( !Aig_ObjIsNone(pObj) )
Dar_ObjSetCuts( pObj, NULL );
Vec_PtrClear( p->vCutNodes );
Aig_MmFixedRestart( p->pMemCuts );
Dar_ObjPrepareCuts( p, Aig_ManConst1(p->pAig) );
Aig_ManForEachPi( p->pAig, pObj, i )
Dar_ObjPrepareCuts( p, pObj );
}
/**Function*************************************************************
@ -725,6 +730,8 @@ Dar_Cut_t * Dar_ObjComputeCuts_rec( Dar_Man_t * p, Aig_Obj_t * pObj )
{
if ( Dar_ObjCuts(pObj) )
return Dar_ObjCuts(pObj);
if ( Aig_ObjIsPi(pObj) )
return Dar_ObjPrepareCuts( p, pObj );
if ( Aig_ObjIsBuf(pObj) )
return Dar_ObjComputeCuts_rec( p, Aig_ObjFanin0(pObj) );
Dar_ObjComputeCuts_rec( p, Aig_ObjFanin0(pObj) );

4
src/aig/dar/darData.c
View File

@ -11174,7 +11174,7 @@ void Aig_NtkGenerateArrays( Abc_Ntk_t * pNtk )
pObj->pCopy = (void *)Count++;
Pos = 0;
pBuffer = ALLOC( char, 200000 );
pBuffer = ABC_ALLOC( char, 200000 );
Abc_AigForEachAnd( pNtk, pObj, i )
{
pObj->pCopy = (void *)Count++;
@ -11250,7 +11250,7 @@ void Aig_NtkGenerateArrays( Abc_Ntk_t * pNtk )
Vec_IntSort( vOuts, 0 );
Pos = 0;
pBuffer = ALLOC( char, 50000 );
pBuffer = ABC_ALLOC( char, 50000 );
Prev = 0;
Vec_IntForEachEntry( vOuts, Out, i )
{

12
src/aig/dar/darInt.h
View File

@ -21,10 +21,6 @@
#ifndef __DAR_INT_H__
#define __DAR_INT_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@ -44,6 +40,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
@ -72,6 +72,7 @@ struct Dar_Man_t_
// various data members
Aig_MmFixed_t * pMemCuts; // memory manager for cuts
void * pManCnf; // CNF managers
Vec_Ptr_t * vCutNodes; // the nodes with cuts allocated
// current rewriting step
Vec_Ptr_t * vLeavesBest; // the best set of leaves
int OutBest; // the best output (in the library)
@ -130,8 +131,9 @@ static inline void Dar_ObjSetCuts( Aig_Obj_t * pObj, Dar_Cut_t * pCuts )
/*=== darBalance.c ========================================================*/
/*=== darCore.c ===========================================================*/
/*=== darCut.c ============================================================*/
extern void Dar_ManCutsStart( Dar_Man_t * p );
extern void Dar_ManCutsRestart( Dar_Man_t * p, Aig_Obj_t * pRoot );
extern void Dar_ManCutsFree( Dar_Man_t * p );
extern Dar_Cut_t * Dar_ObjPrepareCuts( Dar_Man_t * p, Aig_Obj_t * pObj );
extern Dar_Cut_t * Dar_ObjComputeCuts_rec( Dar_Man_t * p, Aig_Obj_t * pObj );
extern Dar_Cut_t * Dar_ObjComputeCuts( Dar_Man_t * p, Aig_Obj_t * pObj );
extern void Dar_ObjCutPrint( Aig_Man_t * p, Aig_Obj_t * pObj );

58
src/aig/dar/darLib.c
View File

@ -123,11 +123,11 @@ Dar_Lib_t * Dar_LibAlloc( int nObjs )
unsigned uTruths[4] = { 0xAAAA, 0xCCCC, 0xF0F0, 0xFF00 };
Dar_Lib_t * p;
int i;//, clk = clock();
p = ALLOC( Dar_Lib_t, 1 );
p = ABC_ALLOC( Dar_Lib_t, 1 );
memset( p, 0, sizeof(Dar_Lib_t) );
// allocate objects
p->nObjs = nObjs;
p->pObjs = ALLOC( Dar_LibObj_t, nObjs );
p->pObjs = ABC_ALLOC( Dar_LibObj_t, nObjs );
memset( p->pObjs, 0, sizeof(Dar_LibObj_t) * nObjs );
// allocate canonical data
p->pPerms4 = Dar_Permutations( 4 );
@ -139,7 +139,7 @@ Dar_Lib_t * Dar_LibAlloc( int nObjs )
p->pObjs[i].fTerm = 1;
p->pObjs[i].Num = uTruths[i];
}
// PRT( "Library start", clock() - clk );
// ABC_PRT( "Library start", clock() - clk );
return p;
}
@ -156,21 +156,21 @@ Dar_Lib_t * Dar_LibAlloc( int nObjs )
***********************************************************************/
void Dar_LibFree( Dar_Lib_t * p )
{
free( p->pObjs );
free( p->pDatas );
free( p->pNodesMem );
free( p->pNodes0Mem );
free( p->pSubgrMem );
free( p->pSubgr0Mem );
free( p->pPriosMem );
FREE( p->pPlaceMem );
FREE( p->pScoreMem );
free( p->pPerms4 );
free( p->puCanons );
free( p->pPhases );
free( p->pPerms );
free( p->pMap );
free( p );
ABC_FREE( p->pObjs );
ABC_FREE( p->pDatas );
ABC_FREE( p->pNodesMem );
ABC_FREE( p->pNodes0Mem );
ABC_FREE( p->pSubgrMem );
ABC_FREE( p->pSubgr0Mem );
ABC_FREE( p->pPriosMem );
ABC_FREE( p->pPlaceMem );
ABC_FREE( p->pScoreMem );
ABC_FREE( p->pPerms4 );
ABC_FREE( p->puCanons );
ABC_FREE( p->pPhases );
ABC_FREE( p->pPerms );
ABC_FREE( p->pMap );
ABC_FREE( p );
}
/**Function*************************************************************
@ -275,8 +275,8 @@ void Dar_LibSetup( Dar_Lib_t * p, Vec_Int_t * vOuts, Vec_Int_t * vPrios )
p->nSubgr[Class]++;
}
// allocate memory for the roots of each class
p->pSubgrMem = ALLOC( int, Vec_IntSize(vOuts) );
p->pSubgr0Mem = ALLOC( int, Vec_IntSize(vOuts) );
p->pSubgrMem = ABC_ALLOC( int, Vec_IntSize(vOuts) );
p->pSubgr0Mem = ABC_ALLOC( int, Vec_IntSize(vOuts) );
p->nSubgrTotal = 0;
for ( i = 0; i < 222; i++ )
{
@ -298,7 +298,7 @@ void Dar_LibSetup( Dar_Lib_t * p, Vec_Int_t * vOuts, Vec_Int_t * vPrios )
if ( fTraining )
{
// allocate memory for the priority of roots of each class
p->pPriosMem = ALLOC( int, Vec_IntSize(vOuts) );
p->pPriosMem = ABC_ALLOC( int, Vec_IntSize(vOuts) );
p->nSubgrTotal = 0;
for ( i = 0; i < 222; i++ )
{
@ -311,7 +311,7 @@ void Dar_LibSetup( Dar_Lib_t * p, Vec_Int_t * vOuts, Vec_Int_t * vPrios )
assert( p->nSubgrTotal == Vec_IntSize(vOuts) );
// allocate memory for the priority of roots of each class
p->pPlaceMem = ALLOC( int, Vec_IntSize(vOuts) );
p->pPlaceMem = ABC_ALLOC( int, Vec_IntSize(vOuts) );
p->nSubgrTotal = 0;
for ( i = 0; i < 222; i++ )
{
@ -324,7 +324,7 @@ void Dar_LibSetup( Dar_Lib_t * p, Vec_Int_t * vOuts, Vec_Int_t * vPrios )
assert( p->nSubgrTotal == Vec_IntSize(vOuts) );
// allocate memory for the priority of roots of each class
p->pScoreMem = ALLOC( int, Vec_IntSize(vOuts) );
p->pScoreMem = ABC_ALLOC( int, Vec_IntSize(vOuts) );
p->nSubgrTotal = 0;
for ( i = 0; i < 222; i++ )
{
@ -340,7 +340,7 @@ void Dar_LibSetup( Dar_Lib_t * p, Vec_Int_t * vOuts, Vec_Int_t * vPrios )
{
int Counter = 0;
// allocate memory for the priority of roots of each class
p->pPriosMem = ALLOC( int, Vec_IntSize(vOuts) );
p->pPriosMem = ABC_ALLOC( int, Vec_IntSize(vOuts) );
p->nSubgrTotal = 0;
for ( i = 0; i < 222; i++ )
{
@ -366,8 +366,8 @@ void Dar_LibSetup( Dar_Lib_t * p, Vec_Int_t * vOuts, Vec_Int_t * vPrios )
for ( i = 0; i < 222; i++ )
p->nNodesTotal += p->nNodes[i];
// allocate memory for the nodes of each class
p->pNodesMem = ALLOC( int, p->nNodesTotal );
p->pNodes0Mem = ALLOC( int, p->nNodesTotal );
p->pNodesMem = ABC_ALLOC( int, p->nNodesTotal );
p->pNodes0Mem = ABC_ALLOC( int, p->nNodesTotal );
p->nNodesTotal = 0;
for ( i = 0; i < 222; i++ )
{
@ -409,10 +409,10 @@ void Dar_LibCreateData( Dar_Lib_t * p, int nDatas )
{
if ( p->nDatas == nDatas )
return;
FREE( p->pDatas );
ABC_FREE( p->pDatas );
// allocate datas
p->nDatas = nDatas;
p->pDatas = ALLOC( Dar_LibDat_t, nDatas );
p->pDatas = ABC_ALLOC( Dar_LibDat_t, nDatas );
memset( p->pDatas, 0, sizeof(Dar_LibDat_t) * nDatas );
}
@ -572,7 +572,7 @@ void Dar_LibStart()
assert( s_DarLib == NULL );
s_DarLib = Dar_LibRead();
// printf( "The 4-input library started with %d nodes and %d subgraphs. ", s_DarLib->nObjs - 4, s_DarLib->nSubgrTotal );
// PRT( "Time", clock() - clk );
// ABC_PRT( "Time", clock() - clk );
}
/**Function*************************************************************

21
src/aig/dar/darMan.c
View File

@ -42,14 +42,13 @@
Dar_Man_t * Dar_ManStart( Aig_Man_t * pAig, Dar_RwrPar_t * pPars )
{
Dar_Man_t * p;
// start the manager
p = ALLOC( Dar_Man_t, 1 );
Aig_ManCleanData( pAig );
p = ABC_ALLOC( Dar_Man_t, 1 );
memset( p, 0, sizeof(Dar_Man_t) );
p->pPars = pPars;
p->pAig = pAig;
// prepare the internal memory manager
p->vCutNodes = Vec_PtrAlloc( 1000 );
p->pMemCuts = Aig_MmFixedStart( p->pPars->nCutsMax * sizeof(Dar_Cut_t), 1024 );
// other data
p->vLeavesBest = Vec_PtrAlloc( 4 );
return p;
}
@ -69,11 +68,13 @@ void Dar_ManStop( Dar_Man_t * p )
{
if ( p->pPars->fVerbose )
Dar_ManPrintStats( p );
if ( p->vCutNodes )
Vec_PtrFree( p->vCutNodes );
if ( p->pMemCuts )
Aig_MmFixedStop( p->pMemCuts, 0 );
if ( p->vLeavesBest )
Vec_PtrFree( p->vLeavesBest );
free( p );
ABC_FREE( p );
}
/**Function*************************************************************
@ -102,10 +103,10 @@ void Dar_ManPrintStats( Dar_Man_t * p )
printf( "Bufs = %5d. BufMax = %5d. BufReplace = %6d. BufFix = %6d. Levels = %4d.\n",
Aig_ManBufNum(p->pAig), p->pAig->nBufMax, p->pAig->nBufReplaces, p->pAig->nBufFixes, Aig_ManLevels(p->pAig) );
PRT( "Cuts ", p->timeCuts );
PRT( "Eval ", p->timeEval );
PRT( "Other ", p->timeOther );
PRT( "TOTAL ", p->timeTotal );
ABC_PRT( "Cuts ", p->timeCuts );
ABC_PRT( "Eval ", p->timeEval );
ABC_PRT( "Other ", p->timeOther );
ABC_PRT( "TOTAL ", p->timeTotal );
if ( !p->pPars->fVeryVerbose )
return;
@ -119,7 +120,7 @@ void Dar_ManPrintStats( Dar_Man_t * p )
printf( "S = %8d (%5.2f %%) ", p->ClassSubgs[i], p->nTotalSubgs? 100.0*p->ClassSubgs[i]/p->nTotalSubgs : 0.0 );
printf( "R = %7d ", p->ClassGains[i]? p->ClassSubgs[i]/p->ClassGains[i] : 9999999 );
// Kit_DsdPrintFromTruth( pCanons + i, 4 );
// PRTP( "T", p->ClassTimes[i], p->timeEval );
// ABC_PRTP( "T", p->ClassTimes[i], p->timeEval );
printf( "\n" );
}
fflush( stdout );

32
src/aig/dar/darPrec.c
View File

@ -45,7 +45,7 @@ char ** Dar_ArrayAlloc( int nCols, int nRows, int Size )
char * pBuffer;
int i;
assert( nCols > 0 && nRows > 0 && Size > 0 );
pBuffer = ALLOC( char, nCols * (sizeof(void *) + nRows * Size) );
pBuffer = ABC_ALLOC( char, nCols * (sizeof(void *) + nRows * Size) );
pRes = (char **)pBuffer;
pRes[0] = pBuffer + nCols * sizeof(void *);
for ( i = 1; i < nCols; i++ )
@ -130,8 +130,8 @@ void Dar_Permutations_rec( char ** pRes, int nFact, int n, char Array[] )
Description [The number of permutations in the array is n!. The number of
entries in each permutation is n. Therefore, the resulting array is a
two-dimentional array of the size: n! x n. To free the resulting array,
call free() on the pointer returned by this procedure.]
two-dimentional array of the size: n! x n. To ABC_FREE the resulting array,
call ABC_FREE() on the pointer returned by this procedure.]
SideEffects []
@ -210,8 +210,8 @@ unsigned Dar_TruthPermute( unsigned Truth, char * pPerms, int nVars, int fRevers
assert( nVars < 6 );
nMints = (1 << nVars);
pMints = ALLOC( int, nMints );
pMintsP = ALLOC( int, nMints );
pMints = ABC_ALLOC( int, nMints );
pMintsP = ABC_ALLOC( int, nMints );
for ( i = 0; i < nMints; i++ )
pMints[i] = i;
@ -231,8 +231,8 @@ unsigned Dar_TruthPermute( unsigned Truth, char * pPerms, int nVars, int fRevers
Result |= (1 << pMintsP[m]);
}
free( pMints );
free( pMintsP );
ABC_FREE( pMints );
ABC_FREE( pMintsP );
return Result;
}
@ -297,10 +297,10 @@ void Dar_Truth4VarNPN( unsigned short ** puCanons, char ** puPhases, char ** puP
int i, k;
nFuncs = (1 << 16);
uCanons = ALLOC( unsigned short, nFuncs );
uPhases = ALLOC( char, nFuncs );
uPerms = ALLOC( char, nFuncs );
uMap = ALLOC( unsigned char, nFuncs );
uCanons = ABC_ALLOC( unsigned short, nFuncs );
uPhases = ABC_ALLOC( char, nFuncs );
uPerms = ABC_ALLOC( char, nFuncs );
uMap = ABC_ALLOC( unsigned char, nFuncs );
memset( uCanons, 0, sizeof(unsigned short) * nFuncs );
memset( uPhases, 0, sizeof(char) * nFuncs );
memset( uPerms, 0, sizeof(char) * nFuncs );
@ -361,23 +361,23 @@ void Dar_Truth4VarNPN( unsigned short ** puCanons, char ** puPhases, char ** puP
}
uPhases[(1<<16)-1] = 16;
assert( nClasses == 222 );
free( pPerms4 );
ABC_FREE( pPerms4 );
if ( puCanons )
*puCanons = uCanons;
else
free( uCanons );
ABC_FREE( uCanons );
if ( puPhases )
*puPhases = uPhases;
else
free( uPhases );
ABC_FREE( uPhases );
if ( puPerms )
*puPerms = uPerms;
else
free( uPerms );
ABC_FREE( uPerms );
if ( puMap )
*puMap = uMap;
else
free( uMap );
ABC_FREE( uMap );
}
////////////////////////////////////////////////////////////////////////

12
src/aig/dar/darRefact.c
View File

@ -106,7 +106,7 @@ Ref_Man_t * Dar_ManRefStart( Aig_Man_t * pAig, Dar_RefPar_t * pPars )
{
Ref_Man_t * p;
// start the manager
p = ALLOC( Ref_Man_t, 1 );
p = ABC_ALLOC( Ref_Man_t, 1 );
memset( p, 0, sizeof(Ref_Man_t) );
p->pAig = pAig;
p->pPars = pPars;
@ -143,10 +143,10 @@ void Dar_ManRefPrintStats( Ref_Man_t * p )
p->nNodesInit, Aig_ManNodeNum(p->pAig), Gain, 100.0*Gain/p->nNodesInit );
printf( "Tried = %6d. Below = %5d. Extended = %5d. Used = %5d. Levels = %4d.\n",
p->nNodesTried, p->nNodesBelow, p->nNodesExten, p->nCutsUsed, Aig_ManLevels(p->pAig) );
PRT( "Cuts ", p->timeCuts );
PRT( "Eval ", p->timeEval );
PRT( "Other ", p->timeOther );
PRT( "TOTAL ", p->timeTotal );
ABC_PRT( "Cuts ", p->timeCuts );
ABC_PRT( "Eval ", p->timeEval );
ABC_PRT( "Other ", p->timeOther );
ABC_PRT( "TOTAL ", p->timeTotal );
}
/**Function*************************************************************
@ -172,7 +172,7 @@ void Dar_ManRefStop( Ref_Man_t * p )
Vec_PtrFree( p->vLeavesBest );
Vec_IntFree( p->vMemory );
Vec_PtrFree( p->vCutNodes );
free( p );
ABC_FREE( p );
}
/**Function*************************************************************

8
src/aig/dar/darScript.c
View File

@ -401,7 +401,7 @@ clk = clock();
if ( fVerbose )
{
PRT( "Synthesis time", clock() - clk );
ABC_PRT( "Synthesis time", clock() - clk );
}
clk = clock();
if ( fConstruct )
@ -413,7 +413,7 @@ clk = clock();
Vec_PtrFree( vAigs );
if ( fVerbose )
{
PRT( "Choicing time ", clock() - clk );
ABC_PRT( "Choicing time ", clock() - clk );
}
return pMan;
// return NULL;
@ -458,7 +458,7 @@ clk = clock();
if ( fVerbose )
{
PRT( "Synthesis time", clock() - clk );
ABC_PRT( "Synthesis time", clock() - clk );
}
// pPars->timeSynth = clock() - clk;
@ -493,7 +493,7 @@ clk = clock();
if ( fVerbose )
{
//PRT( "Choicing time ", clock() - clk );
//ABC_PRT( "Choicing time ", clock() - clk );
}
return pMan;
// return NULL;

8
src/aig/dch/dch.h
View File

@ -21,10 +21,6 @@
#ifndef __DCH_H__
#define __DCH_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@ -33,6 +29,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////

6
src/aig/dch/dchChoice.c
View File

@ -247,8 +247,8 @@ Aig_Man_t * Dch_DeriveChoiceAig( Aig_Man_t * pAig )
int i;
// start recording equivalences
pChoices = Aig_ManStart( Aig_ManObjNumMax(pAig) );
pChoices->pEquivs = CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
pChoices->pReprs = CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
pChoices->pEquivs = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
pChoices->pReprs = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
// map constants and PIs
Aig_ManCleanData( pAig );
Aig_ManConst1(pAig)->pData = Aig_ManConst1(pChoices);
@ -262,7 +262,7 @@ Aig_Man_t * Dch_DeriveChoiceAig( Aig_Man_t * pAig )
Aig_ObjCreatePo( pChoices, Aig_ObjChild0CopyRepr(pChoices, pObj) );
Dch_DeriveChoiceCountEquivs( pChoices );
// there is no need for cleanup
FREE( pChoices->pReprs );
ABC_FREE( pChoices->pReprs );
pChoices = Aig_ManDupDfs( pTemp = pChoices );
Aig_ManStop( pTemp );
return pChoices;

24
src/aig/dch/dchClass.c
View File

@ -134,11 +134,11 @@ static inline Aig_Obj_t ** Dch_ObjRemoveClass( Dch_Cla_t * p, Aig_Obj_t * pRepr
Dch_Cla_t * Dch_ClassesStart( Aig_Man_t * pAig )
{
Dch_Cla_t * p;
p = ALLOC( Dch_Cla_t, 1 );
p = ABC_ALLOC( Dch_Cla_t, 1 );
memset( p, 0, sizeof(Dch_Cla_t) );
p->pAig = pAig;
p->pId2Class = CALLOC( Aig_Obj_t **, Aig_ManObjNumMax(pAig) );
p->pClassSizes = CALLOC( int, Aig_ManObjNumMax(pAig) );
p->pId2Class = ABC_CALLOC( Aig_Obj_t **, Aig_ManObjNumMax(pAig) );
p->pClassSizes = ABC_CALLOC( int, Aig_ManObjNumMax(pAig) );
p->vClassOld = Vec_PtrAlloc( 100 );
p->vClassNew = Vec_PtrAlloc( 100 );
assert( pAig->pReprs == NULL );
@ -183,10 +183,10 @@ void Dch_ClassesStop( Dch_Cla_t * p )
{
if ( p->vClassNew ) Vec_PtrFree( p->vClassNew );
if ( p->vClassOld ) Vec_PtrFree( p->vClassOld );
FREE( p->pId2Class );
FREE( p->pClassSizes );
FREE( p->pMemClasses );
free( p );
ABC_FREE( p->pId2Class );
ABC_FREE( p->pClassSizes );
ABC_FREE( p->pMemClasses );
ABC_FREE( p );
}
/**Function*************************************************************
@ -338,8 +338,8 @@ void Dch_ClassesPrepare( Dch_Cla_t * p, int fLatchCorr, int nMaxLevs )
// allocate the hash table hashing simulation info into nodes
nTableSize = Aig_PrimeCudd( Aig_ManObjNumMax(p->pAig)/4 );
ppTable = CALLOC( Aig_Obj_t *, nTableSize );
ppNexts = CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAig) );
ppTable = ABC_CALLOC( Aig_Obj_t *, nTableSize );
ppNexts = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAig) );
// add all the nodes to the hash table
nEntries = 0;
@ -390,7 +390,7 @@ void Dch_ClassesPrepare( Dch_Cla_t * p, int fLatchCorr, int nMaxLevs )
}
// allocate room for classes
p->pMemClasses = ALLOC( Aig_Obj_t *, nEntries + p->nCands1 );
p->pMemClasses = ABC_ALLOC( Aig_Obj_t *, nEntries + p->nCands1 );
p->pMemClassesFree = p->pMemClasses + nEntries;
// copy the entries into storage in the topological order
@ -419,8 +419,8 @@ void Dch_ClassesPrepare( Dch_Cla_t * p, int fLatchCorr, int nMaxLevs )
nEntries2 += nNodes;
}
assert( nEntries == nEntries2 );
free( ppTable );
free( ppNexts );
ABC_FREE( ppTable );
ABC_FREE( ppNexts );
// now it is time to refine the classes
Dch_ClassesRefine( p );
Dch_ClassesCheck( p );

4
src/aig/dch/dchCnf.c
View File

@ -166,7 +166,7 @@ void Dch_AddClausesSuper( Dch_Man_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vSuper )
assert( Aig_ObjIsNode( pNode ) );
// create storage for literals
nLits = Vec_PtrSize(vSuper) + 1;
pLits = ALLOC( int, nLits );
pLits = ABC_ALLOC( int, nLits );
// suppose AND-gate is A & B = C
// add !A => !C or A + !C
Vec_PtrForEachEntry( vSuper, pFanin, i )
@ -197,7 +197,7 @@ void Dch_AddClausesSuper( Dch_Man_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vSuper )
}
RetValue = sat_solver_addclause( p->pSat, pLits, pLits + nLits );
assert( RetValue );
free( pLits );
ABC_FREE( pLits );
}
/**Function*************************************************************

2
src/aig/dch/dchCore.c
View File

@ -93,7 +93,7 @@ p->timeChoice = clock() - clk;
// pResult = Aig_ManDupSimpleDfs( p->pAigTotal );
// count the number of equivalences and choices
p->nEquivs = Dch_DeriveChoiceCountEquivs( pResult );
p->nChoices = Aig_ManCountChoices( pResult );
p->nChoices = Aig_ManChoiceNum( pResult );
p->timeTotal = clock() - clkTotal;
Dch_ManStop( p );
return pResult;

8
src/aig/dch/dchInt.h
View File

@ -21,10 +21,6 @@
#ifndef __DCH_INT_H__
#define __DCH_INT_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@ -37,6 +33,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////

32
src/aig/dch/dchMan.c
View File

@ -43,7 +43,7 @@ Dch_Man_t * Dch_ManCreate( Vec_Ptr_t * vAigs, Dch_Pars_t * pPars )
{
Dch_Man_t * p;
// create interpolation manager
p = ALLOC( Dch_Man_t, 1 );
p = ABC_ALLOC( Dch_Man_t, 1 );
memset( p, 0, sizeof(Dch_Man_t) );
p->pPars = pPars;
p->vAigs = vAigs;
@ -51,13 +51,13 @@ Dch_Man_t * Dch_ManCreate( Vec_Ptr_t * vAigs, Dch_Pars_t * pPars )
Aig_ManFanoutStart( p->pAigTotal );
// SAT solving
p->nSatVars = 1;
p->pSatVars = CALLOC( int, Aig_ManObjNumMax(p->pAigTotal) );
p->pSatVars = ABC_CALLOC( int, Aig_ManObjNumMax(p->pAigTotal) );
p->vUsedNodes = Vec_PtrAlloc( 1000 );
p->vFanins = Vec_PtrAlloc( 100 );
p->vSimRoots = Vec_PtrAlloc( 1000 );
p->vSimClasses = Vec_PtrAlloc( 1000 );
// equivalences proved
p->pReprsProved = CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAigTotal) );
p->pReprsProved = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAigTotal) );
return p;
}
@ -95,18 +95,18 @@ void Dch_ManPrintStats( Dch_Man_t * p )
p->nLits, p->nReprs, p->nEquivs, p->nChoices );
printf( "Choicing runtime statistics:\n" );
p->timeOther = p->timeTotal-p->timeSimInit-p->timeSimSat-p->timeSat-p->timeChoice;
PRTP( "Sim init ", p->timeSimInit, p->timeTotal );
PRTP( "Sim SAT ", p->timeSimSat, p->timeTotal );
PRTP( "SAT solving", p->timeSat, p->timeTotal );
PRTP( " sat ", p->timeSatSat, p->timeTotal );
PRTP( " unsat ", p->timeSatUnsat, p->timeTotal );
PRTP( " undecided", p->timeSatUndec, p->timeTotal );
PRTP( "Choice ", p->timeChoice, p->timeTotal );
PRTP( "Other ", p->timeOther, p->timeTotal );
PRTP( "TOTAL ", p->timeTotal, p->timeTotal );
ABC_PRTP( "Sim init ", p->timeSimInit, p->timeTotal );
ABC_PRTP( "Sim SAT ", p->timeSimSat, p->timeTotal );
ABC_PRTP( "SAT solving", p->timeSat, p->timeTotal );
ABC_PRTP( " sat ", p->timeSatSat, p->timeTotal );
ABC_PRTP( " unsat ", p->timeSatUnsat, p->timeTotal );
ABC_PRTP( " undecided", p->timeSatUndec, p->timeTotal );
ABC_PRTP( "Choice ", p->timeChoice, p->timeTotal );
ABC_PRTP( "Other ", p->timeOther, p->timeTotal );
ABC_PRTP( "TOTAL ", p->timeTotal, p->timeTotal );
if ( p->pPars->timeSynth )
{
PRT( "Synthesis ", p->pPars->timeSynth );
ABC_PRT( "Synthesis ", p->pPars->timeSynth );
}
}
@ -137,9 +137,9 @@ void Dch_ManStop( Dch_Man_t * p )
Vec_PtrFree( p->vFanins );
Vec_PtrFree( p->vSimRoots );
Vec_PtrFree( p->vSimClasses );
FREE( p->pReprsProved );
FREE( p->pSatVars );
free( p );
ABC_FREE( p->pReprsProved );
ABC_FREE( p->pSatVars );
ABC_FREE( p );
}
/**Function*************************************************************

4
src/aig/dch/dchSat.c
View File

@ -83,7 +83,7 @@ int Dch_NodesAreEquiv( Dch_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew )
//Sat_SolverWriteDimacs( p->pSat, "temp.cnf", pLits, pLits + 2, 1 );
clk = clock();
RetValue1 = sat_solver_solve( p->pSat, pLits, pLits + 2,
(sint64)nBTLimit, (sint64)0, (sint64)0, (sint64)0 );
(ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
p->timeSat += clock() - clk;
if ( RetValue1 == l_False )
{
@ -125,7 +125,7 @@ p->timeSatUndec += clock() - clk;
}
clk = clock();
RetValue1 = sat_solver_solve( p->pSat, pLits, pLits + 2,
(sint64)nBTLimit, (sint64)0, (sint64)0, (sint64)0 );
(ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
p->timeSat += clock() - clk;
if ( RetValue1 == l_False )
{

2
src/aig/dch/dchSweep.c
View File

@ -127,7 +127,7 @@ void Dch_ManSweep( Dch_Man_t * p )
}
Bar_ProgressStop( pProgress );
// update the representatives of the nodes (makes classes invalid)
FREE( p->pAigTotal->pReprs );
ABC_FREE( p->pAigTotal->pReprs );
p->pAigTotal->pReprs = p->pReprsProved;
p->pReprsProved = NULL;
// clean the mark

22
src/aig/deco/deco.h
View File

@ -21,10 +21,6 @@
#ifndef __DEC_H__
#define __DEC_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@ -33,6 +29,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
@ -201,12 +201,12 @@ static inline Dec_Edge_t Dec_IntToEdge_( unsigned Edge )
static inline Dec_Graph_t * Dec_GraphCreate( int nLeaves )
{
Dec_Graph_t * pGraph;
pGraph = ALLOC( Dec_Graph_t, 1 );
pGraph = ABC_ALLOC( Dec_Graph_t, 1 );
memset( pGraph, 0, sizeof(Dec_Graph_t) );
pGraph->nLeaves = nLeaves;
pGraph->nSize = nLeaves;
pGraph->nCap = 2 * nLeaves + 50;
pGraph->pNodes = ALLOC( Dec_Node_t, pGraph->nCap );
pGraph->pNodes = ABC_ALLOC( Dec_Node_t, pGraph->nCap );
memset( pGraph->pNodes, 0, sizeof(Dec_Node_t) * pGraph->nSize );
return pGraph;
}
@ -225,7 +225,7 @@ static inline Dec_Graph_t * Dec_GraphCreate( int nLeaves )
static inline Dec_Graph_t * Dec_GraphCreateConst0()
{
Dec_Graph_t * pGraph;
pGraph = ALLOC( Dec_Graph_t, 1 );
pGraph = ABC_ALLOC( Dec_Graph_t, 1 );
memset( pGraph, 0, sizeof(Dec_Graph_t) );
pGraph->fConst = 1;
pGraph->eRoot.fCompl = 1;
@ -246,7 +246,7 @@ static inline Dec_Graph_t * Dec_GraphCreateConst0()
static inline Dec_Graph_t * Dec_GraphCreateConst1()
{
Dec_Graph_t * pGraph;
pGraph = ALLOC( Dec_Graph_t, 1 );
pGraph = ABC_ALLOC( Dec_Graph_t, 1 );
memset( pGraph, 0, sizeof(Dec_Graph_t) );
pGraph->fConst = 1;
return pGraph;
@ -286,8 +286,8 @@ static inline Dec_Graph_t * Dec_GraphCreateLeaf( int iLeaf, int nLeaves, int fCo
***********************************************************************/
static inline void Dec_GraphFree( Dec_Graph_t * pGraph )
{
FREE( pGraph->pNodes );
free( pGraph );
ABC_FREE( pGraph->pNodes );
ABC_FREE( pGraph );
}
/**Function*************************************************************
@ -549,7 +549,7 @@ static inline Dec_Node_t * Dec_GraphAppendNode( Dec_Graph_t * pGraph )
Dec_Node_t * pNode;
if ( pGraph->nSize == pGraph->nCap )
{
pGraph->pNodes = REALLOC( Dec_Node_t, pGraph->pNodes, 2 * pGraph->nCap );
pGraph->pNodes = ABC_REALLOC( Dec_Node_t, pGraph->pNodes, 2 * pGraph->nCap );
pGraph->nCap = 2 * pGraph->nCap;
}
pNode = pGraph->pNodes + pGraph->nSize++;

16
src/aig/fra/fra.h
View File

@ -21,10 +21,6 @@
#ifndef __FRA_H__
#define __FRA_H__
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@ -45,6 +41,10 @@ extern "C" {
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
#ifdef __cplusplus
extern "C" {
#endif
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
@ -215,8 +215,8 @@ struct Fra_Man_t_
sat_solver * pSat; // SAT solver
int nSatVars; // the number of variables currently used
Vec_Ptr_t * vPiVars; // the PIs of the cone used
sint64 nBTLimitGlobal; // resource limit
sint64 nInsLimitGlobal; // resource limit
ABC_INT64_T nBTLimitGlobal; // resource limit
ABC_INT64_T nInsLimitGlobal; // resource limit
Vec_Ptr_t ** pMemFanins; // the arrays of fanins for some FRAIG nodes
int * pMemSatNums; // the array of SAT numbers for some FRAIG nodes
int nMemAlloc; // allocated size of the arrays for FRAIG varnums and fanins
@ -290,7 +290,7 @@ static inline int Fra_ImpCreate( int Left, int Right )
////////////////////////////////////////////////////////////////////////
/*=== fraCec.c ========================================================*/
extern int Fra_FraigSat( Aig_Man_t * pMan, sint64 nConfLimit, sint64 nInsLimit, int fFlipBits, int fAndOuts, int fVerbose );
extern int Fra_FraigSat( Aig_Man_t * pMan, ABC_INT64_T nConfLimit, ABC_INT64_T nInsLimit, int fFlipBits, int fAndOuts, int fVerbose );
extern int Fra_FraigCec( Aig_Man_t ** ppAig, int nConfLimit, int fVerbose );
extern int Fra_FraigCecPartitioned( Aig_Man_t * pMan1, Aig_Man_t * pMan2, int nConfLimit, int nPartSize, int fSmart, int fVerbose );
/*=== fraClass.c ========================================================*/
@ -376,7 +376,7 @@ extern void Fra_SmlSimulate( Fra_Man_t * p, int fInit );
extern void Fra_SmlResimulate( Fra_Man_t * p );
extern Fra_Sml_t * Fra_SmlStart( Aig_Man_t * pAig, int nPref, int nFrames, int nWordsFrame );
extern void Fra_SmlStop( Fra_Sml_t * p );
extern Fra_Sml_t * Fra_SmlSimulateSeq( Aig_Man_t * pAig, int nPref, int nFrames, int nWords );
extern Fra_Sml_t * Fra_SmlSimulateSeq( Aig_Man_t * pAig, int nPref, int nFrames, int nWords, int fCheckMiter );
extern Fra_Sml_t * Fra_SmlSimulateComb( Aig_Man_t * pAig, int nWords );
extern Fra_Cex_t * Fra_SmlGetCounterExample( Fra_Sml_t * p );
extern Fra_Cex_t * Fra_SmlCopyCounterExample( Aig_Man_t * pAig, Aig_Man_t * pFrames, int * pModel );

28
src/aig/fra/fraBmc.c
View File

@ -188,13 +188,13 @@ void Fra_BmcFilterImplications( Fra_Man_t * p, Fra_Bmc_t * pBmc )
Fra_Bmc_t * Fra_BmcStart( Aig_Man_t * pAig, int nPref, int nDepth )
{
Fra_Bmc_t * p;
p = ALLOC( Fra_Bmc_t, 1 );
p = ABC_ALLOC( Fra_Bmc_t, 1 );
memset( p, 0, sizeof(Fra_Bmc_t) );
p->pAig = pAig;
p->nPref = nPref;
p->nDepth = nDepth;
p->nFramesAll = nPref + nDepth;
p->pObjToFrames = ALLOC( Aig_Obj_t *, p->nFramesAll * Aig_ManObjNumMax(pAig) );
p->pObjToFrames = ABC_ALLOC( Aig_Obj_t *, p->nFramesAll * Aig_ManObjNumMax(pAig) );
memset( p->pObjToFrames, 0, sizeof(Aig_Obj_t *) * p->nFramesAll * Aig_ManObjNumMax(pAig) );
return p;
}
@ -215,9 +215,9 @@ void Fra_BmcStop( Fra_Bmc_t * p )
Aig_ManStop( p->pAigFrames );
if ( p->pAigFraig )
Aig_ManStop( p->pAigFraig );
free( p->pObjToFrames );
free( p->pObjToFraig );
free( p );
ABC_FREE( p->pObjToFrames );
ABC_FREE( p->pObjToFraig );
ABC_FREE( p );
}
/**Function*************************************************************
@ -253,7 +253,7 @@ Aig_Man_t * Fra_BmcFrames( Fra_Bmc_t * p, int fKeepPos )
Bmc_ObjSetFrames( pObj, 0, Aig_ManConst0(pAigFrames) );
// add timeframes
pLatches = ALLOC( Aig_Obj_t *, Aig_ManRegNum(p->pAig) );
pLatches = ABC_ALLOC( Aig_Obj_t *, Aig_ManRegNum(p->pAig) );
for ( f = 0; f < p->nFramesAll; f++ )
{
// add internal nodes of this frame
@ -275,7 +275,7 @@ Aig_Man_t * Fra_BmcFrames( Fra_Bmc_t * p, int fKeepPos )
Bmc_ObjSetFrames( pObj, f+1, pLatches[k++] );
assert( k == Aig_ManRegNum(p->pAig) );
}
free( pLatches );
ABC_FREE( pLatches );
if ( fKeepPos )
{
for ( f = 0; f < p->nFramesAll; f++ )
@ -333,7 +333,7 @@ void Fra_BmcPerform( Fra_Man_t * p, int nPref, int nDepth )
printf( "Original AIG = %d. Init %d frames = %d. Fraig = %d. ",
Aig_ManNodeNum(p->pBmc->pAig), p->pBmc->nFramesAll,
Aig_ManNodeNum(p->pBmc->pAigFrames), Aig_ManNodeNum(p->pBmc->pAigFraig) );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
printf( "Before BMC: " );
// Fra_ClassesPrint( p->pCla, 0 );
printf( "Const = %5d. Class = %5d. Lit = %5d. ",
@ -360,7 +360,7 @@ void Fra_BmcPerform( Fra_Man_t * p, int nPref, int nDepth )
printf( "Imp = %5d. ", Vec_IntSize(p->pCla->vImps) );
printf( "\n" );
}
// free the BMC manager
// ABC_FREE the BMC manager
Fra_BmcStop( p->pBmc );
p->pBmc = NULL;
}
@ -397,7 +397,7 @@ void Fra_BmcPerformSimple( Aig_Man_t * pAig, int nFrames, int nBTLimit, int fRew
printf( "Time-frames (%d): PI/PO = %d/%d. Node = %6d. Lev = %5d. ",
nFrames, Aig_ManPiNum(pBmc->pAigFrames), Aig_ManPoNum(pBmc->pAigFrames),
Aig_ManNodeNum(pBmc->pAigFrames), Aig_ManLevelNum(pBmc->pAigFrames) );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
if ( fRewrite )
{
@ -408,7 +408,7 @@ void Fra_BmcPerformSimple( Aig_Man_t * pAig, int nFrames, int nBTLimit, int fRew
{
printf( "Time-frames after rewriting: Node = %6d. Lev = %5d. ",
Aig_ManNodeNum(pBmc->pAigFrames), Aig_ManLevelNum(pBmc->pAigFrames) );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
}
clk = clock();
@ -422,7 +422,7 @@ void Fra_BmcPerformSimple( Aig_Man_t * pAig, int nFrames, int nBTLimit, int fRew
if ( pBmc->pAigFraig->pData )
{
pAig->pSeqModel = Fra_SmlCopyCounterExample( pAig, pBmc->pAigFrames, pBmc->pAigFraig->pData );
FREE( pBmc->pAigFraig->pData );
ABC_FREE( pBmc->pAigFraig->pData );
}
else if ( iOutput >= 0 )
pAig->pSeqModel = Fra_SmlTrivCounterExample( pAig, iOutput );
@ -432,10 +432,10 @@ void Fra_BmcPerformSimple( Aig_Man_t * pAig, int nFrames, int nBTLimit, int fRew
printf( "Fraiged init frames: Node = %6d. Lev = %5d. ",
pBmc->pAigFraig? Aig_ManNodeNum(pBmc->pAigFraig) : -1,
pBmc->pAigFraig? Aig_ManLevelNum(pBmc->pAigFraig) : -1 );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
Fra_BmcStop( pBmc );
free( pTemp );
ABC_FREE( pTemp );
}

36
src/aig/fra/fraCec.c
View File

@ -40,7 +40,7 @@
SeeAlso []
***********************************************************************/
int Fra_FraigSat( Aig_Man_t * pMan, sint64 nConfLimit, sint64 nInsLimit, int fFlipBits, int fAndOuts, int fVerbose )
int Fra_FraigSat( Aig_Man_t * pMan, ABC_INT64_T nConfLimit, ABC_INT64_T nInsLimit, int fFlipBits, int fAndOuts, int fVerbose )
{
sat_solver * pSat;
Cnf_Dat_t * pCnf;
@ -91,13 +91,13 @@ int Fra_FraigSat( Aig_Man_t * pMan, sint64 nConfLimit, sint64 nInsLimit, int fFl
// printf( "Created SAT problem with %d variable and %d clauses. ", sat_solver_nvars(pSat), sat_solver_nclauses(pSat) );
// PRT( "Time", clock() - clk );
// ABC_PRT( "Time", clock() - clk );
// simplify the problem
clk = clock();
status = sat_solver_simplify(pSat);
// printf( "Simplified the problem to %d variables and %d clauses. ", sat_solver_nvars(pSat), sat_solver_nclauses(pSat) );
// PRT( "Time", clock() - clk );
// ABC_PRT( "Time", clock() - clk );
if ( status == 0 )
{
Vec_IntFree( vCiIds );
@ -110,7 +110,7 @@ int Fra_FraigSat( Aig_Man_t * pMan, sint64 nConfLimit, sint64 nInsLimit, int fFl
clk = clock();
if ( fVerbose )
pSat->verbosity = 1;
status = sat_solver_solve( pSat, NULL, NULL, (sint64)nConfLimit, (sint64)nInsLimit, (sint64)0, (sint64)0 );
status = sat_solver_solve( pSat, NULL, NULL, (ABC_INT64_T)nConfLimit, (ABC_INT64_T)nInsLimit, (ABC_INT64_T)0, (ABC_INT64_T)0 );
if ( status == l_Undef )
{
// printf( "The problem timed out.\n" );
@ -128,7 +128,7 @@ int Fra_FraigSat( Aig_Man_t * pMan, sint64 nConfLimit, sint64 nInsLimit, int fFl
}
else
assert( 0 );
// PRT( "SAT sat_solver time", clock() - clk );
// ABC_PRT( "SAT sat_solver time", clock() - clk );
// printf( "The number of conflicts = %d.\n", (int)pSat->sat_solver_stats.conflicts );
// if the problem is SAT, get the counterexample
@ -136,7 +136,7 @@ int Fra_FraigSat( Aig_Man_t * pMan, sint64 nConfLimit, sint64 nInsLimit, int fFl
{
pMan->pData = Sat_SolverGetModel( pSat, vCiIds->pArray, vCiIds->nSize );
}
// free the sat_solver
// ABC_FREE the sat_solver
if ( fVerbose )
Sat_SolverPrintStats( stdout, pSat );
//sat_solver_store_write( pSat, "trace.cnf" );
@ -176,18 +176,18 @@ int Fra_FraigCec( Aig_Man_t ** ppAig, int nConfLimit, int fVerbose )
// assert( RetValue == -1 );
if ( RetValue == 0 )
{
pAig->pData = ALLOC( int, Aig_ManPiNum(pAig) );
pAig->pData = ABC_ALLOC( int, Aig_ManPiNum(pAig) );
memset( pAig->pData, 0, sizeof(int) * Aig_ManPiNum(pAig) );
return RetValue;
}
// if SAT only, solve without iteration
clk = clock();
RetValue = Fra_FraigSat( pAig, (sint64)2*nBTLimitStart, (sint64)0, 1, 0, 0 );
RetValue = Fra_FraigSat( pAig, (ABC_INT64_T)2*nBTLimitStart, (ABC_INT64_T)0, 1, 0, 0 );
if ( fVerbose )
{
printf( "Initial SAT: Nodes = %6d. ", Aig_ManNodeNum(pAig) );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
if ( RetValue >= 0 )
return RetValue;
@ -199,7 +199,7 @@ clk = clock();
if ( fVerbose )
{
printf( "Rewriting: Nodes = %6d. ", Aig_ManNodeNum(pAig) );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
// perform the loop
@ -218,7 +218,7 @@ clk = clock();
if ( fVerbose )
{
printf( "Fraiging (i=%d): Nodes = %6d. ", i+1, Aig_ManNodeNum(pAig) );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
// check the miter status
@ -233,7 +233,7 @@ clk = clock();
if ( fVerbose )
{
printf( "Rewriting: Nodes = %6d. ", Aig_ManNodeNum(pAig) );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
// check the miter status
@ -251,11 +251,11 @@ PRT( "Time", clock() - clk );
if ( RetValue == -1 )
{
clk = clock();
RetValue = Fra_FraigSat( pAig, (sint64)nBTLimitLast, (sint64)0, 1, 0, 0 );
RetValue = Fra_FraigSat( pAig, (ABC_INT64_T)nBTLimitLast, (ABC_INT64_T)0, 1, 0, 0 );
if ( fVerbose )
{
printf( "Final SAT: Nodes = %6d. ", Aig_ManNodeNum(pAig) );
PRT( "Time", clock() - clk );
ABC_PRT( "Time", clock() - clk );
}
}
@ -318,7 +318,7 @@ int Fra_FraigCecPartitioned( Aig_Man_t * pMan1, Aig_Man_t * pMan2, int nConfLimi
printf( "Timed out after verifying %d partitions (out of %d).\n", nOutputs, Vec_PtrSize(vParts) );
fflush( stdout );
}
// free intermediate results
// ABC_FREE intermediate results
Vec_PtrForEachEntry( vParts, pAig, i )
Aig_ManStop( pAig );
Vec_PtrFree( vParts );
@ -373,17 +373,17 @@ int Fra_FraigCecTop( Aig_Man_t * pMan1, Aig_Man_t * pMan2, int nConfLimit, int n
if ( RetValue == 1 )
{
printf( "Networks are equivalent. " );
PRT( "Time", clock() - clkTotal );
ABC_PRT( "Time", clock() - clkTotal );
}
else if ( RetValue == 0 )
{
printf( "Networks are NOT EQUIVALENT. " );
PRT( "Time", clock() - clkTotal );
ABC_PRT( "Time", clock() - clkTotal );
}
else
{
printf( "Networks are UNDECIDED. " );
PRT( "Time", clock() - clkTotal );
ABC_PRT( "Time", clock() - clkTotal );
}
fflush( stdout );
return RetValue;

36
src/aig/fra/fraClass.c
View File

@ -57,10 +57,10 @@ static inline void Fra_ObjSetNext( Aig_Obj_t ** ppNexts, Aig_Obj_t * pOb
Fra_Cla_t * Fra_ClassesStart( Aig_Man_t * pAig )
{
Fra_Cla_t * p;
p = ALLOC( Fra_Cla_t, 1 );
p = ABC_ALLOC( Fra_Cla_t, 1 );
memset( p, 0, sizeof(Fra_Cla_t) );
p->pAig = pAig;
p->pMemRepr = ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
p->pMemRepr = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
memset( p->pMemRepr, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(pAig) );
p->vClasses = Vec_PtrAlloc( 100 );
p->vClasses1 = Vec_PtrAlloc( 100 );
@ -86,15 +86,15 @@ Fra_Cla_t * Fra_ClassesStart( Aig_Man_t * pAig )
***********************************************************************/
void Fra_ClassesStop( Fra_Cla_t * p )
{
FREE( p->pMemClasses );
FREE( p->pMemRepr );
ABC_FREE( p->pMemClasses );
ABC_FREE( p->pMemRepr );
if ( p->vClassesTemp ) Vec_PtrFree( p->vClassesTemp );
if ( p->vClassNew ) Vec_PtrFree( p->vClassNew );
if ( p->vClassOld ) Vec_PtrFree( p->vClassOld );
if ( p->vClasses1 ) Vec_PtrFree( p->vClasses1 );
if ( p->vClasses ) Vec_PtrFree( p->vClasses );
if ( p->vImps ) Vec_IntFree( p->vImps );
free( p );
ABC_FREE( p );
}
/**Function*************************************************************
@ -278,8 +278,8 @@ void Fra_ClassesPrepare( Fra_Cla_t * p, int fLatchCorr, int nMaxLevs )
// allocate the hash table hashing simulation info into nodes
nTableSize = Aig_PrimeCudd( Aig_ManObjNumMax(p->pAig) );
ppTable = ALLOC( Aig_Obj_t *, nTableSize );
ppNexts = ALLOC( Aig_Obj_t *, nTableSize );
ppTable = ABC_ALLOC( Aig_Obj_t *, nTableSize );
ppNexts = ABC_ALLOC( Aig_Obj_t *, nTableSize );
memset( ppTable, 0, sizeof(Aig_Obj_t *) * nTableSize );
// add all the nodes to the hash table
@ -338,7 +338,7 @@ void Fra_ClassesPrepare( Fra_Cla_t * p, int fLatchCorr, int nMaxLevs )
}
// allocate room for classes
p->pMemClasses = ALLOC( Aig_Obj_t *, 2*(nEntries + Vec_PtrSize(p->vClasses1)) );
p->pMemClasses = ABC_ALLOC( Aig_Obj_t *, 2*(nEntries + Vec_PtrSize(p->vClasses1)) );
p->pMemClassesFree = p->pMemClasses + 2*nEntries;
// copy the entries into storage in the topological order
@ -374,8 +374,8 @@ void Fra_ClassesPrepare( Fra_Cla_t * p, int fLatchCorr, int nMaxLevs )
// increment the number of entries
nEntries += k;
}
free( ppTable );
free( ppNexts );
ABC_FREE( ppTable );
ABC_FREE( ppNexts );
// now it is time to refine the classes
Fra_ClassesRefine( p );
// Fra_ClassesPrint( p, 0 );
@ -587,7 +587,7 @@ int Fra_ClassesRefine1( Fra_Cla_t * p, int fRefineNewClass, int * pSkipped )
void Fra_ClassesTest( Fra_Cla_t * p, int Id1, int Id2 )
{
Aig_Obj_t ** pClass;
p->pMemClasses = ALLOC( Aig_Obj_t *, 4 );
p->pMemClasses = ABC_ALLOC( Aig_Obj_t *, 4 );
pClass = p->pMemClasses;
assert( Id1 < Id2 );
pClass[0] = Aig_ManObj( p->pAig, Id1 );
@ -620,7 +620,7 @@ void Fra_ClassesLatchCorr( Fra_Man_t * p )
Fra_ClassObjSetRepr( pObj, Aig_ManConst1(p->pManAig) );
}
// allocate room for classes
p->pCla->pMemClasses = ALLOC( Aig_Obj_t *, 2*(nEntries + Vec_PtrSize(p->pCla->vClasses1)) );
p->pCla->pMemClasses = ABC_ALLOC( Aig_Obj_t *, 2*(nEntries + Vec_PtrSize(p->pCla->vClasses1)) );
p->pCla->pMemClassesFree = p->pCla->pMemClasses + 2*nEntries;
}
@ -644,7 +644,7 @@ void Fra_ClassesPostprocess( Fra_Cla_t * p )
// perform combinational simulation
pComb = Fra_SmlSimulateComb( p->pAig, 32 );
// compute the weight of each node in the classes
pWeights = ALLOC( int, Aig_ManObjNumMax(p->pAig) );
pWeights = ABC_ALLOC( int, Aig_ManObjNumMax(p->pAig) );
memset( pWeights, 0, sizeof(int) * Aig_ManObjNumMax(p->pAig) );
Aig_ManForEachObj( p->pAig, pObj, i )
{
@ -686,7 +686,7 @@ void Fra_ClassesPostprocess( Fra_Cla_t * p )
Vec_PtrWriteEntry( p->vClasses, k++, ppClass );
Vec_PtrShrink( p->vClasses, k );
printf( "After: Const = %6d. Class = %6d. \n", Vec_PtrSize(p->vClasses1), Vec_PtrSize(p->vClasses) );
free( pWeights );
ABC_FREE( pWeights );
}
/**Function*************************************************************
@ -804,13 +804,13 @@ Aig_Man_t * Fra_ClassesDeriveAig( Fra_Cla_t * p, int nFramesK )
pManFraig->pName = Aig_UtilStrsav( p->pAig->pName );
pManFraig->pSpec = Aig_UtilStrsav( p->pAig->pSpec );
// allocate place for the node mapping
ppEquivs = ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAig) );
ppEquivs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAig) );
Fra_ObjSetEqu( ppEquivs, Aig_ManConst1(p->pAig), Aig_ManConst1(pManFraig) );
// create latches for the first frame
Aig_ManForEachLoSeq( p->pAig, pObj, i )
Fra_ObjSetEqu( ppEquivs, pObj, Aig_ObjCreatePi(pManFraig) );
// add timeframes
pLatches = ALLOC( Aig_Obj_t *, Aig_ManRegNum(p->pAig) );
pLatches = ABC_ALLOC( Aig_Obj_t *, Aig_ManRegNum(p->pAig) );
for ( f = 0; f < nFramesAll; f++ )
{
// create PIs for this frame
@ -839,8 +839,8 @@ Aig_Man_t * Fra_ClassesDeriveAig( Fra_Cla_t * p, int nFramesK )
Aig_ManForEachLoSeq( p->pAig, pObj, i )
Fra_ObjSetEqu( ppEquivs, pObj, pLatches[k++] );
}
free( pLatches );
free( ppEquivs );
ABC_FREE( pLatches );
ABC_FREE( ppEquivs );
// mark the asserts
assert( Aig_ManPoNum(pManFraig) % nFramesAll == 0 );
printf( "Assert miters = %6d. Output miters = %6d.\n",

20
src/aig/fra/fraClau.c
View File

@ -152,7 +152,7 @@ int * Fra_ClauCreateMapping( Vec_Int_t * vSatVarsFrom, Vec_Int_t * vSatVarsTo, i
{
int * pMapping, Var, i;
assert( Vec_IntSize(vSatVarsFrom) == Vec_IntSize(vSatVarsTo) );
pMapping = ALLOC( int, nVarsMax );
pMapping = ABC_ALLOC( int, nVarsMax );
for ( i = 0; i < nVarsMax; i++ )
pMapping[i] = -1;
Vec_IntForEachEntry( vSatVarsFrom, Var, i )
@ -174,10 +174,10 @@ int * Fra_ClauCreateMapping( Vec_Int_t * vSatVarsFrom, Vec_Int_t * vSatVarsTo, i
***********************************************************************/
void Fra_ClauStop( Cla_Man_t * p )
{
free( p->pMapCsMainToCsTest );
free( p->pMapCsTestToCsMain );
free( p->pMapCsTestToNsTest );
free( p->pMapCsTestToNsBmc );
ABC_FREE( p->pMapCsMainToCsTest );
ABC_FREE( p->pMapCsTestToCsMain );
ABC_FREE( p->pMapCsTestToNsTest );
ABC_FREE( p->pMapCsTestToNsBmc );
Vec_IntFree( p->vSatVarsMainCs );
Vec_IntFree( p->vSatVarsTestCs );
Vec_IntFree( p->vSatVarsTestNs );
@ -191,7 +191,7 @@ void Fra_ClauStop( Cla_Man_t * p )
if ( p->pSatMain ) sat_solver_delete( p->pSatMain );
if ( p->pSatTest ) sat_solver_delete( p->pSatTest );
if ( p->pSatBmc ) sat_solver_delete( p->pSatBmc );
free( p );
ABC_FREE( p );
}
/**Function*************************************************************
@ -217,7 +217,7 @@ Cla_Man_t * Fra_ClauStart( Aig_Man_t * pMan )
assert( Aig_ManPoNum(pMan) - Aig_ManRegNum(pMan) == 1 );
// start the manager
p = ALLOC( Cla_Man_t, 1 );
p = ABC_ALLOC( Cla_Man_t, 1 );
memset( p, 0, sizeof(Cla_Man_t) );
p->vCexMain0 = Vec_IntAlloc( Aig_ManRegNum(pMan) );
p->vCexMain = Vec_IntAlloc( Aig_ManRegNum(pMan) );
@ -362,7 +362,7 @@ int Fra_ClauCheckProperty( Cla_Man_t * p, Vec_Int_t * vCex )
int nBTLimit = 0;
int RetValue, iVar, i;
sat_solver_act_var_clear( p->pSatMain );
RetValue = sat_solver_solve( p->pSatMain, NULL, NULL, (sint64)nBTLimit, (sint64)0, (sint64)0, (sint64)0 );
RetValue = sat_solver_solve( p->pSatMain, NULL, NULL, (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
Vec_IntClear( vCex );
if ( RetValue == l_False )
return 1;
@ -396,7 +396,7 @@ int Fra_ClauCheckBmc( Cla_Man_t * p, Vec_Int_t * vClause )
int nBTLimit = 0;
int RetValue;
RetValue = sat_solver_solve( p->pSatBmc, Vec_IntArray(vClause), Vec_IntArray(vClause) + Vec_IntSize(vClause),
(sint64)nBTLimit, (sint64)0, (sint64)0, (sint64)0 );
(ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
if ( RetValue == l_False )
return 1;
assert( RetValue == l_True );
@ -458,7 +458,7 @@ int Fra_ClauCheckClause( Cla_Man_t * p, Vec_Int_t * vClause, Vec_Int_t * vCex )
Vec_IntPush( p->vCexAssm, toLitCond(i,0) ); // positive helper
// try to solve
RetValue = sat_solver_solve( p->pSatTest, Vec_IntArray(p->vCexAssm), Vec_IntArray(p->vCexAssm) + Vec_IntSize(p->vCexAssm),
(sint64)nBTLimit, (sint64)0, (sint64)0, (sint64)0 );
(ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
if ( vCex )
Vec_IntClear( vCex );
if ( RetValue == l_False )

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