2011-07-29 10:38:44 +02:00
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/**CFile****************************************************************
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FileName [saigAbsStart.c]
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SystemName [ABC: Logic synthesis and verification system.]
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PackageName [Sequential AIG package.]
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Synopsis [Counter-example-based abstraction.]
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Author [Alan Mishchenko]
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Affiliation [UC Berkeley]
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Date [Ver. 1.0. Started - June 20, 2005.]
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Revision [$Id: saigAbsStart.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
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***********************************************************************/
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2012-09-16 08:27:46 +02:00
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#include "abs.h"
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2012-07-08 05:14:12 +02:00
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#include "proof/ssw/ssw.h"
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#include "proof/fra/fra.h"
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#include "proof/bbr/bbr.h"
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#include "proof/pdr/pdr.h"
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2011-07-29 10:38:44 +02:00
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ABC_NAMESPACE_IMPL_START
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////////////////////////////////////////////////////////////////////////
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/// DECLARATIONS ///
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////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////
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/// FUNCTION DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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2012-09-16 08:27:46 +02:00
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/**Function*************************************************************
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Synopsis [Derive a new counter-example.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Abc_Cex_t * Saig_ManCexRemap( Aig_Man_t * p, Aig_Man_t * pAbs, Abc_Cex_t * pCexAbs )
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{
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Abc_Cex_t * pCex;
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Aig_Obj_t * pObj;
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int i, f;
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if ( !Saig_ManVerifyCex( pAbs, pCexAbs ) )
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printf( "Saig_ManCexRemap(): The initial counter-example is invalid.\n" );
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// else
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// printf( "Saig_ManCexRemap(): The initial counter-example is correct.\n" );
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// start the counter-example
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pCex = Abc_CexAlloc( Aig_ManRegNum(p), Saig_ManPiNum(p), pCexAbs->iFrame+1 );
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pCex->iFrame = pCexAbs->iFrame;
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pCex->iPo = pCexAbs->iPo;
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// copy the bit data
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for ( f = 0; f <= pCexAbs->iFrame; f++ )
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{
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Saig_ManForEachPi( pAbs, pObj, i )
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{
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if ( i == Saig_ManPiNum(p) )
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break;
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if ( Abc_InfoHasBit( pCexAbs->pData, pCexAbs->nRegs + pCexAbs->nPis * f + i ) )
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Abc_InfoSetBit( pCex->pData, pCex->nRegs + pCex->nPis * f + i );
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}
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}
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// verify the counter example
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if ( !Saig_ManVerifyCex( p, pCex ) )
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{
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printf( "Saig_ManCexRemap(): Counter-example is invalid.\n" );
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Abc_CexFree( pCex );
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pCex = NULL;
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}
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else
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{
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Abc_Print( 1, "Counter-example verification is successful.\n" );
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Abc_Print( 1, "Output %d of miter \"%s\" was asserted in frame %d. \n", pCex->iPo, p->pName, pCex->iFrame );
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}
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return pCex;
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}
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2011-07-29 10:38:44 +02:00
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/**Function*************************************************************
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Synopsis [Find the first PI corresponding to the flop.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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int Saig_ManCexFirstFlopPi( Aig_Man_t * p, Aig_Man_t * pAbs )
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{
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Aig_Obj_t * pObj;
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int i;
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assert( pAbs->vCiNumsOrig != NULL );
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2012-03-10 04:32:44 +01:00
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Aig_ManForEachCi( p, pObj, i )
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2011-07-29 10:38:44 +02:00
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{
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if ( Vec_IntEntry(pAbs->vCiNumsOrig, i) >= Saig_ManPiNum(p) )
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return i;
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}
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return -1;
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}
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/**Function*************************************************************
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Synopsis [Refines abstraction using one step.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Aig_Man_t * Saig_ManCexRefine( Aig_Man_t * p, Aig_Man_t * pAbs, Vec_Int_t * vFlops, int nFrames, int nConfMaxOne, int fUseBdds, int fUseDprove, int fVerbose, int * pnUseStart, int * piRetValue, int * pnFrames )
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{
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Vec_Int_t * vFlopsNew;
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int i, Entry, RetValue;
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*piRetValue = -1;
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if ( fUseDprove && Aig_ManRegNum(pAbs) > 0 )
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{
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/*
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Fra_Sec_t SecPar, * pSecPar = &SecPar;
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Fra_SecSetDefaultParams( pSecPar );
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pSecPar->fVerbose = fVerbose;
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RetValue = Fra_FraigSec( pAbs, pSecPar, NULL );
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*/
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Abc_Cex_t * pCex = NULL;
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Aig_Man_t * pAbsOrpos = Saig_ManDupOrpos( pAbs );
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Pdr_Par_t Pars, * pPars = &Pars;
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Pdr_ManSetDefaultParams( pPars );
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pPars->nTimeOut = 10;
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pPars->fVerbose = fVerbose;
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if ( pPars->fVerbose )
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printf( "Running property directed reachability...\n" );
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RetValue = Pdr_ManSolve( pAbsOrpos, pPars, &pCex );
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if ( pCex )
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pCex->iPo = Saig_ManFindFailedPoCex( pAbs, pCex );
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Aig_ManStop( pAbsOrpos );
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pAbs->pSeqModel = pCex;
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if ( RetValue )
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*piRetValue = 1;
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}
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else if ( fUseBdds && (Aig_ManRegNum(pAbs) > 0 && Aig_ManRegNum(pAbs) <= 80) )
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{
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Saig_ParBbr_t Pars, * pPars = &Pars;
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Bbr_ManSetDefaultParams( pPars );
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pPars->TimeLimit = 0;
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pPars->nBddMax = 1000000;
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pPars->nIterMax = nFrames;
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pPars->fPartition = 1;
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pPars->fReorder = 1;
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pPars->fReorderImage = 1;
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pPars->fVerbose = fVerbose;
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pPars->fSilent = 0;
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RetValue = Aig_ManVerifyUsingBdds( pAbs, pPars );
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if ( RetValue )
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*piRetValue = 1;
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}
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else
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{
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2012-09-05 08:57:58 +02:00
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Saig_BmcPerform( pAbs, pnUseStart? *pnUseStart: 0, nFrames, 2000, 0, nConfMaxOne, 0, fVerbose, 0, pnFrames, 0 );
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2011-07-29 10:38:44 +02:00
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}
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if ( pAbs->pSeqModel == NULL )
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return NULL;
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if ( pnUseStart )
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*pnUseStart = pAbs->pSeqModel->iFrame;
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// vFlopsNew = Saig_ManExtendCounterExampleTest( pAbs, Saig_ManCexFirstFlopPi(p, pAbs), pAbs->pSeqModel, 1, fVerbose );
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vFlopsNew = Saig_ManExtendCounterExampleTest3( pAbs, Saig_ManCexFirstFlopPi(p, pAbs), pAbs->pSeqModel, fVerbose );
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if ( vFlopsNew == NULL )
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return NULL;
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if ( Vec_IntSize(vFlopsNew) == 0 )
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{
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printf( "Discovered a true counter-example!\n" );
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p->pSeqModel = Saig_ManCexRemap( p, pAbs, pAbs->pSeqModel );
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Vec_IntFree( vFlopsNew );
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*piRetValue = 0;
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return NULL;
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}
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// vFlopsNew contains PI numbers that should be kept in pAbs
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if ( fVerbose )
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2011-08-18 09:38:02 +02:00
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printf( "Adding %d registers to the abstraction (total = %d).\n\n", Vec_IntSize(vFlopsNew), Aig_ManRegNum(pAbs)+Vec_IntSize(vFlopsNew) );
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2011-07-29 10:38:44 +02:00
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// add to the abstraction
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Vec_IntForEachEntry( vFlopsNew, Entry, i )
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{
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Entry = Vec_IntEntry(pAbs->vCiNumsOrig, Entry);
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assert( Entry >= Saig_ManPiNum(p) );
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2012-03-10 04:50:18 +01:00
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assert( Entry < Aig_ManCiNum(p) );
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2011-07-29 10:38:44 +02:00
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Vec_IntPush( vFlops, Entry-Saig_ManPiNum(p) );
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}
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Vec_IntFree( vFlopsNew );
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Vec_IntSort( vFlops, 0 );
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Vec_IntForEachEntryStart( vFlops, Entry, i, 1 )
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assert( Vec_IntEntry(vFlops, i-1) != Entry );
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2011-07-29 11:21:25 +02:00
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return Saig_ManDupAbstraction( p, vFlops );
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2011-07-29 10:38:44 +02:00
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}
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/**Function*************************************************************
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Synopsis [Refines abstraction using one step.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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2011-09-12 23:46:37 +02:00
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int Saig_ManCexRefineStep( Aig_Man_t * p, Vec_Int_t * vFlops, Vec_Int_t * vFlopClasses, Abc_Cex_t * pCex, int nFfToAddMax, int fTryFour, int fSensePath, int fVerbose )
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2011-07-29 10:38:44 +02:00
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{
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Aig_Man_t * pAbs;
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Vec_Int_t * vFlopsNew;
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2012-07-08 02:46:54 +02:00
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int i, Entry;
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clock_t clk = clock();
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2011-07-29 11:21:25 +02:00
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pAbs = Saig_ManDupAbstraction( p, vFlops );
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2011-07-29 10:38:44 +02:00
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if ( fSensePath )
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vFlopsNew = Saig_ManExtendCounterExampleTest2( pAbs, Saig_ManCexFirstFlopPi(p, pAbs), pCex, fVerbose );
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else
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// vFlopsNew = Saig_ManExtendCounterExampleTest( pAbs, Saig_ManCexFirstFlopPi(p, pAbs), pCex, fTryFour, fVerbose );
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vFlopsNew = Saig_ManExtendCounterExampleTest3( pAbs, Saig_ManCexFirstFlopPi(p, pAbs), pCex, fVerbose );
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if ( vFlopsNew == NULL )
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{
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Aig_ManStop( pAbs );
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return 0;
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}
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if ( Vec_IntSize(vFlopsNew) == 0 )
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{
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printf( "Refinement did not happen. Discovered a true counter-example.\n" );
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2012-03-10 04:50:18 +01:00
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printf( "Remapping counter-example from %d to %d primary inputs.\n", Aig_ManCiNum(pAbs), Aig_ManCiNum(p) );
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2011-07-29 10:38:44 +02:00
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p->pSeqModel = Saig_ManCexRemap( p, pAbs, pCex );
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Vec_IntFree( vFlopsNew );
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Aig_ManStop( pAbs );
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return 0;
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}
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if ( fVerbose )
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{
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2011-08-18 09:38:02 +02:00
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printf( "Adding %d registers to the abstraction (total = %d). ", Vec_IntSize(vFlopsNew), Aig_ManRegNum(p)+Vec_IntSize(vFlopsNew) );
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2011-08-17 15:49:41 +02:00
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Abc_PrintTime( 1, "Time", clock() - clk );
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2011-07-29 10:38:44 +02:00
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}
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2011-09-12 23:46:37 +02:00
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// vFlopsNew contains PI numbers that should be kept in pAbs
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// select the most useful flops among those to be added
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if ( nFfToAddMax > 0 && Vec_IntSize(vFlopsNew) > nFfToAddMax )
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{
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Vec_Int_t * vFlopsNewBest;
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// shift the indices
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Vec_IntForEachEntry( vFlopsNew, Entry, i )
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Vec_IntAddToEntry( vFlopsNew, i, -Saig_ManPiNum(p) );
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// create new flops
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vFlopsNewBest = Saig_ManCbaFilterFlops( p, pCex, vFlopClasses, vFlopsNew, nFfToAddMax );
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assert( Vec_IntSize(vFlopsNewBest) == nFfToAddMax );
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printf( "Filtering flops based on cost (%d -> %d).\n", Vec_IntSize(vFlopsNew), Vec_IntSize(vFlopsNewBest) );
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// update
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Vec_IntFree( vFlopsNew );
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vFlopsNew = vFlopsNewBest;
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// shift the indices
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Vec_IntForEachEntry( vFlopsNew, Entry, i )
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Vec_IntAddToEntry( vFlopsNew, i, Saig_ManPiNum(p) );
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}
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2011-07-29 10:38:44 +02:00
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// add to the abstraction
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Vec_IntForEachEntry( vFlopsNew, Entry, i )
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{
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Entry = Vec_IntEntry(pAbs->vCiNumsOrig, Entry);
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assert( Entry >= Saig_ManPiNum(p) );
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2012-03-10 04:50:18 +01:00
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assert( Entry < Aig_ManCiNum(p) );
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2011-07-29 10:38:44 +02:00
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Vec_IntPush( vFlops, Entry-Saig_ManPiNum(p) );
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}
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Vec_IntFree( vFlopsNew );
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Aig_ManStop( pAbs );
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return 1;
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}
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/**Function*************************************************************
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2012-09-16 08:27:46 +02:00
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Synopsis [Transform flop map into flop list.]
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2011-07-29 10:38:44 +02:00
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Description []
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SideEffects []
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SeeAlso []
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2012-09-16 08:27:46 +02:00
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2011-07-29 10:38:44 +02:00
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***********************************************************************/
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2012-09-16 08:27:46 +02:00
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Vec_Int_t * Gia_ManClasses2Flops( Vec_Int_t * vFlopClasses )
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2011-07-29 10:38:44 +02:00
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{
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Vec_Int_t * vFlops;
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2012-09-16 08:27:46 +02:00
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int i, Entry;
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vFlops = Vec_IntAlloc( 100 );
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Vec_IntForEachEntry( vFlopClasses, Entry, i )
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if ( Entry )
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Vec_IntPush( vFlops, i );
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return vFlops;
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}
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/**Function*************************************************************
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Synopsis [Transform flop list into flop map.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Vec_Int_t * Gia_ManFlops2Classes( Gia_Man_t * pGia, Vec_Int_t * vFlops )
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{
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Vec_Int_t * vFlopClasses;
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int i, Entry;
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vFlopClasses = Vec_IntStart( Gia_ManRegNum(pGia) );
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Vec_IntForEachEntry( vFlops, Entry, i )
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Vec_IntWriteEntry( vFlopClasses, Entry, 1 );
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return vFlopClasses;
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}
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/**Function*************************************************************
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Synopsis [Refines abstraction using the latch map.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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int Gia_ManCexAbstractionRefine( Gia_Man_t * pGia, Abc_Cex_t * pCex, int nFfToAddMax, int fTryFour, int fSensePath, int fVerbose )
|
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{
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Aig_Man_t * pNew;
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Vec_Int_t * vFlops;
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if ( pGia->vFlopClasses == NULL )
|
2011-07-29 10:38:44 +02:00
|
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|
{
|
2012-09-16 08:27:46 +02:00
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|
printf( "Gia_ManCexAbstractionRefine(): Abstraction latch map is missing.\n" );
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return -1;
|
2011-07-29 10:38:44 +02:00
|
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|
}
|
2012-09-16 08:27:46 +02:00
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|
pNew = Gia_ManToAig( pGia, 0 );
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vFlops = Gia_ManClasses2Flops( pGia->vFlopClasses );
|
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|
if ( !Saig_ManCexRefineStep( pNew, vFlops, pGia->vFlopClasses, pCex, nFfToAddMax, fTryFour, fSensePath, fVerbose ) )
|
2011-07-29 10:38:44 +02:00
|
|
|
{
|
2012-09-16 08:27:46 +02:00
|
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|
pGia->pCexSeq = pNew->pSeqModel; pNew->pSeqModel = NULL;
|
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|
|
Vec_IntFree( vFlops );
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|
|
Aig_ManStop( pNew );
|
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|
|
return 0;
|
2011-07-29 10:38:44 +02:00
|
|
|
}
|
2012-09-16 08:27:46 +02:00
|
|
|
Vec_IntFree( pGia->vFlopClasses );
|
|
|
|
|
pGia->vFlopClasses = Gia_ManFlops2Classes( pGia, vFlops );
|
|
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|
|
Vec_IntFree( vFlops );
|
|
|
|
|
Aig_ManStop( pNew );
|
|
|
|
|
return -1;
|
2011-07-29 10:38:44 +02:00
|
|
|
}
|
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|
////////////////////////////////////////////////////////////////////////
|
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|
|
/// END OF FILE ///
|
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|
|
////////////////////////////////////////////////////////////////////////
|
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|
ABC_NAMESPACE_IMPL_END
|
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