mirror of https://github.com/YosysHQ/abc.git
115 lines
3.3 KiB
C
115 lines
3.3 KiB
C
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/**CFile****************************************************************
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FileName [sclUpsize.c]
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SystemName [ABC: Logic synthesis and verification system.]
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PackageName [Standard-cell library representation.]
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Synopsis [Selective increase of gate sizes.]
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Author [Alan Mishchenko, Niklas Een]
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Affiliation [UC Berkeley]
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Date [Ver. 1.0. Started - August 24, 2012.]
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Revision [$Id: sclUpsize.c,v 1.0 2012/08/24 00:00:00 alanmi Exp $]
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***********************************************************************/
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#include "sclInt.h"
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#include "sclMan.h"
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ABC_NAMESPACE_IMPL_START
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////////////////////////////////////////////////////////////////////////
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/// DECLARATIONS ///
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////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////
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/// FUNCTION DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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/**Function*************************************************************
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Synopsis [Begin by upsizing gates will many fanouts.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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int Abc_SclManUpsize( SC_Man * p, int Degree )
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{
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SC_Cell * pOld, * pNew;
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Abc_Obj_t * pObj;
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int i, Count = 0;
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Abc_NtkForEachNode1( p->pNtk, pObj, i )
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{
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if ( Abc_ObjFanoutNum(pObj) < Degree )
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continue;
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// find new gate
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pOld = Abc_SclObjCell( p, pObj );
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pNew = Abc_SclObjResiable( p, pObj, 1 );
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if ( pNew == NULL )
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continue;
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Vec_IntWriteEntry( p->vGates, Abc_ObjId(pObj), Abc_SclCellFind(p->pLib, pNew->pName) );
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Count++;
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}
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return Count;
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Abc_SclUpsizingPerform( SC_Lib * pLib, Abc_Ntk_t * pNtk, int Degree, int nRange, int fVerbose )
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{
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SC_Man * p;
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int nUpsizes;
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// prepare the manager; collect init stats
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p = Abc_SclManStart( pLib, pNtk, 1 );
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// perform upsizing
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nUpsizes = Abc_SclManUpsize( p, Degree );
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// recompute timing
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Abc_SclTimeNtkRecompute( p, &p->SumArea, &p->MaxDelay );
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// print cumulative statistics
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printf( "Resized: %d. ", nUpsizes );
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printf( "Delay: " );
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printf( "%.2f -> %.2f ps ", SC_LibTimePs(p->pLib, p->MaxDelay0), SC_LibTimePs(p->pLib, p->MaxDelay) );
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printf( "(%+.1f %%). ", 100.0 * (p->MaxDelay - p->MaxDelay0)/ p->MaxDelay0 );
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printf( "Area: " );
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printf( "%.2f -> %.2f ", p->SumArea0, p->SumArea );
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printf( "(%+.1f %%). ", 100.0 * (p->SumArea - p->SumArea0)/ p->SumArea0 );
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Abc_PrintTime( 1, "Time", clock() - p->clkStart );
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// save the result and quit
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Abc_SclManSetGates( pLib, pNtk, p->vGates ); // updates gate pointers
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Abc_SclManFree( p );
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}
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////////////////////////////////////////////////////////////////////////
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/// END OF FILE ///
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////////////////////////////////////////////////////////////////////////
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ABC_NAMESPACE_IMPL_END
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